ST25TN01K-AFH5

ST25TN512 ST25TN01K Datasheet NFC Forum Type 2 tag IC with up to 1.6 Kbits of EEPROM Features Includes ST state-of-the-art patented technology Contactless interface UFDFPN5 (1.7 × 1.4 mm) Wafer • • • • • • Full compliancy with NFC Forum Type 2 tag and ISO/IEC 14443 type A specifications Power supplied by 13.56 MHz transmitter field Data transfer at 106 kbit/s Anticollision support for management of several tags in the field simultaneously Natively supported by Android™ and iOS™ phones Internal tuning capacitance 50 pF Memory • • • • • • Up to 208 bytes (1664 bits) dedicated to user content Accessible by blocks of four bytes NFC Forum NDEF format support Augmented NDEF (contextual automatic NDEF message) 100 000 Write cycles at + 85 °C Data retention during 40 years at + 55 °C Product identification and protection Product status link ST25TN512 ST25TN01K • • • • 7 bytes unique identifier TruST25 digital signature 3-digit unique tap code NFC Forum T2T permanent write locks at block level Privacy protection • Configurable kill mode for permanent deactivation of the tag Temperature range • -40 °C/ +85 °C Delivery forms • • 5-pin package ECOPACK2 (RoHS compliant) Bumped and sawn inkless wafer DS13433 - Rev 3 - December 2021 For further information contact your local STMicroelectronics sales office. www.st.com ST25TN512 ST25TN01K Description 1 Description ST25TN512 and ST25TN01K devices are NFC Forum Type 2 tag IC with TruST25 digital signature, Augmented NDEF, and privacy features. The RF interface is compliant with ISO/IEC 14443-2 and 14443-3 Type A standards, and NFC Forum Type 2 tag specification. Thanks to its internal tuning capacitance and harvesting of operating power from RF field provided by the NFC poller, it simply operates with an antenna and without additional component. The embedded electrically erasable programmable memory (EEPROM) can be written with a NDEF message conforming to NFC Forum specification offering native tap with all NFC-enabled phones. The Augmented NDEF feature allows the tag to answer dynamic NDEF message without modification of the EEPROM by the user. The TruST25 digital signature helps fighting against counterfeiting. The kill feature guarantees user privacy by permanently muting the tag with a simple software procedure. In this document, the term ST25TN refers interchangeably to ST25TN512 or ST25TN01K. 1.1 Block diagram Figure 1. ST25TN block diagram Analog front-end Digital unit ISO/IEC 14443 type A modem NFC Forum T2T protocol Tuning capacitance Specific features control AC0 AC1 Power harvesting DS13433 - Rev 3 Memory control EEPROM Readable/ Writable One-TimeProgrammable page 2/36 ST25TN512 ST25TN01K Package connections 1.2 Package connections The ST25TN is available in the following delivery forms: • UFDFPN5 package Figure 2. UFDFPN5 bottom view (pads side) connections Not connected 1 Not connected Not connected Not connected AC1 • AC0 Bumped and sawn inkless wafer Figure 3. Bumped wafer connection 1.3 AC0 Not connected AC1 Not connected Signal descriptions Table 1. Signal description Name AC0 AC1 Not connected DS13433 - Rev 3 Description These inputs are used exclusively to connect the device to an external coil. It is advised not to connect any other DC or AC path to AC0 or AC1. When correctly tuned, the coil is used both to power and interact with ST25TN. Other pads and bumps are not connected to the internal IC. page 3/36 ST25TN512 ST25TN01K Power supply 2 Power supply The power supply is provided exclusively by the RF field at 13.56MHz at the coil. For proper operation, the following constraints must be met: 2.1 Power on In accordance with ISO/IEC 14443-3, to ensure a proper boot of the RF circuitry, the RF field must be turned on without any modulation for a minimum duration tBOOT_RF (see Section 8.2 RF characteristics). Before this time, the device ignores all received RF commands. 2.2 Power off In accordance with ISO/IEC 14443-3, to ensure a proper reset of the RF circuitry, the RF field must be turned off (100% modulation) for a minimum duration tRF_OFF (see Section 8.2 RF characteristics). DS13433 - Rev 3 page 4/36 ST25TN512 ST25TN01K Memory overview 3 Memory overview The memory is organized in blocks with 4 bytes per block. ST25TN01K and ST25TN512 have 64 blocks (256 bytes) always readable including both memory available for user data and memory reserved for system and configuration. The following address space is available to standard READ/WRITE commands: Table 2. ST25TN memory overview Block Data Bytes within the block(1) address Dec Hex Byte0 Byte1 Byte2 0 00h 1 01h 2 02h 3 03h Capability container (CC) 4 to 43(2) 04h to 2Bh(2) User memory Byte3 Device identification Internal SYSBLOCK Static Lock Bytes 44 2Ch 45 2Dh Dynamic Lock area Product identification SysLock 46 2Eh Augmented NDEF configuration 47 2Fh Kill password 48 30h Kill keyhole 49 to 59 31h to 3Bh Internal 60 3Ch 61 3Dh 62 3Eh 63 3Fh Augmented NDEF fields 1. The bytes in this table are represented with the LSB on the left. 2. For ST25TN512, the zone of blocks address from 4 to 43 is split according to Table 3. ST25TN512 user memory. Table 3. ST25TN512 user memory Block Data Bytes within the block address Dec Hex Byte0 Byte1 Byte2 4 to 19 04h to 13h User memory 20 to 43 14h to 2Bh Reserved Byte3 The user memory can expanded by application over other functions. More details on how to achieve it are provided in “AN5677 - Extending the user memory of ST25TN512 and ST25TN01K devices". DS13433 - Rev 3 page 5/36 ST25TN512 ST25TN01K Device and product identification 4 Device and product identification ST25TN embeds several readable fields allowing the identification of the product model, version, size, and serial number. All the fields are accessible through the standard READ command. 4.1 Device identification: unique identifier (UID) Each ST25TN device is uniquely identified by a 7-byte Unique identifier (UID) compliant with ISO/IEC 14443-3 double-size UID. Byte 0 of the UID is the IC manufacturer code 02h registered by STMicroelectronics according to ISO/IEC 7816-5. Table 4. Device identification (UID) Block address 0 1 Bits Name b7-b0 UID_0 b15-b8 UID_1 b23-b16 UID_2 b7-b0 UID_3 b15-b8 UID_4 b23-b16 UID_5 b31-b24 UID_6 Function Access Factory value 02h UID READ: always WRITE: never Unique serial number Table 5. BCC Block address 0 4.2 Bits Name Function Access Block Check Character as defined in ISO/IEC b31-b24 BCC_1 14443-3 and NFC Forum Digital Protocol Technical Specification Factory value READ: always = 88h xor UID_0 xor UID_1 WRITE: never xor UID_2 Product identification: SYSBLOCK, PC, REV, KID The product identification is done using standard READ command in the system area. To be compatible with several STMicroelectronics Type 2 tag sizes, an application must first read the value of SYSBLOCK to know the location of the system area, and then read PC/REV/KID in the system area. Table 6. System area identification (SYSBLOCK) Block address Bits Name Function Access Factory value Block address of the beginning of the system area. 2 DS13433 - Rev 3 b15-b8 SYSBLOCK To be compatible with several STMicroelectronics Type 2 tag sizes, an application must use this value plus 1 to read the product identification block. READ: always WRITE: never 2Ch page 6/36 ST25TN512 ST25TN01K Product identification: SYSBLOCK, PC, REV, KID Table 7. Product identification (PC, REV, KID) Block address Bits b15-b0 Name PC Function DS13433 - Rev 3 READ: always b23-b16 REV Product version b31-b24 KID Key ID used to generate TruST25 signature during manufacturing Factory value 9091h for ST25TN512 Product code "Value read in SYSBLOCK" + 1 Access WRITE: never 9090h for ST25TN01K 13h 05h page 7/36 ST25TN512 ST25TN01K Device features 5 Device features 5.1 Capability container (CC) The block 3 has a specific behavior conforming to NFC Forum Type 2 tag specification for capability container (CC bytes). The content of CC bytes after manufacturing is described in Section 7 Memory content at delivery. The modifications of CC can be prevented according to Section 5.2 Access restriction. When it is not locked the following applies: • The bits of block 3 are one-time-programmable (OTP): – they can only be set to 1 and cannot be changed back to 0. Upon reception of a valid WRITE command to a block address 3, the device only sets the bits at 1, ignore the other bits and answers ACK. • Writing into block 3 is tearing-proof: – even in case of tearing, the bits are never erased. 5.2 Access restriction It is possible protect the write access of blocks with a lock mechanism. The lock is irreversible: a locked block can never be unlocked and is never writable again. The lock mechanism is compliant with NFC Forum T2T specification with some extensions providing finer grain locking options. 5.2.1 Generic lock mechanism The blocks to lock are configured using “lock bits” of Static lock bytes, Dynamic lock area (DynLock_Area) and SysLock byte shown in Table 2. ST25TN memory overview with the memory mapping detailed in the following table. Table 8. Memory lock bytes in memory map Block Data Bytes(1) address Hex Dec Byte0 Byte1 Byte2 Byte3 02h 2 - SYSBLOCK STATLOCK_0 STATLOCK _1 2Ch 44 DYNLOCK_0 DYNLOCK_1 DYNLOCK_2 SYSLOCK 1. The bytes are represented with the LSB on the left. In all these bytes, each lock bit configures the write access of a given memory region. When a lock bit is set to 1, the content of the target memory region cannot be modified anymore and becomes read-only. The lock bits are One-Time-Programmable (OTP): they can only be set to 1 and cannot be changed back to 0. Upon reception of a valid WRITE command to a block with lock bits, the device only sets the bits at 1, ignore the other bits and answers ACK. Writing into a block with lock bits is tearing-proof: even in case of tearing, the lock bits are never erased. The mapping of which lock bit locks which memory region is described in Table 10 and Table 9. The specificities of Static Lock bytes, DynLock_Area and SysLock byte are described in dedicated sections below. The following table details which bit locks which block(s). DS13433 - Rev 3 page 8/36 ST25TN512 ST25TN01K Access restriction Table 9. Lock bit mapping Locked Memory Locking bit Block Bytes number Register Bit Hex Dec Byte0 Byte1 Byte2 Byte3 b0 See Table 10. Lock bit mapping for STATLOCK_0[0:2] b1 b2 STATLOCK_0 STATLOCK_1 b3 03h 3 b4 04h 4 b5 05h 5 b6 06h 6 b7 07h 7 b0 08h 8 b1 09h 9 b2 0Ah 10 b3 0Bh 11 b4 0Ch 12 b5 0Dh 13 b6 0Eh 14 b7 0Fh 15 10h 16 11h 17 12h 18 13h 19 14h 20 15h 21 16h 22 17h 23 18h 24 19h 25 1Ah 26 1Bh 27 1Ch 28 1Dh 29 1Eh 30 1Fh 31 20h 32 21h 33 22h 34 23h 35 24h 36 b0 b1 b2 b3 DYNLOCK_0 b4 b5 b6 b7 b0 DYNLOCK_1 b1 b2 DS13433 - Rev 3 CC User memory page 9/36 ST25TN512 ST25TN01K Access restriction Locked Memory Locking bit Block Bytes number Register Bit Hex Dec b2 25h 37 26h 38 27h 39 28h 40 29h 41 2Ah 42 2Bh 43 b0 2Ch 44 b1 2Dh 45 Product identification b2 2Eh 46 ANDEF configuration b3 2Fh 47 KILL_PWD b4 30h 48 Kill keyhole 3Ch 60 3Dh 61 3Eh 62 3Fh 63 b3 DYNLOCK_1 b4 b5 SYSLOCK b6 DYNLOCK_2 b7 DS13433 - Rev 3 Byte0 Byte1 Byte2 Byte3 DYNLOCK_2 SYSLOCK User memory DYNLOCK_0 DYNLOCK_1 ANDEF_CUSTOM ANDEF_CUSTOM ANDEF_SEP - page 10/36 ST25TN512 ST25TN01K Access restriction 5.2.2 Static lock bytes This section describes specificities on top of the generic lock mechanism described Section 5.2.1 Generic lock mechanism. The static lock bits are stored at block address 2, which contains both read-only and writable bits. Upon reception of a valid WRITE command for this block, the device updates only the writable bits of the block and answers ACK. The low significant bits 0 to 2 of STATLOCK_0 are special because they allow to disable the locking of some blocks by locking the value of some STATLOCK_0 and STATLOCK_1 bits as shown in Table 10. Table 10. Lock bit mapping for STATLOCK_0[0:2] Locking bit Name Locked memory bit Name bit b0 STATLOCK_0 b3 b4 STATLOCK_0 b1 b6 b7 STATLOCK_1 STATLOCK_0 b5 b0 b1 b2 b3 b2 STATLOCK_1 b4 b5 b6 b7 • • • If bit b0 of STATLOCK_0 is set to 1 and bit b3 of STATLOCK_0 is reset to 0, the block 3 (CC file) is always writable. If bit b1 of STATLOCK_0 is set to 1 and some bits of STATLOCK_0[7:4] or STATLOCK_1[1:0] are reset to 0, the corresponding block(s) between 4 and 9 included is always writable. If bit b2 of STATLOCK_0 is set to 1 and some bits of STATLOCK_1[7:2] are reset to 0, the corresponding block(s) between 0Ah and 0Fh included is always writable. The remaining system lock bits have a granularity of 1 block: Each bit locks the value of 1 block (4 bytes) with bit b3 of STATLOCK_0 locking the value of block address 3 and so forth as described in Table 9. Lock bit mapping. 5.2.3 Dynamic lock bits This section describes specificities on top of the generic lock mechanism described in Section 5.2.1 Generic lock mechanism. Dynamic Lock Bits have a granularity of 2 blocks (8 bytes) per bit: Each bit locks the value of 2 blocks (8 bytes), starting at block address 10h and up to the end of the memory as shown in Table 9. Lock bit mapping. The dynamic lock bits SYSLOCK_1[6:7] and SYSLOCK_2[0:1] that would apply to a block in the system area protected by SYSLOCK bits are ignored by the device whatever their value. Note: DS13433 - Rev 3 For ST25TN01K: with the factory CC programming defining a T2T_Area_Size of 160 bytes, the position of the first Dynamic lock byte is the first byte after the T2T_Area. Since the granularity of dynamic lock bits matches the default granularity defined in NFC Forum Type 2 Tag specification, there is no need for a Lock Control TLV in T2T_AREA to define the position and number of dynamic lock bits. page 11/36 ST25TN512 ST25TN01K Privacy: Kill feature 5.2.4 System lock bits This section describes specificities on top of the generic lock mechanism described in Section 5.2.1 Generic lock mechanism. System lock bits have a granularity of 1 block: Each bit locks the value of 1 block (4 bytes), starting at block address 2Ch, as shown in Table 9. Lock bit mapping. 5.3 Privacy: Kill feature It is possible to permanently kill the RF interface of the device: When the device is in KILLED state, all incoming RF commands are ignored. There is no way to revert a killed device back to normal operation. This feature may be used to comply with GDPR or another privacy requirement. 5.3.1 Kill command The Kill command is a Write of the kill password to the address 30h = 48. Table 11. Kill command format TBD Byte 1 Byte 2 Field Code Block address Content A2h 30h Byte 3 Byte 4 Byte 5 Byte 6 Byte 7 Byte 8 Kill password CRC_A 4 bytes 2 bytes The Kill command may be disabled by locking the “kill keyhole” block using the locking mechanism described in Section 5.2 Access restriction. When the Kill command is disabled (block 30h is locked), the device answers NACK0 to a WRITE command in block 30h. When the Kill command is enabled (block 30h is not locked) and the data value in the Write command matches the kill password stored in the device, the device answers ACK and set an internal non-volatile bit “Killed” to the value 1. Then, it enters Killed state on the next and each boot as described in Figure 4. State machine. 5.3.2 Kill password Table 12. KILL_PWD Block address (Hex) 2Fh Name Function Factory value KILL_PWD Kill password 00000000h The kill password (KILL_PWD) can be freely written without password presentation unless the block is locked by corresponding SYSLOCK bit. Once corresponding SYSLOCK bit is set, the password cannot be modified anymore. The kill password can never be read-out: Upon a READ command, the device always returns 00000000h for the bytes of block address 2Fh whatever the actual values of these bytes. Warning: the kill password adds security only if it is locked, otherwise it can be modified without knowledge of the previous password. DS13433 - Rev 3 page 12/36 ST25TN512 ST25TN01K Augmented NDEF 5.4 Augmented NDEF The augmented NDEF feature (ANDEF) allows the device to respond smart NDEF messages thanks to: • Automatic insertion of a custom field such as UID • Automatic insertion of unique tap code (UTC) without modification of the EEPROM by the user When the feature is enabled, memory data at byte addresses ranging from ANDEF_START to ANDEF_END is replaced by the content of a virtual memory ANDEF_MEM in the response to READ command as shown in following figure Table 13. Effect of ANDEF feature on READ data response Block data Block when ANDEF is disabled address (dec) when ANDEF is enabled, ANDEF_START=77, ANDEF_END=82 Byte0 Byte1 Byte2 Byte3 Byte0 Byte1 Byte2 Byte3 00 B0 B1 B2 B3 B0 B1 B2 B3 … … … … … … … … … 18 B72 B73 B74 B75 B72 B73 B74 B75 19 B76 B77 B78 B79 B76 A0 A1 A2 20 B80 B81 B82 B83 A3 A4 A5 B83 21 B84 B85 B86 B87 B84 B85 B86 B87 … … … … … … … … … In the above table: • Bx is byte x of EEPROM memory • Ax is byte x of the virtual memory ANDEF_MEM The values ANDEF_START and ANDEF_END depend on the ANDEF configuration as defined in Table 14. ANDEF_CFG. • ANDEF_START = ANDEF_BLOCK * 4 + ANDEF_BYTE • ANDEF_END = ANDEF_START + ANDEF_CUSTOM_EN * 14 + ANDEF_UTC_EN * 3 + ANDEF_SEP_EN 1 • ANDEF_SEP_EN = 1 if both ANDEF_CUSTOM_EN is 1 and ANDEF_UTC_EN is 1, otherwise ANDEF_SEP_EN = 0 DS13433 - Rev 3 page 13/36 ST25TN512 ST25TN01K Augmented NDEF 5.4.1 ANDEF configuration The following fields configure ANDEF behavior: Table 14. ANDEF_CFG Block address Bits Name b5-b0 ANDEF_BLOCK b7-b6 RFU b8 ANDEF_CUSTOM_EN b9 RFU b10 ANDEF_UTC_EN b13-b11 RFU b15-b14 ANDEF_BYTE Function Factory value (hex) 2Eh Block address for the beginning of ANDEF_MEM 0Fh - 0 1b: ANDEF_CUSTOM is appended in ANDEF_MEM 0b: ANDEF_CUSTOM is not appended in ANDEF_MEM - 0 0 1b: ANDEF_UTC is appended in ANDEF_MEM 0 0b: ANDEF_UTC is not appended in ANDEF_MEM - 0 Byte number into ANDEF_BLOCK for the beginning of ANDEF_MEM 0 ANDEF feature is disabled when both ANDEF_CUSTOM_EN and ANDEF_UTC_EN are reset to the value 0. ANDEF_CFG is always readable. Modifications of ANDEF_CFG can be prevented according to Section 5.2 Access restriction. 5.4.2 ANDEF custom Table 15. ANDEF_CUSTOM Block address Bits Name Function Factory value ANDEF_CUSTOM Field inserted in ANDEF_MEM when ANDEF_CUSTOM_EN is 1 ASCII coding of the device UID in hexadecimal representation (hex) 3Ch-3Eh b31-b0 3Fh b15-b0 ANDEF_CUSTOM is initialized at factory with ASCII coding of the device UID in hexadecimal representation. Consequently, several ST25TN with the same content in T2T_AREA can answer different NDEF messages, each one with a device-specific content. ANDEF_CUSTOM is always readable. Modifications of ANDEF_ CUSTOM can be prevented according to Section 5.2 Access restriction. Since memory is not locked at manufacturing, it is possible to replace the ANDEF_CUSTOM with another custom message. 5.4.3 ANDEF unique tap code ANDEF_UTC is an ASCII value generated once every time the device is powered. The value is unique to each user tap of the tag, and predictable. The size of ANDEF_UTC is 3 bytes. A typical usage of UTC is to embed it in the URI record of a NDEF message. In this case, when a user taps the tag with a smartphone, its web browser natively opens a URL including the unique tap code, which can be processed as an element of tag authentication by the web server. More details on ANDEF_UTC are provided in “AN5628 – Unique tap code for ST25TN512 and ST25TN01K devices". Contact your STMicroelectronics sales office to get this document. DS13433 - Rev 3 page 14/36 ST25TN512 ST25TN01K TruST25 digital signature 5.4.4 ANDEF separator A separator is inserted between ANDEF_CUSTOM and ANDEF_UTC when both ANDEF_CUSTOM_EN and ANDEF_UTC_EN are set to 1. The value of this separator can be customized by writing ANDEF_SEP described in the following table. Table 16. ANDEF_SEP Blocks address Bits Name Function Factory value (Hex) 3Fh b23-b16 ANDEF_SEP Field inserted in ANDEF_MEM when both ANDEF_CUSTOM_EN = 1 and ANDEF_UTC_EN = 1 78h ASCII code of ‘x’ ANDEF_SEP is always readable. Modifications of ANDEF_ SEP can be prevented according to Section 5.2 Access restriction. 5.5 TruST25 digital signature ST25TN supports the TruST25 digital signature feature, which allows the user to verify the authenticity of the device, thanks to a unique digital signature. TruST25 solution encompasses secure industrialization processes and tools deployed by STMicroelectronics to generate, store, and check the signature in the device. More details on TruST25 digital signature are provided in “AN5660 – TruST25 digital signature for ST25TN512 and ST25TN01K devices". Contact your STMicroelectronics sales office to get this document. DS13433 - Rev 3 page 15/36 ST25TN512 ST25TN01K Device operation 6 Device operation 6.1 NFC Type 2 tag overview NFC Type 2 tag specification is based on NFC-A technology specification which is aligned with ISO/IEC 14443-2 and 14443-3 Type A. Since both specifications use different wording for the same concept, both wordings are often provided in this document. For example "SAK/SEL_RES" designates ISO/IEC 14443 "SAK" and its NFC Forum equivalent "SEL_RES". The tag (also named PICC) always waits to receive a command from an initiator (named Poller or PCD) before sending a response. Commands are transmitted using OOK (100% ASK) modulation of a 13.56MHz carrier wave transmitted by the Poller. Responses are transmitted using retro-modulation of the same carrier wave. Both commands and responses are transmitted at 106kbps. Type 2 tags and Type 4 tags share the same activation, anticollision and selection process allowing one-to-one communication in presence of several tags. Type 2 tags are distinguished from Type 4 tags by their SAK/SEL_RES response to ATQA/SEL_REQ command. ST25TN512 and ST25TN01K SAK value is described in section “SAK/SEL_RES” response. On top of the communication protocol, Type 2 tag specification defines • some commands to access directly the memory, • a memory layout, • a memory lock mechanism, • and memory content to layout a NDEF. ST25TN implements the commands, the memory layout, and the memory lock mechanism. The memory content is managed by application. DS13433 - Rev 3 page 16/36 ST25TN512 ST25TN01K State machine 6.2 State machine ST25TN follows the following state machine, compliant with ISO/IEC 14443-3 type A anticollision and select sequences and NFC Forum T2 tag specification. The equivalence between ISO/IEC 14443 command names and NFC Forum command names is provided in Table 17. Commands overview. Figure 4. State machine POWER_OFF Killed = 0 HALT(3) other(1) REQA WUPA READY 1(3) SELECT CL1 (2) KILLED(3) IDLE(3) WUPA (2) Killed = 1 other(1) READY 2(3) ANTICOLLISION READ from block 0-15 ANTICOLLISION SELECT CL2 READ from block 0-15 - (2) other(1) ACTIVE(3) READ WRITE HLTA (1) “other” includes any erroneous command for which the device answers NACK. (2) The device returns in HALT state if it was previously in HALT state after POWER_OFF state, otherwise it returns to IDLE state. (3) In all states, the device returns to POWER_OFF state when it is not powered anymore. DS13433 - Rev 3 page 17/36 ST25TN512 ST25TN01K Timings 6.3 Timings The timing of commands is provided in each command section, rounded at 1 µs, using the following generic representation with drawing not to scale: Figure 5. Generic representation of command timing NFC device ST25TN Command tx Response tresponse ttimeout No response • tx is the time between the end of the command and the beginning of the response. It is not FDT • tresponse includes SOF and EOF of the response • ttimeout is equal to the maximum value of tx ISO/IEC 14443-3 and NFC Forum digital specification define the frame delay time (FDT) starting at the end of the last pulse of the command such that: • FDT = (nFDT * 128 + 84) / fc in case the last bit of the command is a logic '1' and • FDT = (nFDT * 128 + 20) / fc in case the last bit of the command is a logic '0' where fc is the frequency of the carrier wave and 'nFDT' is an integer. Figure 6. Frame delay time (FDT) Response … … Command time Last modulation pause First retro-modulation pause FDT The values of tx, tresponse, ttimeout and nFDT are provided for each command with its description. DS13433 - Rev 3 page 18/36 ST25TN512 ST25TN01K Commands 6.4 Commands 6.4.1 Commands overview Table 17. Commands overview Type Name Code Function SENS_REQ REQA 26h(1) ALL_REQ WUPA 52h(1) ISO/IEC 14443-3 Type A SDD_REQ_CL1 Anticollision CL1 93h xxh Device initialization, and SEL_REQ_CL1 Select CL1 93h 70h anticollision, NFC Forum NFC-A technology SDD_REQ_CL2 Anticollision CL2 95h xxh and selection SEL_REQ_CL2 Select CL2 95h 70h HLTA 50h 00h SLP_REQ NFC Forum Type 2 tag READ 30h Read 4x Blocks of data WRITE A2h Write 1x Block of data 1. Code on 7 bits. The commands used for device initialization, anti-collision and selection are described in ISO/IEC 14443-3 for Type A and alternatively in NFC Forum Digital specification for NFC-A technology. Other commands supported by the device are described hereafter. 6.4.2 READ Figure 7. READ command outline NFC device ST25TN READ command tREAD READ response 1548 µs tNACK NACK 57 µs Table 18. READ command format Byte DS13433 - Rev 3 1 2 3 4 Field Command code Block address CRC_A Content 30h 1 byte 2 bytes page 19/36 ST25TN512 ST25TN01K Commands • • Block address is the address of the first block to read. CRC_A is Cyclic redundancy check defined in NFC Forum digital specification for NFC-A technology. The following responses may be issued upon reception of a READ command code: Table 19. Possible responses to the READ command Condition upon reception of READ command code Response Wrong number of bytes of payload No response Parity or CRC_A error NACK1 (see Section 6.5.2 NACK response) Block address is outside the valid address range. NACK0 (see Section 6.5.2 NACK response) ST25TN valid address range is [0;3Fh] = [0;63] Successful read READ response Table 20. READ response format Byte • • • 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 Field DATA CRC_A Content 16 bytes 2 bytes DATA is the content of 16 bytes of memory starting from the block address requested in the command. For example upon reception of the command “30h, 00h“, the bytes of blocks 00h, 01h, 02h and 03h are returned. DATA may differ from the content of addressed memory in the following cases: – ANDEF feature described in Section 5.4.1 ANDEF configuration is enabled – The content of blocks “KILL_PWD” (2Fh) and “Kill keyhole” (30h) can’t be read-out and are replaced with value 00h CRC_A is Cyclic Redundancy Check defined in NFC Forum digital specification for NFC-A technology. If a command READ is received while the device is in state READY1 or READY2, the following specific behavior apply: • The valid block address range is limited to [0:15] • DATA in response roll-over to the content of block 0 after the block 15. • The normal content of memory is always returned even if ANDEF is enabled in this region. Table 21. READ timings Symbol Typical Max Unit tREAD 70.5 4734 µs tNACK - 4734 µs nFDT, READ 9 501 - The timings showed in Figure 7. READ command outline and Table 21. READ timings are explained in Section 6.3 Timings. DS13433 - Rev 3 page 20/36 ST25TN512 ST25TN01K Commands 6.4.3 WRITE Figure 8. WRITE command outline ST25TN NFC device WRITE command tWRITE ACK 57 µs tNACK NACK 57 µs Table 22. WRITE command format Byte 1 2 Field Command code Block address Content A2h 1 byte • • • 3 4 5 6 7 8 DATA CRC_A 4 bytes 2 bytes Block address is the address of the block to modify. DATA is the data to write. CRC_A is Cyclic Redundancy Check defined in NFC Forum digital specification for NFC-A technology. The following responses may be issued upon reception of a WRITE command code: Table 23. Possible responses to the WRITE command Condition upon reception of WRITE command code Response Wrong number of bytes of payload No response Parity or CRC_A error NACK1 (see Section 6.5.2 NACK response) Block address is outside the valid address range. ST25TN01K valid address range is [0-3Fh] ([0-63]) NACK0 (see Section 6.5.2 NACK response) Block address targets a read-only block. DS13433 - Rev 3 Read-only blocks includes the system read-only blocks and the blocks locked. The only exception is the block address 2, which is always considered as writable. NACK0 (see Section 6.5.2 NACK response) After writing EEPROM, the hardware check if is not OK NACK5 (see Section 6.5.2 NACK response) EEPROM successfully written ACK (see Section 6.5.1 ACK response page 21/36 ST25TN512 ST25TN01K Standard responses Table 24. WRITE timings Symbol Typical Max Unit tWRITE 4163 4734 µs tNACK - 4734 µs nFDT, WRITE 443 501 - The timings of Figure 8. WRITE command outline and Table 24. WRITE timings are explained in Section 6.3 Timings. 6.5 Standard responses If a command has an unknown command code the device doesn’t answer. Any error with or without answer changes the device state back to IDLE or HALT as described in Figure 4. State machine. 6.5.1 ACK response ACK response is 4 bits equal to Ah conforming to T2 Tag specification to indicate a successful operation. 6.5.2 NACK response NACK response is 4 bits conforming to T2 Tag specification to indicate an error. The following NACK values are used: Table 25. NACK responses Name 6.5.3 Value (4 bits) Meaning NACK0 0h Invalid argument NACK1 1h Parity or CRC_A error NACK5 5h EEPROM write error ATQA/SENS_RES response Upon reception of REQA (SENS_REQ) or WUPA (ALL_REQ) command, the device issues the following ATQA (SENS_RES) response indicating a double UID size (7 bytes): Table 26. ATQA/SENS_RES response Byte 1 2 Field UID size & Anticollision info Platform information Content 44h 00h In little endian representation, the corresponding 16 bits value is 0x0044. DS13433 - Rev 3 page 22/36 ST25TN512 ST25TN01K Standard responses 6.5.4 SAK/SEL_RES response Upon reception of SELECT (SEL_REQ) command with complete matching UID bits, the device issues the following SAK (SEL_RES) response indicating UID complete and PICC compliant with Type 2 tag platform and not ISO/IEC 14443-4. Table 27. SAK/SEL_RES response Byte DS13433 - Rev 3 1 2 Field Select acknowledge CRC_A Content 00h FEh 3 51h page 23/36 ST25TN512 ST25TN01K Memory content at delivery 7 Memory content at delivery ST25TN is programmed during manufacturing to comply with NFC Forum INITIALIZED state so that it is readily usable by any NFC Forum compatible device. Augmented NDEF fields are programmed during manufacturing so that only generic configuration as described in Section 5.4.1 ANDEF configuration is required to benefit from Augmented NDEF. Table 28. Initial memory content Block Byte 03h Name Magic number E1h Indicates that this is a T2T 1 CC_1 Version 10h T2T current specification 08h: for ST25TN512 T2T_Area_Size = 64 bytes : for ST25TN512 2 CC_2 Size 3 CC_3 Access condition 00h read/write access granted TLV Type 03h NDEF TLV Length 00h Empty NDEF TLV Type FEh Terminator TLV TLV Type 00h NULL TLV 1 2 … … 3Ch 0 … … 0 T2T_AREA … … ANDEF_CUSTOM Source for custom field in ANDEF_MEM ANDEF_SEP Source for fields separator in ANDEF_MEM 14h: for ST25TN01K … T2T_Area_Size = 160 bytes : for ST25TN01K … ASCII coding of hexadecimal representation Unique to each IC of UID 1 2 DS13433 - Rev 3 Description CC_0 3 3Fh Value 0 0 04h Parameter 78h ASCII code of ‘x’ page 24/36 ST25TN512 ST25TN01K Device parameters 8 Device parameters 8.1 Maximum ratings Stressing the device above the rating listed in Table 29 may cause permanent damage to the device. These are stress ratings only and operation of the device, at these or any other conditions above those indicated in the operating sections of this specification, is not implied. Exposure to absolute maximum rating conditions for extended periods may affect the device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. Table 29. Absolute maximum ratings Symbol Parameter Min. Max. TA Ambient operating temperature UFDFPN5 TSTG Storage temperature tSTG Sawn wafer(1) storage duration counted from ST production date TLEAD Sawn Wafer(1) - 40 85 -65 150 15 25 - 9 VMAX_1 Max input voltage peak-to-peak amplitude between AC0 and AC1 °C °C months (2) Lead temperature during soldering Unit °C - 8.5 V - 2000 V Electrostatic discharge voltage on all pins VESD Human body model of ANSI/ESDA/JEDEC JS-001-2012 with C = 100 pF, R = 1500 Ω , R2 = 500 Ω 1. Sawn wafer on UV tape kept in its original packing form. 2. Compliant with JEDEC Std J-STD-020D (for small body, Sn-Pb or Pb assembly), the ST ECOPACK 7191395 specification, and the European directive on Restrictions on Hazardous Substances (RoHS) 2002/95/EU. DS13433 - Rev 3 page 25/36 ST25TN512 ST25TN01K RF characteristics 8.2 RF characteristics This section summarizes the operating and measurement conditions, and the RF characteristics of the device. The parameters in the RF characteristics table that follow are derived from tests performed under the Measurement Conditions summarized in the relevant tables. Designers should check that the operating conditions in their circuit match the measurement conditions when relying on the quoted parameters. Table 30. RF characteristics Symbol fC Condition(1)(2) Parameter Frequency of external operating field (carrier)(3) Min - MICARRIER Carrier Modulation Index(3)(4) Typ Max Unit 13.553 13.56 13.567 MHz - 90 - 100 % tBoot_RF Time from field activation (unmodulated carrier) to the beginning of first PCD command(3) - - - 1 ms tRF_OFF Time between RF OFF and chip reset(3) - - - 0.1 ms fC = 13.56 MHz 27.5/fC - 41/fC µs t2 ISO/IEC 14443-2 pause A low time(3) fC = 13.56 MHz 6/fC - t1 µs t3 ISO/IEC 14443-2 pause A rise time(3) fC = 13.56 MHz 0 - 17/fC µs Wt Time from the end of WRITE command EOF to the beginning of response SOF(3) - - 4.16 - ms fC = 13.56 MHz, at POR level, on wafer and TA = room temperature 47.5 50 52.5 pF t1 CTUN ISO/IEC 14443-2 pause A length(3) Input capacitance(5) 1. For all parameters, by default TA = - 40 to 85 °C. 2. All timing characterizations were performed using "test PCD assembly 1" defined in ISO/IEC 10373-6 and a "class 1" PICC with resonance frequency at 14.2 MHz. 3. Evaluated By Characterization – Not tested in production. 4. MI = [1 - b] / [1 + b], where b is the ratio between the modulated amplitude and the initial signal amplitude. 5. Evaluated By Characterization – Tested in production by correlating industrial tester measure with characterization results. 8.3 Memory characteristics This section summarizes the operating and measurement conditions, and the memory characteristics of the device. The parameters in the Table 31 are derived from tests performed under the measurement conditions summarized in the relevant tables. Designers should check that the operating conditions in their circuit match with the measurement conditions, when based on the parameters mentioned. Table 31. Memory characteristics Symbol tRET Cycling Parameter Retention Condition Min Typ Max Unit TA ≤ 55 °C 40 - - year TA = - 40 °C to 85 °C 100000 - - cycle time(1) Write cycles endurance(1) 1. Evaluated By Characterization – Not tested in production. DS13433 - Rev 3 page 26/36 ST25TN512 ST25TN01K Package information 9 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 9.1 Sawn and bumped waver Contact your STMicroelectronics sales office to get the description document. 9.2 UFDFPN5 (DFN5) package information UFDFPN5 is a 5-lead, 1.7 × 1.4 mm, 0.55 mm thickness, ultra thin fine pitch dual flat package. Figure 9. UFDFPN5 - Outline D k L Pin 1 Pin 1 b X E E1 Y D1 Top view (marking side) e L1 Bottom view (pads side) A A1 Side view 1. 2. 3. 4. DS13433 - Rev 3 Maximum package warpage is 0.05 mm. Exposed copper is not systematic and can appear partially or totally according to the cross section. Drawing is not to scale. On the bottom side, pin 1 is identified by the specific pad shape and, on the top side, pin 1 is defined from the orientation of the marking. When reading the marking, pin 1 is below the upper left package corner. page 27/36 ST25TN512 ST25TN01K UFDFPN5 (DFN5) package information Table 32. UFDFPN5 - Mechanical data Symbol millimeters inches Min Typ Max Min Typ Max A 0.500 0.550 0.600 0.0197 0.0217 0.0236 A1 0.000 - 0.050 0.0000 - 0.0020 b(1) 0.175 0.200 0.225 0.0069 0.0079 0.0089 D 1.600 1.700 1.800 0.0630 0.0669 0.0709 D1 1.400 1.500 1.600 0.0551 0.0591 0.0630 E 1.300 1.400 1.500 0.0512 0.0551 0.0591 E1 0.175 0.200 0.225 0.0069 0.0079 0.0089 X - 0.200 - - 0.0079 - Y - 0.200 - - 0.0079 - e - 0.400 - - 0.0157 - L 0.500 0.550 0.600 0.0197 0.0217 0.0236 L1 - 0.100 - - 0.0039 - k - 0.400 - - 0.0157 - 1. Dimension b applies to plated terminal and is measured between 0.15 and 0.30mm from the terminal tip. Figure 10. UFDFPN5 - Recommended footprint Pin 1 0.400 0.600 0.200 0.200 0.200 0.200 0.400 1.600 1. DS13433 - Rev 3 Dimensions are expressed in millimeters. page 28/36 ST25TN512 ST25TN01K Ordering information 10 Ordering information ST25TN part numbers are coded according to the following table: Table 33. Ordering information scheme Example: ST25TN 01K - A F G 5 Device type ST25TN = NFC Forum T2T tag Memory size 512 = 512 bits 01K = 1280 bits Interface A = Antenna Features F = Augmented NDEF Package F = 75 μm ± 10 μm bumped and sawn wafer G = 120 μm ± 15 μm bumped and sawn wafer H = UFDFPN5 Capacitance 5 = 50 pF DS13433 - Rev 3 page 29/36 ST25TN512 ST25TN01K List of acronyms 11 List of acronyms Table 34. List of acronyms Acronym ANDEF Augmented NDEF ASCII American standard code for information interchange ATQA Answer to request, Type A CC Capability container CLn Cascade level n CRC_A DFN EEPROM Cyclic redundancy check for NFC-A technology Dual flat no-lead Electrically erasable programmable read-only memory EOF End of frame FDT Frame delay time GDPR General data protection regulation HLTA Halt command, Type A IC Integrated circuit IEC International electrotechnical commission ISO International organization for standardization NDEF NFC data exchange format NFC Near field communication PCD Proximity coupling device PICC Proximity-integrated circuit card POR Power-on reset RF Radio frequency RFID Radio frequency identification RFU Reserved for future use SAK Select acknowledge SEL Select code SOF Start of frame TLV Type length value T2T Type 2 tag UFDFPN UID WUPA DS13433 - Rev 3 Definition Ultra thin fine pitch dual flat package no-lead Unique identifier Wake‑up command, Type A page 30/36 ST25TN512 ST25TN01K Revision history Table 35. Document revision history Date Revision 07-Sep-2021 1 8-Nov-2021 2 Changes Initial release. Updated: • Features • Section 5.4.3 ANDEF unique tap code Updated: 17-Dec-2021 DS13433 - Rev 3 3 • Section 3 Memory overview • Section 5.5 TruST25 digital signature page 31/36 ST25TN512 ST25TN01K Contents Contents 1 2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 1.1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 1.2 Package connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.3 Signal descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Power supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 2.1 Power on . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.2 Power off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Memory overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 4 Device and product identification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 5 4.1 Device identification: unique identifier (UID) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4.2 Product identification: SYSBLOCK, PC, REV, KID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Device features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 5.1 Capability container (CC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 5.2 Access restriction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 5.3 5.4 5.5 6 5.2.1 Generic lock mechanism . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 5.2.2 Static lock bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 5.2.3 Dynamic lock bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 5.2.4 System lock bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Privacy: Kill feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5.3.1 Kill command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5.3.2 Kill password. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Augmented NDEF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5.4.1 ANDEF configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5.4.2 ANDEF custom . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5.4.3 ANDEF unique tap code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5.4.4 ANDEF separator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 TruST25 digital signature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Device operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 6.1 NFC Type 2 tag overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 6.2 State machine . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 DS13433 - Rev 3 page 32/36 ST25TN512 ST25TN01K Contents 6.3 Timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 6.4 Commands. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 6.5 6.4.1 Commands overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 6.4.2 READ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 6.4.3 WRITE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Standard responses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 6.5.1 ACK response. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 6.5.2 NACK response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 6.5.3 ATQA/SENS_RES response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 6.5.4 SAK/SEL_RES response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 7 Memory content at delivery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24 8 Device parameters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25 9 8.1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 8.2 RF characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 8.3 Memory characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27 9.1 Sawn and bumped waver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 9.2 UFDFPN5 (DFN5) package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 10 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29 11 List of acronyms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31 DS13433 - Rev 3 page 33/36 ST25TN512 ST25TN01K List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. Table 22. Table 23. Table 24. Table 25. Table 26. Table 27. Table 28. Table 29. Table 30. Table 31. Table 32. Table 33. Table 34. Table 35. Signal description . . . . . . . . . . . . . . . . . . . . . . ST25TN memory overview . . . . . . . . . . . . . . . . ST25TN512 user memory . . . . . . . . . . . . . . . . . Device identification (UID). . . . . . . . . . . . . . . . . BCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . System area identification (SYSBLOCK) . . . . . . . Product identification (PC, REV, KID) . . . . . . . . . Memory lock bytes in memory map . . . . . . . . . . Lock bit mapping . . . . . . . . . . . . . . . . . . . . . . . Lock bit mapping for STATLOCK_0[0:2] . . . . . . . Kill command format. . . . . . . . . . . . . . . . . . . . . KILL_PWD . . . . . . . . . . . . . . . . . . . . . . . . . . . Effect of ANDEF feature on READ data response ANDEF_CFG . . . . . . . . . . . . . . . . . . . . . . . . . ANDEF_CUSTOM . . . . . . . . . . . . . . . . . . . . . . ANDEF_SEP. . . . . . . . . . . . . . . . . . . . . . . . . . Commands overview . . . . . . . . . . . . . . . . . . . . READ command format . . . . . . . . . . . . . . . . . . Possible responses to the READ command. . . . . READ response format . . . . . . . . . . . . . . . . . . . READ timings . . . . . . . . . . . . . . . . . . . . . . . . . WRITE command format. . . . . . . . . . . . . . . . . . Possible responses to the WRITE command . . . . WRITE timings . . . . . . . . . . . . . . . . . . . . . . . . NACK responses . . . . . . . . . . . . . . . . . . . . . . . ATQA/SENS_RES response . . . . . . . . . . . . . . . SAK/SEL_RES response . . . . . . . . . . . . . . . . . Initial memory content . . . . . . . . . . . . . . . . . . . Absolute maximum ratings . . . . . . . . . . . . . . . . RF characteristics . . . . . . . . . . . . . . . . . . . . . . Memory characteristics . . . . . . . . . . . . . . . . . . . UFDFPN5 - Mechanical data . . . . . . . . . . . . . . . Ordering information scheme. . . . . . . . . . . . . . . List of acronyms . . . . . . . . . . . . . . . . . . . . . . . Document revision history . . . . . . . . . . . . . . . . . DS13433 - Rev 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 . 5 . 5 . 6 . 6 . 6 . 7 . 8 . 9 11 12 12 13 14 14 15 19 19 20 20 20 21 21 22 22 22 23 24 25 26 26 28 29 30 31 page 34/36 ST25TN512 ST25TN01K List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. DS13433 - Rev 3 ST25TN block diagram . . . . . . . . . . . . . . . . . UFDFPN5 bottom view (pads side) connections Bumped wafer connection . . . . . . . . . . . . . . . State machine . . . . . . . . . . . . . . . . . . . . . . . Generic representation of command timing . . . Frame delay time (FDT). . . . . . . . . . . . . . . . . READ command outline. . . . . . . . . . . . . . . . . WRITE command outline . . . . . . . . . . . . . . . . UFDFPN5 - Outline . . . . . . . . . . . . . . . . . . . . UFDFPN5 - Recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 . 3 . 3 17 18 18 19 21 27 28 page 35/36 ST25TN512 ST25TN01K IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2021 STMicroelectronics – All rights reserved DS13433 - Rev 3 page 36/36