ST6G3238E
Dual supply level translator for SD / MiniSD / T-Flash
with ±8 kV contact discharge ESD protection
Features
■
High speed: tPD = 4.4 ns (typ.) at TA = 85 °C
VCCB = 2.7 V; VCCA = 1.8 V
■
Low power dissipation:
ICCA = ICCB = 5 µA (max.) at TA = 85 °C
■
Balanced propagation delays: TPLH ≈ TPHL
■
Power-down protection on inputs and outputs
■
26 Ω series resistor on A side
■
EMI filter on B side
■
Integrated pull-up and pull-down resistor on B
side
■
Operating voltage range:
– VCCA (opr) = 1.4 V to VCCB
– VCCB (opr) = 1.4 V to 3.6 V
■
Latch-up performance exceeds 500 mA
(JESD17)
■
ESD protection for card side (B port, CD and
WP pins) ±8 kV, IEC 61000-4-2 ESD or contact
discharge:
HBM > ±15 kV (MIL STD 883 method 3015)
)
s
(
ct
u
d
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r
P
e
■
ESD protection for A-port:
HBM > ±2 kV (MIL STD 883 method 3015)
■
RoHS compliant for µTFBGA25 package
t
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TSSOP24
µTFBGA25
r
P
Descriptione
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The ST6G3238E is a dual supply low voltage
CMOS level translator for SD / MiniSD / T-Flash
fabricated with sub-micron silicon gate and fivelayer metal wiring C2MOS technology. Designed
for use as an interface between a 3.3 V bus and a
2.5 V or 1.8 V bus in a mixed 3.3 V/1.8 V, 3.3
V/2.5 V and 2.5 V/1.8 V supply systems, it
achieves high speed operation while maintaining
the CMOS low power dissipation. The A port is
designed to track VCCA. The B port is designed to
track VCCB.
This device is intended for two-way asynchronous
communication between data buses and the
direction of data transmission is determined by
CMD-dir / DATA0-dir / DAT123-dir inputs. The B
port interfaces with the 3 V bus, while the A port
interfaces with the 2.5 V and 1.8 V bus.
All inputs are equipped with circuits to protect
against static discharge, giving them ±2 kV (on Aside except CD and WP pins) and ±15 kV (on B
side, CD and WP pins) ESD immunity and
transient excess voltage. See the section on
integrated ESD protection and resistors for more
information.
Table 1.
Device summary
Order code
Package
Packaging
ST6G3238ETTR
TSSOP24
Tape and reel
ST6G3238ETBR
µTFBGA25
Tape and reel
August 2008
Rev 4
1/19
www.st.com
19
Contents
ST6G3238E
Contents
1
Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Pin connection and function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3
Summary description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4
Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
5
DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
6
I/O and test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
7
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
8
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
9
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
)
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2/19
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ST6G3238E
Logic diagram
1
Logic diagram
Figure 1.
Block diagram
VCCB
R9
R10
R11
R12
B-SIDE
A-SIDE
CMD-dir
R2
CMD
CMD.h
)
s
(
ct
DATA0-dir
R3
DAT0.h
DAT0
DAT123-dir
u
d
o
R4
DAT1
DAT1.h
R5
DAT2.h
R6
e
t
e
ol
DAT3.h
CLK.h
DAT2
DAT3
R1
VCCA
R13
R14
WP
CD
)
(s
CLK
s
b
O
R7
CLK-f
GND
t
c
u
d
o
r
GND
Table 2.
Pr
P
e
V
Integrated ESD protection and resistor on B side
t
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l
o
Resistors
Value
R1, R2, R3, R4, R5, R6
40 Ω
Vbr min.
14 V @ 1 mA
Tolerance
±20%
Line capacitance
< 20 pF
R10, R11, R12
70 kΩ
R9
15 kΩ
R7
470 kΩ
Tolerance
±30%
s
b
O
Table 3.
Bi-directional Zener diodes
Integrated pull-up resistors on WP and CD pins on A side
Resistors
Value
R13
100 kΩ
R14
100 kΩ
Tolerance
±30%
3/19
Pin connection and function
ST6G3238E
2
Pin connection and function
Figure 2.
Pin connection (top through view for µTFBGA25 and TSSOP24)
1
2
3
4
5
A
B
C
DAT0-dir
1
24
VCCB
VCCA
2
23
CD
CMD-dir
3
22
CMD
CMD.h
4
21
DAT0
DAT1
DAT0.h
5
20
D
DAT1.h
6
19
E
DAT2.h
7
18
DAT3.h
8
CLK-f
9
µTFBGA25
e
t
e
ol
12
13
NC
s
b
O
NC
DAT2
NC
VCCA
VCCB
DAT3
CLK.h
NC
GND
GND
CLK
D
DAT0.h
CMD.h
CD
CMD
DAT0
E
DAT1.h
CLK-f
DAT12
3-dir
WP
DAT1
B
DAT3.h
du
o
r
P
DAT123-dir
GND
DAT0.
dir
DAT2.h
15
14
CMDdir
A
WP
11
5
3
16
GND
4
2
so
b
O
)-
Pr
CLK
10
s
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c
1
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17
DAT3
CLK.h
NC
C
u
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)
s
(
ct
DAT2
TSSOP24
µTFBGA25
2.1
4/19
Pin function
●
CMD: Command is a bi-directional line. The host and card drivers operate in push-pull
mode.
●
DAT0-3: Data lines are bi-directional lines. The host and the card drivers operate in
push-pull mode.
ST6G3238E
Pin connection and function
●
CLK: Clock is a host-to-card signal. CLK operates in push-pull mode.
●
Feedback (return) Clock is a feedback clock signal from the level shifter to host for
controlling delays.
●
CD: Card detect pulls HIGH state of input to VCCA. This pin is protected against ESD
up to 8 kV contact.
●
WP: Write protect pulls HIGH state of input to VCCA. This pin is protected against ESD
up to 8 kV contact.
Table 4.
Pin description
μTFBGA pin n°
TSSOP pin n°
Type
Side
Symbol
A2
3
I
A side
CMD-dir
D2
4
I/O
A side
CMD.h
D4
22
I/O
B side
CMD
A3
1
I
A side
r
P
e
D1
5
I/O
A side
DAT0.h
Data input / output
D5
21
I/O
B side
DAT0
Data input / output
E3
15
I
A side
DAT123-dir
I/O
A side
DAT1.h
Data input / output
7
I/O
A side
DAT2.h
Data input / output
8
I/O
A side
DAT3.h
Data input / output
20
I/O
B side
DAT1
Data input / output
A5
19
I/O
B side
DAT2
Data input / output
B5
18
I/O
B side
DAT3
Data input / output
C1
10
I
A side
CLK.h
Clock input
C5
17
O
B side
CLK
E2
9
O
A side
CLK-f
D3
23
-
A side
CD
Card detect
E4
16
-
A side
WP
Write protect
B3
2
-
A side
VCCA
Power supply
B4
24
-
B side
VCCB
Power supply
C3, C4
11, 14
-
-
GND
Ground (0 V)
A4, B2, C2
12, 13
-
-
NC
ct
E1
6
du
A1
ro
B1
P
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E5
let
O
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)
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DAT0-dir
Name and function
Command direction
HIGH = A to B
LOW = B to A
)
s
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ct
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o
A-side command
B-side command
Data direction
HIGH = A to B (write)
LOW = B to A (read)
Data direction
HIGH = A to B (write)
LOW = B to A (read)
Clock output
Clock feedback
No connect
5/19
Summary description
ST6G3238E
3
Summary description
Table 5.
Truth table
Function
CMD-dir DAT0-dir DAT123-dir
CMD.h
CMD
DAT0.h
DAT0
DAT1.h
DAT1
DAT2.h
DAT2
DAT3.h
DAT3
H
X
X
INPUT
OUTPUT
X
X
X
X
B=A
L
X
X
OUTPUT
INPUT
X
X
X
X
A=B
X
H
X
X
X
INPUT
OUTPUT
X
X
X
L
X
X
X
OUTPUT
INPUT
X
X
X
H
X
X
X
X
INPUT
X
X
L
X
X
X
X
OUTPUT
c
u
d
Note:
e
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ol
X = Don't care; Z = High impedance
)
(s
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s
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6/19
Output
s
b
O
o
r
P
X
)
s
(
t
B=A
A=B
OUTPUT
B=A
INPUT
A=B
ST6G3238E
4
Maximum rating
Maximum rating
Stressing the device above the rating listed in the “Absolute Maximum Ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to Absolute Maximum Rating conditions for
extended periods may affect device reliability. Refer also to the STMicroelectronics SURE
Program and other relevant quality documents.
Table 6.
Absolute maximum ratings
Symbol
Parameter
-0.5 to 4.6
VCCB
Supply voltage
-0.5 to 4.6
DC input voltage
-0.5 to 4.6
VI/OA
DC I/O voltage (output disabled)
-0.5 to 4.6
V
VI/OB
DC I/O voltage (output disabled)
-0.5 to 4.6
V
VI/OA
DC output voltage
-0.5 to VCCA + 0.5
V
VI/OB
DC output voltage
-0.5 to VCCB + 0.5
V
-20
mA
u
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e
t
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ol
s
b
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Pr
V
V
V
IIK
DC input diode current
IOK
DC output diode current
-50
mA
IOA
DC output current
±50
mA
DC output current
±50
mA
DC VCC or ground current
±100
mA
DC VCC or ground current
±100
mA
Power dissipation
400
mW
-65 to +150
°C
260
°C
)
(s
t
c
u
ICCA
ICCB
od
Pr
PD
O
)
s
(
ct
Supply voltage
IOB
bs
Unit
VCCA
VI
e
t
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ol
Value
Tstg
TL
Table 7.
Storage temperature
Lead temperature (10 sec.)
Recommended operating conditions
Symbol
Parameter
Value
Unit
VCCA
Supply voltage
1.4 to VCCB
V
VCCB
Supply voltage
1.4 to 3.6
V
Input voltage (CMD-dir/DAT0-dir/DAT123-dir)
0 to VCCA
V
VI/OA
VI
I/O voltage
0 to VCCA
V
VI/OB
I/O voltage
0 to VCCB
V
-40 to +85
°C
0 to 10
ns/V
Top
dt/dv
Operating temperature
Input rise and fall time
(1)
1. VIN from 0.8 V to 2.0 V at VCC = 3.0 V
7/19
DC and AC parameters
ST6G3238E
5
DC and AC parameters
Table 8.
DC specification
Test conditions
Symbol
Parameter
VCCA
(V)
Value
TA = 25 °C
VCCB
(V)
Min.
1.4-1.95
VIH
High level input
(A port) voltage
VCCA to
1.95-2.7
3.6
2.7-3.6
Max.
0.65VCCA
1.7
1.7
2.0
2.0
0.35VCCA
VCCA to
3.6
1.95-2.7
1.4 to
VCCB
0.8
1.4-1.95
0.65VCCB
1.95-2.7
1.7
2.7-3.6
2.0
1.4-1.95
VIL
Low level input
(B port) voltage
1.4 to
VCCB
1.95-2.7
)-
2.7-3.6
1.4-3.6
t
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o
VOL
Low level output
(A port) voltage
bs
O
VOH
High level output
(B port) voltage
8/19
)
s
(
ct
du
o
r
P
0.7
1.7
V
2.0
0.35VCCB
0.35VCCB
0.7
0.7
0.8
0.8
IOH = -100µA
VCCA-0.1
VCCA-0.1
1.20
1.20
1.65
IOH = -2 mA
1.40
1.40
2.3
2.3
IOH = -4 mA
1.90
1.90
3
3
IOH = -8 mA
2.45
2.45
1.4-3.6
1.4-3.6
IOL = 100µA
0.10
0.10
1.4
1.4
IOL = 1 mA
0.20
0.20
1.65
1.65
IOL = 2 mA
0.25
0.25
2.3
2.3
IOL = 4 mA
0.40
0.40
3
3
IOL = 8 mA
0.55
0.55
1.4-3.6
1.4-3.6
IOH = -100µA
VCCA-0.2
VCCA-0.2
1.4
1.4
IOH = -1 mA
1.05
1.05
1.65
1.65
IOH = -4 mA
1.20
1.20
2.3
2.3
IOH = -6 mA
1.75
1.75
3
3
IOH = -8 mA
2.30
2.30
du
1.65
1.4
V
0.8
IOH = -1 mA
ro
P
e
V
s
(
t
c
1.4
VOH
High level output
(A port) voltage
1.4-3.6
s
b
O
Max.
0.65VCCB
ete
ol
Unit
0.35VCCA
0.7
2.7-3.6
VIH
High level input
(B port) voltage
Min.
0.65VCCA
1.4-1.95
VIL
Low level input
(A port) voltage
-40 to 85 °C
V
V
V
V
ST6G3238E
Table 8.
DC and AC parameters
DC specification (continued)
Test conditions
Symbol
Parameter
VOL
Low level output
(B port) voltage
Input leakage
current for A side
IIA
VCCA
(V)
VCCB
(V)
1.4-3.6
1.4-3.6
1.4
Value
TA = 25 °C
Min.
Max.
Input leakage
current for B side
0.20
1.4
IOL = 1 mA
0.35
0.35
1.65
1.65
IOL = 4 mA
0.45
0.45
2.3
2.3
IOL = 6 mA
0.55
0.55
3
3
IOL = 8 mA
0.70
0.70
1.8
2.9
VIA=VCC or
GND
DIR=HIGH
VCD=VWP=V
1.8
2.9
1.65
3.6
VCLK.h=VCCA
VCMD= VCCB
VDAT0,DAT1,D
AT2=VCCB
VDAT3=GND
DIR=LOW
VCD=VWP=V
±5
µA
±0.5
±5
µA
)
(s
ICCA
d
o
r
P
e
ICCB
s
b
O
t
e
l
o
IWP
ICD
Quiescent
supply current
for B side
t
c
u
1.8
1.8
2.5
2.6
0.5
5
µA
0.5
5
µA
e
t
e
ol
s
b
O
VIA=VCCA or
GND
VCD=VWP=V
V
)
s
(
ct
du
±0.5
Unit
Max.
0.20
CCA
Quiescent
supply current
for A side
Min.
IOL = 100 µA
CCA
IIB
-40 to 85 °C
o
r
P
CCA
3.6
3.6
DIR=HIGH
1.65
3.6
1.8
2.5
1.8
3.6
3.6
3.6
VCLK.h=VCCA
or GND
VIB=OPEN
DIR=LOW
VCD=VWP=V
CCA
WP pin input
leakage current
CD pin input
leakage current
1.8
1.8
3.0
VIA=VCCA or
GND
DIR=HIGH
VWP=GND
36
µA
3.0
VIA=VCCA or
GND
DIR=HIGH
VCD=GND
36
µA
9/19
DC and AC parameters
ST6G3238E
AC electrical characteristics (f = 1 MHz, 50% duty cycle, CL = 30 pF, RL = 500 Ω)
Table 9.
Test condition TA = -40 to 85 °C
Symbol
VCCA = 1.8 ±
0.15V
Parameter
VCCB=2.5 ± 0.2V
VCCA=1.8 ± 0.15V VCCA=2.5 ± 0.2V
VCCB=2.7 ± 0.3V
Unit
VCCB=2.7 ± 0.3V
Min.
Max.
Min.
Max.
Min.
Max.
tPLH tPHL
Propagation delay time An to Bn
1.0
7.2
1.0
6.6
1.0
6.1
tPLH tPHL
Propagation delay time Bn to An
1.0
8.1
1.0
7.5
1.0
5.0
ns
tOSLH tOSHL Output to output skew time (1)(2)
0.5
0.5
0.5
ns
tCDLH tCDHL Clock and data skew time
0.5
0.5
0.5
ns
Clock
fmax
Data
From A to B
52
52
52
From B to A
52
52
52
From A to B
52
52
From B to A
52
52
)
s
(
ct
MHz
u
d
o
52
r
P
e
Mbps
52
1. Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the
same device switching in the same direction, either HIGH or LOW (tOSLH = | tPLHm = tPLHn |, tOSHL = | tPHLm – tPHLn |)
t
e
l
o
2. Parameter guaranteed by design.
Output slew rate (f = 1 MHz, 50% duty cycle, CL=15 pF, RL=500 Ω)
Table 10.
Symbol
Parameter
c
u
d
tr
Rise time
tf
Fall time
Table 11.
-O
From
)
s
(
t
o
r
P
bs
Test condition TA = -40 to 85 °C
VCCA = 1.8V ± 0.15V
To
Unit
VCCB = 3V ± 0.3V
Min.
Max.
10%
90%
3
ns
90%
10%
3
ns
Capacitance characteristics
e
t
e
l
Symbol
Parameter
Test condition
VCCB
(V)
VCCA
(V)
Value
TA = 25 °C
Unit
-40 to 85 °C
o
s
b
Input capacitance
open
open
9
pF
CI/OA
Input/output
capacitance for
A-side
3.3
2.5
17
pF
CI/OB
Input/output
capacitance for
B-side
3.3
2.5
33
pF
CPD(1)
Power dissipation
capacitance
3.3
2.5
3.3
1.8
O
CINB
Min.
f = 10 MHz
Typ.
Max.
Min.
29
29
Max.
pF
1. CPD is defined as the value of the IC's internal equivalent capacitance which is calculated from the operating current
consumption without load. (Refer to Test Circuit). Average current can be obtained by the following equation. ICC(opr) - CPD
x VCC x fIN + ICC/16 (per circuit)
Note:
10/19
VIA = Input I/Os including CLK.h, CMD.h, DAT0.h, DAT1.h, DAT2.h, DAT3.h
VIB = Input I/Os including CMD, DAT0, DAT1, DAT2, DAT3
ST6G3238E
I/O and test circuit
6
I/O and test circuit
Figure 3.
Input and output equivalent circuit
)
s
(
ct
u
d
o
Figure 4.
r
P
e
t
e
l
o
Test circuit
)
(s
s
b
O
t
c
u
d
o
r
P
e
t
e
l
o
s
b
O
Table 12.
Test values
Test
tPLH, tPHL
tPZL, tPLZ (VCC = 3.0 to 3.6 V)
Switch
Open
6V
tPZL, tPLZ (VCC = 2.3 to 2.7 V or VCC = 1.6 to 1.95 V)
2 VCC
tPZH, tPHZ
GND
11/19
Waveforms
ST6G3238E
7
Waveforms
Figure 5.
Waveform - propagation delay (f = 1 MHz, 50% duty cycle)
)
s
(
ct
u
d
o
r
P
e
t
e
l
o
Table 13.
r
P
e
Note:
1.65 to 1.95 V
VCC
VCC
VCC
1.5 V
VCC/2
VCC/2
VX
VOL+0.3 V
VOL+0.15 V
VOL+0.15 V
VY
VOL-0.3 V
VOL-0.15 V
VOL-0.15 V
VM
CL = 15 pF for output slew rate measurement
RL = R1 = 500Ω or equivalent
RT = ZOUT of pulse generator (typically 50Ω)
12/19
VCC
2.3 to 2.7 V
let
o
s
b
od
3.0 to 3.6 V
VIH
O
t
c
u
Waveform symbol value
Symbol
)
(s
s
b
O
ST6G3238E
8
Package mechanical data
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect. The category of
second Level Interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com.
Table 14.
µTFBGA25 mechanical data
Dimension (mm)
Dimension (inch)
)
s
(
ct
Dim Ref
A
Min.
Typ.
Max
Min.
Typ.
1.0
1.10
1.16
0.039
0.043
A1
u
d
o
0.25
A2
0.78
b
0.25
D
2.90
0.86
0.031
0.30
0.35
0.010
3.0
3.10
0.114
D1
so
2.0
E
2.90
3.0
E1
2.0
e
0.50
SE
0.25
b
O
3.10
s
(
t
c
)-
e
t
e
l
0.114
Pr
Max
0.046
0.010
0.034
0.012
0.014
0.118
0.122
0.079
0.118
0.122
0.079
0.020
0.010
u
d
o
r
P
e
t
e
l
o
s
b
O
13/19
Package mechanical data
Figure 6.
ST6G3238E
Package dimensions
)
s
(
ct
u
d
o
r
P
e
t
e
l
o
Table 15.
)
(s
s
b
O
t
c
u
µTFBGA25 tape and reel information
od
Dimension (mm)
Dim Ref
Pr
Min.
e
t
e
ol
Typ.
A
bs
O
Max
Min.
Typ.
330
13.2
Max
12.992
C
12.8
D
20.2
0.795
N
60
2.362
T
14/19
Dimension (inch)
0.504
0.519
14.4
0.567
Ao
3.3
0.130
Bo
3.3
0.130
Ko
1.60
0.063
Po
3.9
4.1
0.153
0.161
P
7.9
8.1
0.311
0.319
ST6G3238E
Figure 7.
Package mechanical data
Reel dimension
)
s
(
ct
u
d
o
r
P
e
t
e
l
o
)
(s
s
b
O
t
c
u
Table 16.
P
e
TSSOP24 mechanical data
t
e
l
o
Dim Ref
s
b
O
d
o
r
Min.
Dimension (mm)
Typ.
A
A1
Dimension (inch)
Max
Min.
Typ.
1.10
0.05
A2
Max
0.043
0.15
0.002
0.90
0.006
0.035
b
0.19
0.30
0.007
0.012
C
0.09
0.20
0.004
0.008
D
7.70
790
0.303
31.102
E
4.3
4.50
0.169
e
0.65
0.177
0.026
H
6.25
6.50
0.246
0.256
L
0.50
0.70
0.020
0.028
K
0º
8º
0º
8º
15/19
Package mechanical data
Figure 8.
ST6G3238E
Package dimensions
)
s
(
ct
u
d
o
r
P
e
t
e
l
o
s
b
O
)
(s
t
c
u
d
o
r
t
e
l
o
P
e
Table 17.
s
b
O
TSSOP24 tape and reel information
Dimension (mm)
Dimension (inch)
Dim Ref
Min.
A
Max
Min.
330
C
12.8
D
20.2
N
60
T
16/19
Typ.
13.2
Typ.
Max
12.992
0.504
0.519
0.795
2.362
22.4
0.882
Ao
6.8
7
0.268
0.276
Bo
8.2
8.4
0.323
0.331
Ko
1.7
1.9
0.067
0.075
Po
3.9
4.1
0.153
0.161
P
11.9
12.1
0.468
0.476
ST6G3238E
Figure 9.
Package mechanical data
Reel dimension
)
s
(
ct
u
d
o
r
P
e
t
e
l
o
)
(s
s
b
O
t
c
u
d
o
r
P
e
t
e
l
o
s
b
O
17/19
Revision history
9
ST6G3238E
Revision history
Table 18.
Document revision history
Date
Revision
10-Feb-2006
1
First Release
23-Feb-2006
2
New Template
16-Aug-2006
3
Values updated in Table 8: DC specification on page 8
4
Changed title of Table 1 to Device summary, and modified column
titles.
Changed the CL value to 15 pF and modified rise and fall time from/to
percentages in Table 10 on page 10.
Modified the CL value and text in the Note: on page 12.
Changed title of Table 18 to Document revision history.
Minor text changes throughout the document.
04-Aug-2008
Changes
)
s
(
ct
u
d
o
r
P
e
t
e
l
o
)
(s
t
c
u
d
o
r
P
e
t
e
l
o
s
b
O
18/19
s
b
O
ST6G3238E
)
s
(
ct
Please Read Carefully:
u
d
o
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(s
s
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Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void
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b
O
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19/19