STA516BETR

STA516BE Datasheet 500 W FFX digital amplifier power stage Features • PowerSO-36 with exposed pad up • • • • • • • • • Output Power at 56 V supply voltage – 2 x 250 W at 10% THD + N into 6 Ω BTL – 2 x 200 W at 10% THD + N into 8 Ω BTL – 4 x 130 W at 10% THD + N into 3 Ω SE – 4 x 100 W at 10% THD + N into 4 Ω SE – 1 x 480 W at 10% THD + N into 3 Ω PBTL – 1 x 380 W at 10% THD + N into 2 Ω PBTL Output Power at 52 V supply voltage – 2 x 200 W at 10% THD + N into 6 Ω BTL – 4 x 100 W at 10% THD + N into 3 Ω SE – 1 x 400 W at 10% THD + N into 2 Ω PBTL < 0.1% THD + N at 1 W PSO-36 thermally enhanced package Minimum input / output pulse width distortion High efficiency power stage (> 90%) with 190 mΩ RdsON CMOS compatible logic inputs Integrated self protection circuits including overtemperature, undervoltage, overvoltage, overload, short-circuit EMI compliant when used with recommended system design Automatic recovery mode after fault conditions Maturity status link Applications STA516BE Device summary Order code STA516BETR Operating temperature range 0 to 90 °C Package PowerSO-36 (EPU) Packing Tape and reel • • • Home theater DVD receiver Mini / Micro Audio systems Description The STA516BE is a monolithic quad half-bridge stage in multipower BCD technology. The device can be used as dual-bridge or reconfigured, by connecting pin CONFIG to pins VDD, as a single-bridge with double-current capability or as a half-bridge (binary mode) with half-current capability. A cost-effective, high fidelity audio system can be designed using ST chipset, including a modulator (e.g. the STA309A or STA321) and the STA516BE. This system only requires a simple passive LC demodulation filter to deliver high-quality, high efficiency audio amplification with prove EMI compliance. The efficiency of this digital amplifier is greater than 90% into 8 Ω speakers, enabling the use of smaller power supplies and heatsinks. The STA516BE has an innovative integrated protection system, safeguarding the device against different fault conditions that could damage the overall system. DS10283 - Rev 3 - November 2020 For further information contact your local STMicroelectronics sales office. www.st.com STA516BE General information 1 General information The STA516BE is a second generation, high performance, integrated stereo digital amplifier power stage with improved protection system. It is capable of driving a 6 W bridge tied load (BTL) at up 250 W per channel with very low noise at the output, low THD+N and low idle power dissipation. The STA516BE is available in PowerSO-36 slug up package. The package contains a heat slug that is located on the top side of the device for convenient thermal coupling to the heatsink. DS10283 - Rev 3 page 2/23 STA516BE Pin description 2 Pin description Figure 1. Pin out (top view) VCC_SIGN VCC_SIGN VSS VSS IN2B IN2A IN1B IN1A TH_WARN FAULT TRISTATE PWRDN CONFIG VL VDD VDD GND_REG GND_CLEAN 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 STA516BE SUB_GND OUT2B OUT2B VCC2B GND2B GND2A VCC2A OUT2A OUT2A OUT1B OUT1B VCC1B GND1B GND1A VCC1A OUT1A OUT1A N.C. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 Table 1. Pin function DS10283 - Rev 3 Pin Name Type 1 GND_SUB PWR 2, 3 OUT2B O 4 VCC2B PWR Positive supply 5 GND2B PWR Negative supply 6 GND2A PWR Negative supply 7 VCC2A PWR Positive supply 8, 9 OUT2A O 10, 11 OUT1B O 12 VCC1B PWR Positive supply 13 GND1B PWR Negative supply 14 GND1A PWR Negative supply 15 VCC1A PWR Positive supply 16, 17 OUT1A O Output half bridge 1A 18 N.C. - No internal connection 19 GND_CLEAN PWR Logical ground 20 GND_REG PWR Ground for regulator VDD 21, 22 VDD PWR 5-V regulator referred to ground 23 VL PWR High logical state setting voltage, VL Description Substrate ground Output half bridge 2B Output half bridge 2A Output half bridge 1B page 3/23 STA516BE Pin description Pin Name Type Description Configuration pin: 24 CONFIG I 0: normal operation 1: bridges in parallel (OUT1A = OUT1B, OUT2A = OUT2B (If IN1A = IN1B, IN2A = IN2B)) Standby pin: 25 PWRDN I 0: low-power mode 1: normal operation Hi-Z pin: 26 TRISTATE I 0: all power amplifier outputs in high impedance state 1: normal operation Fault pin advisor (open-drain device, needs pull-up resistor): 27 FAULT O 0: fault detected (short circuit or thermal, for example) 1: normal operation Thermal warning advisor (open-drain device, needs pull-up resistor): 28 TH_WARN O 0: temperature of the IC >130 °C 1: normal operation DS10283 - Rev 3 29 IN1A I Input of half bridge 1A 30 IN1B I Input of half bridge 1B 31 IN2A I Input of half bridge 2A 32 IN2B I Input of half bridge 2B 33, 34 VSS PWR 5-V regulator referred to +VCC 35, 36 VCC_SIGN PWR Signal positive supply page 4/23 STA516BE Electrical characteristics 3 Electrical characteristics Table 2. Absolute maximum ratings Symbol VCC_MAX Vmax Tj_MAX Tstg Caution: Parameter Value Unit DC supply voltage (pins 4, 7, 12, 15) 65 V Maximum voltage on pins 23 to 32 5.5 V 0 to 150 °C -40 to 150 °C Operating junction temperature Storage temperature Stresses beyond those listed under “Absolute maximum ratings” make cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “Recommended operating condition” are not implied. Exposure to absolute-maximumrated conditions for extended periods may affect device reliability. In the real application, power supply with nominal value rated inside recommended operating conditions, may experience some rising beyond the maximum operating condition for short time when no or very low current is sinked (amplifier in mute state). In this case the reliability of the device is guaranteed, provided that the absolute maximum rating is not exceeded. Table 3. Thermal data Symbol Parameter Min. Typ. Max. Unit Tj-case Thermal resistance junction to case (thermal pad) - 1 2.5 °C/W Twarn Thermal warning temperature - 130 - °C TjSD Thermal shut-down junction temperature - 150 - °C thSD Thermal shut-down hysteresis - 25 - °C Min. Typ. Max. Unit Table 4. Recommended operating conditions Symbol DS10283 - Rev 3 Parameter VCC Supply voltage for pins PVCCA, PVCCB 10 - 60 V Tamb Ambient operating temperature 0 - 90 °C page 5/23 STA516BE Electrical characteristics Unless otherwise stated, the test conditions for Table 5. Electrical characteristics below are VL = 3.3 V, VCC = 50 V and Tamb = 25 °C Table 5. Electrical characteristics Symbol Parameter Test conditions Min. Typ. Max. Unit Power P-channel/Nchannel MOSFET RdsON Idd = 1 A - 190 240 mΩ Idss Power P-channel/Nchannel leakage Idss - - - 50 µA gN Power P-channel RdsON matching Idd = 1 A 95 - - % gP Power N-channel RdsON matching Idd = 1 A 95 - - % Low current dead time (static) see Figure 2. Test circuit - 10 20 ns - - 50 ns RdsON Dt_s L = 22 µH, C = 470 nF RL = 8 Ω, High current dead time (dynamic) Idd = 4.5 A td ON Turn-on delay time Resistive load - - 100 ns td OFF Turn-off delay time Resistive load - - 100 ns - - 25 ns - - 25 ns Dt_d tr Rise time tf Fall time see Figure 3. Current dead-time test circuit Resistive load see Figure 2. Test circuit Resistive load see Figure 2. Test circuit VIN-High High level input voltage - - - VL / 2 + 300 mV V VIN-Low Low level input voltage - VL / 2 300 mV - - V IIN-H High level input current VIN = VL - 1 - µA IIN-L Low level input current VIN = 0.3 V - 1 - µA IPWRDN-H High level PWRDN pin input current VL = 3.3 V - 35 - µA VL = 3.3 V 0.8 - Low logical state voltage VLow (pins PWRDN, TRISTATE) (see Table 6. Threshold switching voltage variation with voltage on pin VL) V High logical state voltage VHigh IVCC-PWRDN DS10283 - Rev 3 (pins PWRDN, TRISTATE) (see Table 6. Threshold switching voltage variation with voltage on pin VL) Supply current from VCC in power down VL = 3.3 V VPWRDN = 0 V - - 1.7 V - 2.4 mA page 6/23 STA516BE Electrical characteristics Symbol Parameter Test conditions Min. Typ. Max. Unit Vpin = 3.3 V - 1 - mA VTRISTATE = 0 V - 22 - mA - 70 - mA Output current on pins IFAULT FAULT, TH_WARN with fault condition Supply current from VCC in tristate IVCC-HiZ IVCC Input pulse width = 50% duty, Supply current from VCC in operation, both channels switching frequency = 384 kHz, switching) no LC filters IOCP Overcurrent protection threshold Isc (short-circuit current limit) (1) - 8.5 9.5 11 A VUVP Undervoltage protection threshold - - 7 - V VOVP Overvoltage protection threshold - 61 62.5 tpw_min Output minimum pulse width No load 50 - V 110 ns 1. See specific application note number: AN1994 Table 6. Threshold switching voltage variation with voltage on pin VL Voltage on pin VL, VL VLOW max. VHIGH min. Unit 2.7 1.05 1.65 V 3.3 1.4 1.95 V 5.0 2.2 2.8 V Table 7. Logic truth table Pin TRISTATE DS10283 - Rev 3 Inputs as per Figure 3. Current dead-time test circuit Transistors as per Figure 3. Current dead-time test circuit Output mode INxA INxB Q1 Q2 Q3 Q4 0 x x Off Off Off Off Hi Z 1 0 0 Off Off On On Dump 1 0 1 Off On On Off Negative 1 1 0 On Off Off On Positive 1 1 1 On On Off Off Not used page 7/23 STA516BE Test circuits 3.1 Test circuits Figure 2. Test circuit OUTxY Vcc (3/4)Vcc Low current dead time = MAX(DTr, DTf) (1/2)Vcc (1/4)Vcc +Vcc t DTr Duty cycle = 50% DTf M58 R 8W OUTxY INxY M57 V67 = vdc = Vcc/2 + - gnd Figure 3. Current dead-time test circuit High Current Dead time for Bridge application = ABS(DTout(A)-DTin(A))+ABS(DTOUT(B)-DTin(B)) +VCC Duty cycle=A Duty cycle=B DTout(A) M58 DTin(A) Q1 Q2 Rload=88 OUTxA INxA Iout=4.5A M57 Q3 DTout(B) L67 22 C69 470nF L68 22 C71 470nF DTin(B) OUTxB INxB Iout=4.5A C70 470nF Duty cycle A and B: Fixed to have DC output current of 4.5A in the direction shown in figure DS10283 - Rev 3 M64 Q4 M63 D00AU1162 page 8/23 STA516BE Power supply and control sequencing 4 Power supply and control sequencing To guarantee correct operation and reliability, the recommended power-on sequence as given below should be followed: • Apply VCC and VL, in any order, keeping PWRDN low in this phase • Release PWRDN from low to high, keeping TRISTATE low (until VDD and VSS are stable) • Release TRISTATE from low to high Always maintain PWM inputs INxy < VL. Figure 4. Power-ON sequence VCC should be turned on before VL. This prevents uncontrolled current flowing through the internal protection diode connected between VL (logic supply) and VCC (high power supply). which could result in damage to the device. PWRDN must be released after VL is switched on. An input signal can then be sent to the power stage. DS10283 - Rev 3 page 9/23 STA516BE Power supply and control sequencing Figure 5. Power-OFF sequence DS10283 - Rev 3 page 10/23 STA516BE Technical information 5 Technical information The STA516BE is a dual channel H-bridge that is able to deliver 200 W per channel (into RL = 6 W with THD = 10% and VCC = 51 V) of audio output power very efficiently. It operates in conjunction with a pulse-width modulator driver such as the STA321 or STA309A. The STA516BE converts ternary, phase-shift or binary-controlled PWM signals into audio power at the load. It includes a logic interface, integrated bridge drivers, high efficiency MOSFET outputs and thermal and short-circuit protection circuitry. In differential mode (ternary, phase-shift or binary differential), two logic level signals per channel are used to control high-speed MOSFET switches to connect the speaker load to the input supply or to ground in a bridge configuration, according to the damped ternary modulation operation. In binary mode, both full bridge and half bridge modes are supported. The STA516BE includes overcurrent and thermal protection as well as an undervoltage lockout with automatic recovery. A thermal warning status is also provided. Figure 6. Block diagram of full-bridge FFX® or binary mode I NL[1,2] I N R[1,2] VL PWRDN TRISTATE Logic interface and decode FAULT Protection THWARN Left H-bridge Right H-bridge OUTPL OUTNL OUTPR OUTNR Regulators Figure 7. Block diagram of binary half-bridge mode INL[1,2] INR[1,2] VL PWRDN TRISTATE FAULT Logic interface and decode Left A ½-bridge OUTP L Left B ½-bridge OUTN L Protec t ion Right A ½-bridge OUTP R Right B ½-b rid ge OUTN R THWARN Regulators 5.1 Logic interface and decode The STA516BE power outputs are controlled using one or two logic-level timing signals. In order to provide a proper logic interface, the VL input must operate at the same voltage as the FFX control logic supply. DS10283 - Rev 3 page 11/23 STA516BE Protection circuitry 5.2 Protection circuitry The STA516BE includes protection circuitry for overcurrent and thermal overload conditions. A thermal warning pin (THWARN, pin 28, open drain MOSFET) is activated low when the IC temperature exceeds 130 °C, just in advance of thermal shutdown. When a fault condition is detected an internal fault signal immediately disables the output power MOSFETs, placing both H-bridges in a high-impedance state. At the same time the opendrain MOSFET of pin FAULT (pin 27) is switched on. There are two possible modes subsequent to activating a fault. • Shutdown mode: with pins FAULT (with pull-up resistor) and TRISTATE separate, an activated fault disables the device, signaling a low at pin FAULT output. • The device may subsequently be reset to normal operation by toggling pin TRISTATE from high to low to high using an external logic signal. • Automatic recovery mode: This is shown in the applications circuits below where pins FAULT and TRISTATE are connected together to a timeconstant circuit (R59 and C58). • An activated fault forces a reset on pin TRISTATE causing normal operation to resume following a delay determined by the time constant of the circuit. • If the fault condition persists, the circuit operation repeats until the fault condition is cleared. • An increase in the time constant of the circuit produces a longer recovery interval. Care must be taken in the overall system design not to exceed the protection thresholds under normal operation. 5.3 Power outputs The STA516BE power and output pins are duplicated to provide a low-impedance path for the device bridged outputs. All duplicate power, ground and output pins must be connected for proper operation. The PWRDN or TRISTATE pin should be used to set all power MOSFETs to the highimpedance state during power-up until the logic power supply, VL, has settled. 5.4 Parallel output / high current operation When using the FFX mode output, the STA516BE outputs can be connected in parallel in order to increase the output current capability to a load. In this configuration the STA516BE can provide up to 240 W into a 3 Ω load. This mode of operation is enabled with the pin CONFIG (pin 24) connected to pin VDD. The inputs are joined so that IN1A = IN1B, IN2A = IN2B and similarly the outputs OUT1A = OUT1B, OUT2A = OUT2B as shown in Figure 8. Typical audio application circuit (dual BTL). 5.5 Output filtering A passive 2nd-order filter is used on the STA516BE power outputs to reconstruct the analog audio signal. System performance can be significantly affected by the output filter design and choice of passive components. A filter design for 6 or 8 Ω loads is shown in the application circuit of Figure 8. Typical audio application circuit (dual BTL), and for 3 or 4 Ω loads in Figure 9. Typical Mono-BTL (PBTL) configuration and Figure 10. Typical quad half-bridge configuration (Quad Single Ended). DS10283 - Rev 3 page 12/23 STA516BE Audio application circuits 6 Audio application circuits Figure 8. Typical audio application circuit (dual BTL) shows a stereo-BTL configuration capable of giving 210 W per channel into a 6 Ω load at 10% THD with VCC = 52 V. This result was obtained using the STA309A+STA516B demo board. Figure 8. Typical audio application circuit (dual BTL) +VCC VCC1A IN1A IN1A VL +3.3V CONFIG PWRDN R57 10K R59 10K 23 16 24 PWRDN 25 FAULT 27 26 TH_WAR M2 PROTECTIONS & LOGIC IN1B C53 100nF C60 100nF 28 IN1B 30 VDD 21 VDD 22 VSS 33 VSS 34 VCCSIGN IN2A GND-Reg GND-Clean IN2B GND1A 12 VCC1B REGULATORS 13 GND1B 7 VCC2A IN2B GNDSUB 31 20 M16 VCC2B OUT2B OUT2B M14 C110 100nF 5 C109 330pF C33 1 F 3 2 32 1 4 88 L113 22 H OUT2A GND2A R100 6 C99 100nF C23 470nF C101 100nF C21 100nF OUT2A 6 R98 6 L19 22 H C32 1 F 8 M15 R63 20 OUT1B OUT1B M4 9 19 C52 330pF C31 1 F 11 10 35 36 C20 100nF OUT1A 14 C55 1000 F L18 22 H OUT1A M17 VCCSIGN IN2A M5 TH_WAR C30 1 F 17 TRI-STATE C58 100nF C58 100nF M3 29 15 R104 20 R103 6 R102 6 C107 100nF C108 470nF C106 100nF 88 C111 100nF L112 22 H GND2B D00AU1148B Figure 9. Typical Mono-BTL (PBTL) configuration below shows a single-BTL configuration capable of giving 400 W into a 3 Ω load at 10% THD with VCC = 52 V. STA516BE can also drive 2 Ω speakers as single-BTL configuration, to provide up to 280 W per channel at 10% THD with VCC = 37 V. Figure 10. Typical quad half-bridge configuration (Quad Single Ended) below shows a quad-SE configuration capable of giving 110 W into a 3 Ω load at 10% THD with VCC = 54 V. STA516BE can also drive 2 Ω speakers as quad-SE configuration, to provide up to 80 W per channel at 10% THD with VCC = 38 V. All results were obtained using the STA309A+STA516B demo board. Note that a PWM modulator as driver is required to feed the STA516BE. DS10283 - Rev 3 page 13/23 STA516BE Audio application circuits Figure 9. Typical Mono-BTL (PBTL) configuration VL +3.3V GND-Clean GND-Reg 100nF X7R 10K 23 18 N.C. 12 H 100nF VDD VDD CONFIG TH_WAR TH_WAR PWRDN nPWRDN FAULT 10K IN1B IN2A IN2B IN1B VSS VSS 100nF X7R 11 10 21 22 9 24 8 28 3 25 2 15 26 IN1A IN1A 16 20 27 TRI-STATE 100nF 17 19 VCCSIGN 100nF X7R VCCSIGN Add. GNDSUB 29 12 30 7 31 OUT1A 100nF FILM OUT1A OUT1B OUT2A OUT2A 330pF 4 34 14 35 13 36 6 1 5 6.2 1/2W OUT2B 100nF X7R 680nF FILM 100nF X7R 48 100nF FILM OUT2B 12 H VCC1A +36V 1 F X7R VCC1B 2200 F 63V VCC2A +36V 1 F X7R 32 33 6.2 1/2W 228 1/2W OUT1B VCC2B GND1A GND1B GND2A GND2B D04AU1545 Figure 10. Typical quad half-bridge configuration (Quad Single Ended) +VCC VCC1P IN1A +3.3V IN1A 29 VL 23 CONFIG PWRDN R57 10K R59 10K FAULT 24 16 25 27 26 M2 PROTECTIONS & LOGIC TH_WAR IN1B C53 100nF C60 100nF 28 IN1B 30 VDD 21 VDD 22 VSS 33 VSS 34 VCCSIGN IN2A GND-Reg GND-Clean IN2B L11 22 H OUTPL OUTPL 14 PGND1P 12 VCC1N C51 1 F 11 10 REGULATORS 13 7 R41 20 C41 330pF PGND1N R51 6 C81 100nF R42 20 C72 100nF R52 6 C82 100nF IN2B GNDSUB 9 36 M15 31 20 19 M16 1 OUTPR 6 PGND2P 4 VCC2N C52 1 F 3 2 32 OUTPR 5 C43 330pF PGND2N D03AU1474 C73 100nF R53 6 C83 100nF C62 100nF OUTNR OUTNR M14 R43 20 C44 330pF R66 5K R67 5K L14 22 H R44 20 R64 5K R65 5K L13 22 H 8 35 R62 5K R63 5K L12 22 H C42 330pF VCC2P C71 100nF C61 100nF OUTNL OUTNL M4 R61 5K M17 VCCSIGN IN2A M5 TH_WAR 15 17 TRI-STATE C58 100nF C58 100nF PWRDN M3 C74 100nF R54 6 C84 100nF R68 5K C21 2200 F C31 820 F C91 1 F 48 C32 820 F C92 1 F 48 C33 820 F C93 1 F 48 C34 820 F C94 1 F 48 For more information, refer to the application note AN1994. DS10283 - Rev 3 page 14/23 STA516BE Package information 7 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. DS10283 - Rev 3 page 15/23 STA516BE PowerSO-36 exposed pad up package information 7.1 PowerSO-36 exposed pad up package information Figure 11. PowerSO-36 exposed pad up outline drawing DS10283 - Rev 3 page 16/23 STA516BE PowerSO-36 exposed pad up package information Figure 12. PowerSO-36 section A-A and B-B package outline Table 8. PowerSO-36 package mechanical data Symbol mm Min. Typ. Ɵ 0° 8° Ɵ1 5° 10° Ɵ2 0° A 3.41 A1 0.30 A2 3.10 A3 DS10283 - Rev 3 Max. 0.40 3.14 3.18 0.2 A4 0.80 1.00 b 0.22 0.41 b1 0.22 0.38 c 0.23 0.32 c1 0.23 0.25 0.29 page 17/23 STA516BE PowerSO-36 exposed pad up package information mm Symbol Min. Typ. D 15.90 BSC D1 VARIATIONS Max. D2 1.00 D3 5.00 e 0.65 BSC E 14.20 BSC E1 11.00 BSC E2 VARIATIONS E3 2.90 h 1.10 L 0.80 1.10 L1 1.60 REF L2 0.35 BSC N 36 R 0.20 R1 0.20 s 0.25 Table 9. Tolerance of form and position Symbol Databook aaa 0.10 bbb 0.30 ccc 0.075 ddd 0.25 eee 0.10 ggg 0.25 Note 1.2 Table 10. Variations Symbol DS10283 - Rev 3 Databook Min. Typ. Max. D1 9.40 9.80 E2 5.80 6.20 Opt. A page 18/23 STA516BE Revision history Table 11. Document revision history DS10283 - Rev 3 Date Revision Changes 02-Apr-2014 1 Initial release. 05-Jun-2020 2 Updated part number in device summary on the cover page. 16-Nov-2020 3 Updated Section 7.1 PowerSO-36 exposed pad up package information. page 19/23 STA516BE Contents Contents 1 General information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 3 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.1 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4 Power supply and control sequencing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 Technical information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 5.1 Logic interface and decode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 5.2 Protection circuitry. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5.3 Power outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5.4 Parallel output / high current operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5.5 Output filtering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 6 Audio application circuits. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 7 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 7.1 DFN6 (3x3) package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19 DS10283 - Rev 3 page 20/23 STA516BE List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Recommended operating conditions . . . . . . . . . . . . . . . . Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . Threshold switching voltage variation with voltage on pin VL Logic truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PowerSO-36 package mechanical data . . . . . . . . . . . . . . Tolerance of form and position . . . . . . . . . . . . . . . . . . . . . Variations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Document revision history . . . . . . . . . . . . . . . . . . . . . . . . DS10283 - Rev 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 . 5 . 5 . 5 . 6 . 7 . 7 17 18 18 19 page 21/23 STA516BE List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Pin out (top view) . . . . . . . . Test circuit . . . . . . . . . . . . . Current dead-time test circuit Power-ON sequence . . . . . . Power-OFF sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 . 8 . 8 . 9 10 Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Block diagram of full-bridge FFX® or binary mode . . . . . . . . Block diagram of binary half-bridge mode. . . . . . . . . . . . . . Typical audio application circuit (dual BTL) . . . . . . . . . . . . . Typical Mono-BTL (PBTL) configuration . . . . . . . . . . . . . . . Typical quad half-bridge configuration (Quad Single Ended) . PowerSO-36 exposed pad up outline drawing. . . . . . . . . . . PowerSO-36 section A-A and B-B package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 11 13 14 14 16 17 DS10283 - Rev 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . page 22/23 STA516BE IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2020 STMicroelectronics – All rights reserved DS10283 - Rev 3 page 23/23