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STB16N90K5

STB16N90K5

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

    TO-263(D²Pak)

  • 描述:

    N沟道900 V、280 mOhm典型值、15 A MDmesh K5功率MOSFET,D2PAK封装

  • 数据手册
  • 价格&库存
STB16N90K5 数据手册
STB16N90K5 Datasheet N-channel 900 V, 280 mΩ typ., 15 A MDmesh K5 Power MOSFET in a D²PAK package Features TAB 2 1 3 D²PAK Order code VDS RDS(on) max. ID STB16N90K5 900 V 330 mΩ 15 A • Industry’s lowest RDS(on) x area • • • • Industry’s best FoM (figure of merit) Ultra-low gate charge 100% avalanche tested Zener-protected D(2, TAB) Applications • G(1) Switching applications Description S(3) AM01475V1 This very high voltage N-channel Power MOSFET is designed using MDmesh K5 technology based on an innovative proprietary vertical structure. The result is a dramatic reduction in on-resistance and ultra-low gate charge for applications requiring superior power density and high efficiency. Product status link STB16N90K5 Product summary Order code STB16N90K5 Marking 16N90K5 Package D²PAK Packing Tape and reel DS12802 - Rev 2 - August 2019 For further information contact your local STMicroelectronics sales office. www.st.com STB16N90K5 Electrical ratings 1 Electrical ratings Table 1. Absolute maximum ratings Symbol Value Unit Gate-source voltage ±30 V ID Drain current (continuous) at TC = 25 °C 15 A ID Drain current (continuous) at TC = 100 °C 9 A Drain current (pulsed) 60 A Total power dissipation at TC = 25 °C 190 W Peak diode recovery voltage slope 4.5 MOSFET dv/dt ruggedness 50 VGS ID (1) PTOT dv/dt (2) dv/dt (3) Tj Tstg Parameter Operating junction temperature range Storage temperature range V/ns -55 to 150 °C Value Unit 1. Pulse width limited by safe operating area. 2. ISD ≤ 15 A, di/dt ≤ 100 A/μs; VDS peak ≤ V(BR)DSS, VDD= 450 V. 3. VDS ≤ 720 V. Table 2. Thermal data Symbol Parameter Rthj-case Thermal resistance junction-case 0.66 °C/W Rthj-pcb (1) Thermal resistance junction-pcb 30 °C/W Value Unit 5 A 380 mJ 1. When mounted on a 1-inch² FR-4, 2 Oz copper board. Table 3. Avalanche characteristics Symbol DS12802 - Rev 2 Parameter IAR Avalanche current, repetitive or not repetitive (pulse width limited by Tjmax) EAS Single pulse avalanche energy (starting Tj = 25 °C, ID = IAR, VDD = 50 V) page 2/20 STB16N90K5 Electrical characteristics 2 Electrical characteristics TC = 25 °C unless otherwise specified Table 4. On/off state Symbol V(BR)DSS Parameter Test conditions Drain-source breakdown voltage Min. VGS = 0 V, ID = 1 mA Typ. 900 Zero gate voltage drain current IGSS Gate-body leakage current VDS = 0 V, VGS = ±20 V VGS(th) Gate threshold voltage VDS = VGS, ID = 100 µA RDS(on) Static drain-source on-resistance VGS = 10 V, ID = 7.5 A VGS = 0 V, VDS = 900 V, TC = 125 °C Unit V VGS = 0 V, VDS = 900 V IDSS Max. 1 µA 50 µA ±10 µA 4 5 V 280 330 mΩ Min. Typ. Max. Unit - 1027 - pF - 106 - pF - 1.6 - pF - 51 - pF 141 - pF 1 4.9 9 Ω - 29.7 - nC - 7.3 - nC - 17.7 - nC (1) 3 1. Defined by design, not subject to production test. Table 5. Dynamic Symbol Parameter Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Co(er) (1) Co(tr) (2) Test conditions VDS = 100 V, f = 1 MHz, VGS = 0 V Equivalent capacitance energy related Equivalent capacitance VGS = 0 V, VDS = 0 to 720 V time related Rg Intrinsic gate resistance Qg Total gate charge Qgs Gate-source charge Qgd Gate-drain charge f = 1 MHz, ID = 0 A VDD = 720 V, ID = 15 A, VGS = 0 to 10 V (see Figure 14. Test circuit for gate charge behavior) 1. Co(er) is a constant capacitance value that gives the same stored energy as Coss while VDS is rising from 0 to 80% VDSS. 2. Co(tr) is a constant capacitance value that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS. Table 6. Switching times Symbol td(on) tr td(off) tf DS12802 - Rev 2 Parameter Test conditions Min. Typ. Max. Unit Turn-on delay time VDD= 450 V, ID = 7.5 A, - 28.8 - ns Rise time RG = 4.7 Ω, VGS = 10 V - 36 - ns Turn-off delay time (see Figure 13. Test circuit for resistive load switching times and Figure 18. Switching time waveform) - 46 - ns - 9.8 - ns Fall time page 3/20 STB16N90K5 Electrical characteristics Table 7. Source-drain diode Symbol ISD Parameter Test conditions Min. Typ. Max. Unit Source-drain current - 15 A ISDM (1) Source-drain current (pulsed) - 60 A VSD (2) Forward on voltage - 1.5 V trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current ISD = 15 A, VGS = 0 V ISD = 15 A, di/dt = 100 A/µs, VDD = 60 V (see Figure 15. Test circuit for inductive load switching and diode recovery times) - 458 ns - 8.13 µC - 35.5 A Reverse recovery time ISD = 15 A, di/dt = 100 A/µs, VDD = 60 V, - 546 ns Qrr Reverse recovery charge - 9.2 µC IRRM Reverse recovery current TJ = 150 °C (see Figure 15. Test circuit for inductive load switching and diode recovery times) - 33.7 A Min. Typ. Max. Unit 30 - - V trr 1. Pulse width limited by safe operating area 2. Pulsed: pulse duration = 300 µs, duty cycle 1.5% Table 8. Gate-source Zener diode Symbol V(BR)GSO Parameter Gate-source breakdown voltage Test conditions IGS = ±1 mA, ID = 0 A The built-in back-to-back Zener diodes are specifically designed to enhance the ESD performance of the device. The Zener voltage facilitates efficient and cost-effective device integrity protection,thus eliminating the need for additional external componentry. DS12802 - Rev 2 page 4/20 STB16N90K5 Electrical characteristics (curves) 2.1 Electrical characteristics (curves) Figure 1. Safe operating area ID (A) Figure 2. Normalized transient thermal impedance GIPG231020180827SOA K GC20540_ZTH δ=0.5 tp =1 µs 10 tp =100 µs 10 0.02 0.01 tp =10 ms Single pulse TJ≤150 °C TC=25 °C VGS=10 V single pulse 10 0 10 1 10 10 2 10 3 ID (A) -2 VDS (V) Figure 3. Typical output characteristics GIPG231020180825OCH VGS =10V 35 10-5 10-4 VGS =9V 25 10-3 10 -2 tp(s) 10 -1 Figure 4. Typical transfer characteristics ID (A) GIPG231020180826TCH VDS = 15 V 35 30 30 25 20 20 VGS =8V 15 10 15 10 VGS =7V 5 0 0 0.1 0.05 -1 tp =1 ms Operation in this area is limited by R DS(on) 10 0 10 -1 10 -1 δ=0.2 tp =10 µs 1 4 8 12 16 VGS =6V VDS (V) Figure 5. Normalized breakdown voltage vs temperature V(BR)DSS (norm.) GIPG221020181225BDV ID = 1 mA 1.10 5 0 4 5 6 7 8 9 VGS (V) Figure 6. Typical drain-source on-resistance RDS(on) (mΩ) GADG310720191006RON 310 300 1.05 VGS = 10 V 290 1.00 280 0.95 270 0.90 0.85 -75 DS12802 - Rev 2 260 -25 25 75 125 TJ (°C) 250 0 2 4 6 8 10 12 14 ID (A) page 5/20 STB16N90K5 Electrical characteristics (curves) Figure 7. Typical gate charge characteristics VDS (V) VGS (V) GADG300720191127QVG VDD = 720 V, ID = 15 A 700 12 Qg 400 Qgs 8 6 200 4 100 2 6 12 18 24 30 36 0 Qg (nC) Figure 9. Normalized threshold voltage vs temperature VGS(th) (norm.) GIPG221020181223VTH ID=250 μA 1.1 10 2 COSS 1.0 0.7 0.5 TJ (°C) Figure 11. Maximum avalanche energy vs temperature GIPG231020180827EAS Single pulse ID = 5 A VDD = 50 V 360 300 0.6 60 0.5 DS12802 - Rev 2 125 TJ (°C) GIPG231020180825SDF TJ = -50 °C 0.9 120 125 75 1.0 0.7 75 25 VSD (V) 180 25 -25 Figure 12. Typical source-drain diode characteristics 0.8 -25 VGS = 10 V 0.0 -75 240 0 -75 VDS (V) 10 2 GIPG221020181224RON 2.5 125 10 1 RDS(on) (norm.) 0.8 EAS (mJ) 10 0 Figure 10. Normalized on-resistance vs temperature 1.5 75 CRSS 10 0 10 -1 0.9 25 f = 1 MHz 10 1 2.0 -25 CISS 10 3 1.0 0.6 -75 GIPG231020180825CVR 10 Qgd 300 0 0 C (pF) 14 600 500 Figure 8. Typical capacitances vs voltage TJ (°C) 0.4 2 TJ = 25 °C TJ = 150 °C 4 6 8 10 12 14 ISD (A) page 6/20 STB16N90K5 Test circuits 3 Test circuits Figure 13. Test circuit for resistive load switching times Figure 14. Test circuit for gate charge behavior VDD RL RL 2200 + μF 3.3 μF VDD VD IG= CONST VGS + pulse width RG VGS D.U.T. 2.7 kΩ 2200 μF pulse width D.U.T. 100 Ω VG 47 kΩ 1 kΩ AM01469v10 AM01468v1 Figure 15. Test circuit for inductive load switching and diode recovery times D G A D.U.T. S 25 Ω A L A VD 100 µH fast diode B B B 3.3 µF D G + Figure 16. Unclamped inductive load test circuit RG 1000 + µF 2200 + µF VDD 3.3 µF VDD ID D.U.T. S D.U.T. Vi _ pulse width AM01471v1 AM01470v1 Figure 18. Switching time waveform Figure 17. Unclamped inductive waveform ton V(BR)DSS td(on) toff td(off) tr tf VD 90% 90% IDM VDD 10% 0 ID VDD AM01472v1 VGS 0 VDS 10% 90% 10% AM01473v1 DS12802 - Rev 2 page 7/20 STB16N90K5 Package information 4 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. DS12802 - Rev 2 page 8/20 STB16N90K5 D²PAK (TO-263) package information 4.1 D²PAK (TO-263) package information Figure 19. D²PAK (TO-263) type A package outline 0079457_26 DS12802 - Rev 2 page 9/20 STB16N90K5 D²PAK (TO-263) package information Table 9. D²PAK (TO-263) type A package mechanical data Dim. mm Min. Max. A 4.40 4.60 A1 0.03 0.23 b 0.70 0.93 b2 1.14 1.70 c 0.45 0.60 c2 1.23 1.36 D 8.95 9.35 D1 7.50 7.75 8.00 D2 1.10 1.30 1.50 E 10.00 E1 8.30 8.50 8.70 E2 6.85 7.05 7.25 e 10.40 2.54 e1 4.88 5.28 H 15.00 15.85 J1 2.49 2.69 L 2.29 2.79 L1 1.27 1.40 L2 1.30 1.75 R V2 DS12802 - Rev 2 Typ. 0.40 0° 8° page 10/20 STB16N90K5 D²PAK (TO-263) package information Figure 20. D²PAK (TO-263) type B package outline 0079457_26_B DS12802 - Rev 2 page 11/20 STB16N90K5 D²PAK (TO-263) package information Table 10. D²PAK (TO-263) type B mechanical data Dim. mm Min. Max. A 4.36 4.56 A1 0 0.25 b 0.70 0.90 b1 0.51 0.89 b2 1.17 1.37 c 0.38 0.694 c1 0.38 0.534 c2 1.19 1.34 D 8.60 9.00 D1 6.90 7.50 E 10.15 10.55 E1 8.10 8.70 e 2.54 BSC H 15.00 15.60 L 1.90 2.50 L1 1.65 L2 1.78 L3 L4 DS12802 - Rev 2 Typ. 0.25 4.78 5.28 page 12/20 STB16N90K5 D²PAK (TO-263) package information Figure 21. D²PAK (TO-263) recommended footprint (dimensions are in mm) Footprint_26 DS12802 - Rev 2 page 13/20 STB16N90K5 D²PAK packing information 4.2 D²PAK packing information Figure 22. D²PAK tape outline DS12802 - Rev 2 page 14/20 STB16N90K5 D²PAK packing information Figure 23. D²PAK reel outline T 40mm min. access hole at slot location B D C N A G measured at hub Tape slot in core for tape start 2.5mm min.width Full radius AM06038v1 Table 11. D²PAK tape and reel mechanical data Tape Dim. DS12802 - Rev 2 Reel mm mm Dim. Min. Max. Min. A0 10.5 10.7 A B0 15.7 15.9 B 1.5 D 1.5 1.6 C 12.8 D1 1.59 1.61 D 20.2 E 1.65 1.85 G 24.4 F 11.4 11.6 N 100 K0 4.8 5.0 T Max. 330 13.2 26.4 30.4 P0 3.9 4.1 P1 11.9 12.1 Base quantity 1000 P2 1.9 2.1 Bulk quantity 1000 R 50 T 0.25 0.35 W 23.7 24.3 page 15/20 STB16N90K5 D²PAK type B packing information 4.3 D²PAK type B packing information Figure 24. D²PAK type B tape outline Figure 25. D²PAK type B reel outline T 40mm min. access hole at slot location B D C N A Full radius Tape slot in core for tape start 2.5mm min.width G measured at hub AM06038v1 DS12802 - Rev 2 page 16/20 STB16N90K5 D²PAK type B packing information Table 12. D²PAK type B reel mechanical data Dim. mm Min. A DS12802 - Rev 2 330 B 1.5 C 12.8 D 20.2 G 24.4 N 100 T Max. 13.2 26.4 30.4 page 17/20 STB16N90K5 Revision history Table 13. Document revision history DS12802 - Rev 2 Date Revision 23-Oct-2018 1 05-Aug-2019 2 Changes Initial release. Updated Section 2.1 Electrical characteristics (curves). Minor text changes. page 18/20 STB16N90K5 Contents Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 2 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 4 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 4.1 D²PAK (TO-263) package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4.2 D²PAK packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.3 D²PAK type B packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18 DS12802 - Rev 2 page 19/20 STB16N90K5 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2019 STMicroelectronics – All rights reserved DS12802 - Rev 2 page 20/20
STB16N90K5 价格&库存

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STB16N90K5
  •  国内价格 香港价格
  • 1000+23.496251000+2.92386

库存:1350

STB16N90K5
  •  国内价格 香港价格
  • 1+58.665331+7.30029
  • 10+39.4533110+4.90955
  • 100+28.75961100+3.57884

库存:1350

STB16N90K5
  •  国内价格
  • 1+37.20600
  • 10+36.33120
  • 30+35.75880

库存:19