STB16NS25T4

STB16NS25 N-CHANNEL 250V - 0.23Ω - 16A D2PAK MESH OVERLAY™ MOSFET TYPE VDSS RDS(on) ID STB16NS25 250 V < 0.28 Ω 16 A ■ ■ ■ TYPICAL RDS(on) = 0.23 Ω EXTREMELY HIGH dv/dt CAPABILITY 100% AVALANCHE TESTED 3 1 DESCRIPTION Using the latest high voltage MESH OVERLAY™ process, STMicroelectronics has designed an advanced family of power MOSFETs with outstanding performance. The new patented STrip layout coupled with the Company’s proprietary edge termination structure, makes it suitable in coverters for lighting applications. ) s ( ct c u d ) s t( o r P INTERNAL SCHEMATIC DIAGRAM e t le o s b O - APPLICATIONS HIGH CURRENT, HIGH SPEED SWITCHING ■ SWITH MODE POWER SUPPLIES (SMPS) ■ DC-DC CONVERTERS FOR TELECOM, INDUSTRIAL, AND LIGHTING EQUIPMENT ■ D2PAK u d o r P e ABSOLUTE MAXIMUM RATINGS t e l o Symbol VDS s b O VDGR VGS Value Unit Drain-source Voltage (VGS = 0) Parameter 250 V Drain-gate Voltage (RGS = 20 kΩ) 250 V Gate- source Voltage ± 20 V ID Drain Current (continuos) at TC = 25°C 16 A ID Drain Current (continuos) at TC = 100°C 11 A Drain Current (pulsed) 64 A Total Dissipation at TC = 25°C 140 W Derating Factor 1 W/°C Peak Diode Recovery voltage slope 5 V/ns –65 to 175 °C 175 °C IDM (
) PTOT dv/dt (1) Tstg Tj Storage Temperature Max. Operating Junction Temperature (•)Pulse width limited by safe operating area February 2003 (1) ISD≤ 16A, di/dt≤300 A/µs, VDD≤ V(BR)DSS, Tj≤TjMAX 1/9 STB16NS25 THERMAL DATA Rthj-case Thermal Resistance Junction-case Max 0.9 °C/W Rthj-amb Thermal Resistance Junction-ambient Max 62.5 °C/W Maximum Lead Temperature For Soldering Purpose 300 °C Tl AVALANCHE CHARACTERISTICS Symbol Parameter IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) EAS Single Pulse Avalanche Energy (starting Tj = 25 °C, ID = IAR, VDD = 28 V) Max Value Unit 16 A 200 mJ ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED) OFF Symbol V(BR)DSS IDSS IGSS Parameter Test Conditions Drain-source Breakdown Voltage ID = 250 µA, VGS = 0 Zero Gate Voltage Drain Current (VGS = 0) VDS = Max Rating Gate-body Leakage Current (VDS = 0) VGS = ± 20 V Min. Parameter RDS(on) Static Drain-source On Resistance VGS = 10V, ID = 8 A ) s ( ct DYNAMIC Parameter du Forward Transconductance o r P e Ciss Input Capacitance Coss Output Capacitance t e l o Crss s b O 2/9 so Reverse Transfer Capacitance Test Conditions VDS = 25V, f = 1 MHz, VGS = 0 µA 50 µA d o r nA Min. Typ. Max. Unit 2 3 4 V 0.23 0.28 Ω Min. Typ. Max. Unit 14 15 S 1270 pF 190 pF 75 pF b O - VDS > ID(on) x RDS(on)max, ID = 8 A ) s t( ±100 P e let Test Conditions VDS = VGS, ID = 250µA gfs (1) uc VDS = Max Rating, TC = 125 °C Gate Threshold Voltage Unit V 1 VGS(th) Symbol Max. 250 ON (1) Symbol Typ. STB16NS25 ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON Symbol td(on) tr Parameter Test Conditions VDD = 125 V, ID = 8 A RG = 4.7Ω VGS = 10 V (see test circuit, Figure 3) Turn-on Delay Time Rise Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge Min. VDD = 200V, ID = 16 A, VGS = 10V Typ. Max. Unit 15 ns 25 ns 60 80 nC 8 nC 22 nC SWITCHING OFF Symbol Parameter Test Conditions Min. Typ. Max. Unit td(off) tf Turn-off- Delay Time Fall Time VDD = 125V, ID = 8 A, RG = 4.7Ω, VGS = 10V (see test circuit, Figure 3) 75 35 ns ns tr(Voff) tf tc Off-voltage Rise Time Fall Time Cross-over Time Vclamp = 200V, ID = 16 A, RG = 4.7Ω, VGS = 10V (see test circuit, Figure 5) 25 30 55 ) s t( SOURCE DRAIN DIODE Symbol ISD Parameter Test Conditions Source-drain Current e t le Source-drain Current (pulsed) VSD (1) Forward On Voltage ISD = 16 A, VGS = 0 trr Reverse Recovery Time Qrr Reverse Recovery Charge ISD = 16 A, di/dt = 100A/µs VDD = 33V, Tj = 150°C (see test circuit, Figure 5) IRRM Reverse Recovery Current ) s ( ct Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. Safe Operating Area o r P e du o r P Min. ISDM (2) c u d so b O - Typ. ns ns ns Max. Unit 16 A 64 A 1.5 V 270 ns 1.5 µC 11.5 A Thermal Impedance t e l o s b O 3/9 STB16NS25 Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance c u d e t le ) s ( ct u d o r P e Gate Charge vs Gate-source Voltage t e l o s b O 4/9 o r P o s b O - Capacitance Variations ) s t( STB16NS25 Normalized Gate Thereshold Voltage vs Temp. Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics Normalized BVDSS vs Temperature c u d e t le ) s ( ct ) s t( o r P o s b O - u d o r P e t e l o s b O 5/9 STB16NS25 Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuit For Resistive Load Fig. 4: Gate Charge test Circuit c u d e t le ) s ( ct u d o o s b O - Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times r P e t e l o s b O 6/9 o r P ) s t( STB16NS25 D2PAK MECHANICAL DATA mm. inch DIM. MIN. TYP MAX. MIN. TYP. MAX. A 4.4 4.6 0.173 0.181 A1 2.49 2.69 0.098 0.106 A2 0.03 0.23 0.001 0.009 B 0.7 0.93 0.027 0.036 B2 1.14 1.7 0.044 0.067 C 0.45 0.6 0.017 0.023 C2 1.23 1.36 0.048 0.053 D 8.95 9.35 0.352 D1 E 8 10.4 E1 0.393 8.5 4.88 5.28 L 15 15.85 L2 1.27 1.4 L3 1.4 1.75 M 2.4 ) s ( ct 0º 0.192 e t le 0.590 so b O 3.2 0.4 V2 o r P 0.334 G R c u d 0.315 10 ) s t( 0.368 0.208 0.625 0.050 0.055 0.055 0.068 0.094 0.126 0.015 4º u d o r P e t e l o 3 s b O 7/9 1 STB16NS25 D2PAK FOOTPRINT TUBE SHIPMENT (no suffix)* TAPE AND REEL SHIPMENT (suffix ”T4”)* c u d ) s t( REEL MECHANICAL DATA DIM. mm ) s ( ct TAPE MECHANICAL DATA mm DIM. MAX. MIN. 10.7 0.413 0.421 0.618 0.626 E t e l o 15.9 A0 10.5 B0 15.7 D 1.6 0.059 0.063 1.61 0.062 0.063 1.65 1.85 0.065 0.073 F 11.4 11.6 0.449 0.456 K0 4.8 5.0 0.189 0.197 P0 3.9 4.1 0.153 0.161 P1 11.9 12.1 0.468 0.476 P2 1.9 2.1 0.075 0.082 s b O 1.5 MAX. 1.59 D1 R 50 1.574 T 0.25 0.35 0.0098 0.0137 W 23.7 24.3 * on sales type 8/9 o r P e MIN. du inch 0.933 0.956 b O - MAX. MIN. 330 e t le so o r P MIN. A inch B 1.5 C 12.8 D 20.2 G 24.4 N 100 T MAX. 12.992 0.059 13.2 0.504 0.520 26.4 0.960 1.039 0795 3.937 30.4 1.197 BASE QTY BULK QTY 1000 1000 STB16NS25 c u d e t le ) s ( ct ) s t( o r P o s b O - u d o r P e t e l o Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. © The ST logo is a registered trademark of STMicroelectronics s b O © 2003 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. © http://www.st.com 9/9