STB18N60M2

STB18N60M2, STI18N60M2 STP18N60M2, STW18N60M2 Datasheet N-channel 600 V, 0.255 Ω typ., 13 A MDmesh M2 Power MOSFETs in D2PAK, I2PAK, TO-220 and TO-247 packages Features TAB TAB Order codes 1 3 1 2 RDS(on) max. STI18N60M2 STP18N60M2 2 3 1 TO-247 TO-220 2 3 Package D²PAK 650 V 0.280 Ω STW18N60M2 TAB 1 ID STB18N60M2 3 I2PAK D2PAK VDS @ TJmax • • Extremely low gate charge Excellent output capacitance (COSS) profile • • 100% avalanche tested Zener-protected 13 A I²PAK TO-220 TO-247 Application D ( 2 , TAB ) • • Switching applications LLC converters, resonant converters G( 1) Description S(3) AM15572V1 These devices are N-channel Power MOSFETs developed using the MDmesh™ M2 technology. Thanks to their strip layout and improved vertical structure, these devices exhibit low on-resistance and optimized switching characteristics, rendering them suitable for the most demanding high-efficiency converters. Product status link STB18N60M2 STI18N60M2 STP18N60M2 STW18N60M2 DS9714 - Rev 4 - November 2018 For further information contact your local STMicroelectronics sales office. www.st.com STB18N60M2, STI18N60M2, STP18N60M2, STW18N60M2 Electrical ratings 1 Electrical ratings Table 1. Absolute maximum ratings Symbol Parameter Value Unit Gate-source voltage ±25 V ID Drain current (continuous) at TC = 25 °C 13 A ID Drain current (continuous) at TC = 100 °C 8 A IDM (1) Drain current (pulsed) 52 A PTOT Total power dissipation at TC = 25 °C 110 W dv/dt (2) Peak diode recovery voltage slope 15 V/ns dv/dt (3) MOSFET dv/dt ruggedness 50 V/ns Tstg Storage temperature range - 55 to 150 °C VGS Tj Operating junction temperature range 1. Pulse width limited by safe operating area. 2. ISD ≤ 13 A, di/dt ≤ 400 A/µs; VDS peak < V(BR)DSS, VDD = 400 V. 3. VDS ≤ 480 V. Table 2. Thermal data Value Symbol Parameter D2PAK I2PAK TO-220 Rthj-case Thermal resistance junction-case 1.14 Rthj-amb Thermal resistance junction-ambient 62.5 Rthj-pcb (1) Thermal resistance junction-pcb Unit TO-247 °C/W 50 °C/W 30 °C/W 1. When mounted on 1 inch² FR-4, 2 Oz copper board. Table 3. Avalanche characteristics Symbol DS9714 - Rev 4 Parameter IAR Avalanche current, repetitive or not repetitive (pulse width limited by Tjmax) EAS Single pulse avalanche energy (starting Tj = 25°C, ID = IAR; VDD = 50 V) Value Unit 3 A 135 mJ page 2/27 STB18N60M2, STI18N60M2, STP18N60M2, STW18N60M2 Electrical characteristics 2 Electrical characteristics (TC = 25 °C unless otherwise specified). Table 4. On /off states Symbol V(BR)DSS Parameter Drain-source breakdown voltage Zero gate voltage IDSS drain current Gate-body leakage IGSS current VGS(th) RDS(on) Gate threshold voltage Static drain-source on-resistance Test conditions ID = 1 mA, VGS = 0 V Min. Typ. Max. 600 Unit V VGS = 0 V, VDS = 600 V 1 µA VGS = 0 V, VDS = 600 V, TC = 125 °C (1) 100 µA VDS = 0 V, VGS = ± 25 V ±10 µA 3 4 V 0.255 0.280 Ω Min. Typ. Max. Unit - 791 - pF - 40 - pF - 1.3 - pF - 164.5 - pF VDS = VGS, ID = 250 µA 2 VGS = 10 V, ID = 6.5 A 1. Defined by design, not subject to production test. Table 5. Dynamic Symbol Parameter Ciss Input capacitance Coss Output capacitance Crss Coss eq. Reverse transfer capacitance (1) Test conditions VDS = 100 V, f = 1 MHz, VGS = 0 V Equivalent output capacitance VDS = 0 to 480 V, VGS = 0 V RG Intrinsic gate resistance f = 1 MHz, ID = 0 V - 5.6 - Ω Qg Total gate charge VDD = 480 V, ID = 13 A, - 21.5 - nC Qgs Gate-source charge - 3.2 - nC Qgd Gate-drain charge VGS = 0 to 10 V (see Figure 14. Test circuit for gate charge behavior) - 11.3 - nC 1. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS. Table 6. Switching times Symbol td(on) tr td(off) tf DS9714 - Rev 4 Parameter Test conditions Min. Typ. Max. Unit Turn-on delay time VDD = 300 V, ID = 6.5 A, - 12 - ns Rise time RG = 4.7 Ω, VGS = 10 V - 9 - ns Turn-off delay time (see Figure 13. Test circuit for resistive load switching times and Figure 18. Switching time waveform) - 47 - ns - 10.6 - ns Fall time page 3/27 STB18N60M2, STI18N60M2, STP18N60M2, STW18N60M2 Electrical characteristics Table 7. Source drain diode Symbol ISD ISDM (1) (2) Parameter Test conditions Min. Typ. Max. Unit Source-drain current - 13 A Source-drain current (pulsed) - 52 A 1.6 V Forward on voltage ISD = 13 A, VGS = 0 V - trr Reverse recovery time ISD = 13 A, di/dt = 100 A/µs - 305 ns Qrr Reverse recovery charge - 3.3 µC IRRM Reverse recovery current VDD = 60 V (see Figure 15. Test circuit for inductive load switching and diode recovery times) - 22 A VSD trr Reverse recovery time ISD = 13 A, di/dt = 100 A/µs - 417 ns Qrr Reverse recovery charge VDD = 60 V, Tj = 150 °C - 4.6 µC IRRM Reverse recovery current (see Figure 15. Test circuit for inductive load switching and diode recovery times) - 22 A 1. Pulse width limited by safe operating area. 2. Pulsed: pulse duration = 300 μs, duty cycle 1.5%. DS9714 - Rev 4 page 4/27 STB18N60M2, STI18N60M2, STP18N60M2, STW18N60M2 Electrical characteristics curves 2.1 Electrical characteristics curves Figure 2. Thermal impedance Figure 1. Safe operating area AM15835v1 ID (A) ) 10µs S( on Op Li erati mi o ted n in by thi ma s a x R rea is D 10 1 100µs 1ms Tj=150°C Tc=25°C 10ms Single pulse 0.1 0.1 10 1 100 VDS(V) Figure 3. Output characteristics Figure 4. Transfer characteristics AM15837v1 ID (A) VGS=7, 8, 9, 10V AM15838v1 ID (A) VDS=18V 30 30 25 25 6V 20 20 15 15 10 10 5V 5 5 4V 0 0 5 15 10 20 VDS(V) Figure 5. Gate charge vs gate-source voltage AM15839v1 VDS VGS (V) VDD=480V ID=13A 12 VDS VDS 10 0 0 2 4 10 8 6 VGS(V) Figure 6. Static drain-source on-resistance (V) RDS(on) (W) 500 0.270 400 0.265 300 0.260 200 0.255 100 0.250 AM15840v1 VGS=10V 8 6 4 2 0 0 DS9714 - Rev 4 5 10 15 20 0 25 Qg(nC) 0.245 0 2 4 6 8 10 12 ID(A) page 5/27 STB18N60M2, STI18N60M2, STP18N60M2, STW18N60M2 Electrical characteristics curves Figure 8. Normalized gate threshold voltage vs temperature Figure 7. Capacitance variations AM15841v1 C (pF) V GS(th) (norm.) 1000 Ciss GIPG070815BQ6KLVTH I D = 250 µA 1.1 1.0 100 0.9 Coss 0.8 10 0.7 Crss 1 0.1 1 10 100 VDS(V) Figure 9. Normalized on-resistance vs temperature R DS(on) (norm.) GIPG070815BQ6KLRON V GS = 10 V 2.4 0.6 -75 -25 25 75 125 T j (°C) Figure 10. Source-drain diode forward characteristics AM15842v1 VSD (V) 1.4 1.2 2.0 TJ=-50°C 1 1.6 0.8 1.2 0.6 0.8 0.4 0.4 0.2 0 -75 -25 25 75 125 T j (°C) Figure 11. Normalized V(BR)DSS vs temperature V (BR)DSS (norm.) GIPG070815BQ6KLBDV I D = 1 mA 1.12 0 4 6 8 10 12 ISD(A) AM15843v1 Eoss(µJ) 6 5 1.04 4 1.00 3 0.96 2 1 0.92 DS9714 - Rev 4 2 Figure 12. Output capacitance stored energy 1.08 0.88 -75 0 TJ=25°C TJ=150°C -25 25 75 125 T j (°C) 0 0 100 200 300 400 500 600 VDS(V) page 6/27 STB18N60M2, STI18N60M2, STP18N60M2, STW18N60M2 Test circuits 3 Test circuits Figure 13. Test circuit for resistive load switching times Figure 14. Test circuit for gate charge behavior VDD 12 V 2200 + μF 3.3 μF VDD VD VGS 1 kΩ 100 nF RL IG= CONST VGS RG 47 kΩ + pulse width D.U.T. 2.7 kΩ 2200 μF pulse width D.U.T. 100 Ω VG 47 kΩ 1 kΩ AM01469v1 AM01468v1 Figure 15. Test circuit for inductive load switching and diode recovery times D G A D.U.T. S 25 Ω A L A B B 3.3 µF D G + VD 100 µH fast diode B Figure 16. Unclamped inductive load test circuit RG 1000 + µF 2200 + µF VDD 3.3 µF VDD ID D.U.T. S D.U.T. Vi _ pulse width AM01471v1 AM01470v1 Figure 18. Switching time waveform Figure 17. Unclamped inductive waveform ton V(BR)DSS td(on) VD toff td(off) tr tf 90% 90% IDM VDD 10% 0 ID VDD AM01472v1 VGS 0 VDS 10% 90% 10% AM01473v1 DS9714 - Rev 4 page 7/27 STB18N60M2, STI18N60M2, STP18N60M2, STW18N60M2 Package information 4 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. DS9714 - Rev 4 page 8/27 STB18N60M2, STI18N60M2, STP18N60M2, STW18N60M2 D²PAK (TO-263) package information 4.1 D²PAK (TO-263) package information Figure 19. D²PAK (TO-263) type A package outline 0079457_25 DS9714 - Rev 4 page 9/27 STB18N60M2, STI18N60M2, STP18N60M2, STW18N60M2 D²PAK (TO-263) package information Table 8. D²PAK (TO-263) type A package mechanical data Dim. mm Min. Max. A 4.40 4.60 A1 0.03 0.23 b 0.70 0.93 b2 1.14 1.70 c 0.45 0.60 c2 1.23 1.36 D 8.95 9.35 D1 7.50 7.75 8.00 D2 1.10 1.30 1.50 E 10.00 E1 8.30 8.50 8.70 E2 6.85 7.05 7.25 e 10.40 2.54 e1 4.88 5.28 H 15.00 15.85 J1 2.49 2.69 L 2.29 2.79 L1 1.27 1.40 L2 1.30 1.75 R V2 DS9714 - Rev 4 Typ. 0.40 0° 8° page 10/27 STB18N60M2, STI18N60M2, STP18N60M2, STW18N60M2 D²PAK (TO-263) package information Figure 20. D²PAK (TO-263) type B package outline 0079457_25_B DS9714 - Rev 4 page 11/27 STB18N60M2, STI18N60M2, STP18N60M2, STW18N60M2 D²PAK (TO-263) package information Table 9. D²PAK (TO-263) type B mechanical data Dim. mm Min. Max. A 4.36 4.56 A1 0 0.25 b 0.70 0.90 b1 0.51 0.89 b2 1.17 1.37 b3 1.36 1.46 c 0.38 0.694 c1 0.38 0.534 c2 1.19 1.34 D 8.60 9.00 D1 6.90 7.50 E 10.15 10.55 E1 8.10 8.70 e 2.54 BSC H 15.00 15.60 L 1.90 2.50 L1 1.65 L2 1.78 L3 L4 DS9714 - Rev 4 Typ. 0.25 4.78 5.28 page 12/27 STB18N60M2, STI18N60M2, STP18N60M2, STW18N60M2 D²PAK (TO-263) package information Figure 21. D²PAK (TO-263) recommended footprint (dimensions are in mm) Footprint DS9714 - Rev 4 page 13/27 STB18N60M2, STI18N60M2, STP18N60M2, STW18N60M2 D²PAK packing information 4.2 D²PAK packing information Figure 22. D²PAK tape outline DS9714 - Rev 4 page 14/27 STB18N60M2, STI18N60M2, STP18N60M2, STW18N60M2 D²PAK packing information Figure 23. D²PAK reel outline T 40mm min. access hole at slot location B D C N A G measured at hub Tape slot in core for tape start 2.5mm min.width Full radius AM06038v1 Table 10. D²PAK tape and reel mechanical data Tape Dim. DS9714 - Rev 4 Reel mm mm Dim. Min. Max. Min. A0 10.5 10.7 A B0 15.7 15.9 B 1.5 D 1.5 1.6 C 12.8 D1 1.59 1.61 D 20.2 E 1.65 1.85 G 24.4 F 11.4 11.6 N 100 K0 4.8 5.0 T Max. 330 13.2 26.4 30.4 P0 3.9 4.1 P1 11.9 12.1 Base quantity 1000 P2 1.9 2.1 Bulk quantity 1000 R 50 T 0.25 0.35 W 23.7 24.3 page 15/27 STB18N60M2, STI18N60M2, STP18N60M2, STW18N60M2 D²PAK type B packing information 4.3 D²PAK type B packing information Figure 24. D²PAK type B tape outline Figure 25. D²PAK type B reel outline T 40mm min. access hole at slot location B D C N A Full radius Tape slot in core for tape start 2.5mm min.width G measured at hub AM06038v1 DS9714 - Rev 4 page 16/27 STB18N60M2, STI18N60M2, STP18N60M2, STW18N60M2 D²PAK type B packing information Table 11. D²PAK type B reel mechanical data Dim. mm Min. A DS9714 - Rev 4 330 B 1.5 C 12.8 D 20.2 G 24.4 N 100 T Max. 13.2 26.4 30.4 page 17/27 STB18N60M2, STI18N60M2, STP18N60M2, STW18N60M2 I²PAK package information 4.4 I²PAK package information Figure 26. I²PAK package outline 0004982_Rev_H DS9714 - Rev 4 page 18/27 STB18N60M2, STI18N60M2, STP18N60M2, STW18N60M2 I²PAK package information Table 12. I²PAK package mechanical data Dim. DS9714 - Rev 4 mm Min. Typ. Max. A 4.40 - 4.60 A1 2.40 - 2.72 b 0.61 - 0.88 b1 1.14 - 1.70 c 0.49 - 0.70 c2 1.23 - 1.32 D 8.95 - 9.35 e 2.40 - 2.70 e1 4.95 - 5.15 E 10 - 10.40 L 13 - 14 L1 3.50 - 3.93 L2 1.27 - 1.40 page 19/27 STB18N60M2, STI18N60M2, STP18N60M2, STW18N60M2 TO-220 type A package information 4.5 TO-220 type A package information Figure 27. TO-220 type A package outline 0015988_typeA_Rev_22 DS9714 - Rev 4 page 20/27 STB18N60M2, STI18N60M2, STP18N60M2, STW18N60M2 TO-220 type A package information Table 13. TO-220 type A package mechanical data Dim. mm Min. Max. A 4.40 4.60 b 0.61 0.88 b1 1.14 1.55 c 0.48 0.70 D 15.25 15.75 D1 DS9714 - Rev 4 Typ. 1.27 E 10.00 10.40 e 2.40 2.70 e1 4.95 5.15 F 1.23 1.32 H1 6.20 6.60 J1 2.40 2.72 L 13.00 14.00 L1 3.50 3.93 L20 16.40 L30 28.90 øP 3.75 3.85 Q 2.65 2.95 page 21/27 STB18N60M2, STI18N60M2, STP18N60M2, STW18N60M2 TO-247 package information 4.6 TO-247 package information Figure 28. TO-247 package outline 0075325_9 DS9714 - Rev 4 page 22/27 STB18N60M2, STI18N60M2, STP18N60M2, STW18N60M2 TO-247 package information Table 14. TO-247 package mechanical data Dim. mm Min. Max. A 4.85 5.15 A1 2.20 2.60 b 1.0 1.40 b1 2.0 2.40 b2 3.0 3.40 c 0.40 0.80 D 19.85 20.15 E 15.45 15.75 e 5.30 L 14.20 14.80 L1 3.70 4.30 L2 DS9714 - Rev 4 Typ. 5.45 5.60 18.50 ØP 3.55 3.65 ØR 4.50 5.50 S 5.30 5.50 5.70 page 23/27 STB18N60M2, STI18N60M2, STP18N60M2, STW18N60M2 Ordering information 5 Ordering information Table 15. Order codes Order code Marking STB18N60M2 STI18N60M2 DS9714 - Rev 4 18N60M2 Package Packing D2PAK Tape and reel I2PAK STP18N60M2 TO-220 STW18N60M2 TO-247 Tube page 24/27 STB18N60M2, STI18N60M2, STP18N60M2, STW18N60M2 Revision history Table 16. Document revision history Date Version 05-Jun-2013 1 Changes First release. – Modified: note 1 in Table 2 28-Feb-2014 2 – Rthj-case value in Table 3 – Minor text changes Removed maturity status indication from cover page. The document status is production data. 16-Apr-2018 3 Modified the title and the description in cover page. Updated Section 4 Package information. Minor text changes. Added part number STI18N60M2 in I²PAK, document updated accordingly. 06-Nov-2018 4 Updated Section 2.1 Electrical characteristics curves and Section 4 Package information. Minor text changes. DS9714 - Rev 4 page 25/27 STB18N60M2, STI18N60M2, STP18N60M2, STW18N60M2 Contents Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 2 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2.1 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 4 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 5 4.1 D²PAK (TO-263) package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4.2 D²PAK typeA packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.3 D²PAK type B packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4.4 I²PAK package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.5 TO-220 type A package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 4.6 TO-247 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25 DS9714 - Rev 4 page 26/27 STB18N60M2, STI18N60M2, STP18N60M2, STW18N60M2 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2018 STMicroelectronics – All rights reserved DS9714 - Rev 4 page 27/27