STB23N80K5

STB23N80K5 Datasheet N-channel 800 V, 0.23 Ω typ., 16 A MDmesh K5 Power MOSFET in a D²PAK package Features TAB 2 1 3 D²PAK D(2, TAB) Order code VDS RDS(on) max. ID PTOT STB23N80K5 800 V 0.28 Ω 16 A 190 W • Industry’s lowest RDS(on) x area • • • • Industry’s best FoM (figure of merit) Ultra-low gate charge 100% avalanche tested Zener-protected Applications G(1) • S(3) NG1D2TS3Z Switching applications Description This very high voltage N-channel Power MOSFET is designed using MDmesh K5 technology based on an innovative proprietary vertical structure. The result is a dramatic reduction in on-resistance and ultra-low gate charge for applications requiring superior power density and high efficiency. Product status link STB23N80K5 Product summary Order code STB23N80K5 Marking 23N80K5 Package D²PAK Packing Tape and reel DS11240 - Rev 2 - May 2021 For further information contact your local STMicroelectronics sales office. www.st.com STB23N80K5 Electrical ratings 1 Electrical ratings Table 1. Absolute maximum ratings Symbol Value Unit Gate-source voltage ±30 V Drain current (continuous) at TC = 25 °C 16 Drain current (continuous) at TC = 100 °C 10 IDM (1) Drain current (pulsed) 64 A PTOT Total power dissipation at TC = 25 °C 190 W dv/dt (2) Peak diode recovery voltage slope 4.5 dv/dt (3) MOSFET dv/dt ruggedness 50 VGS ID Tstg TJ Parameter Storage temperature range Operating junction temperature range A V/ns -55 to 150 °C Value Unit 1. Pulse width is limited by safe operating area. 2. ISD ≤ 16 A, di/dt=100 A/μs; VDS(peak) < V(BR)DSS, VDD = 80% V(BR)DSS. 3. VDS ≤ 640 V Table 2. Thermal data Symbol RthJC (1) RthJA Parameter Thermal resistance, junction-to-ambient Thermal resistance, junction-to-board 0.66 30 °C/W 1. When mounted on 1-inch² FR-4, 2 Oz copper board. Table 3. Avalanche characteristics Symbol Parameter IAR (1) Avalanche current, repetitive or not repetitive EAS (2) Single pulse avalanche energy Value Unit 5 A 400 mJ 1. Pulse width limited by TJmax. 2. Starting TJ = 25 °C, ID = IAR, VDD = 50 V. DS11240 - Rev 2 page 2/19 STB23N80K5 Electrical characteristics 2 Electrical characteristics TC = 25 °C unless otherwise specified. Table 4. Static Symbol V(BR)DSS Parameter Test conditions Drain-source breakdown voltage Min. VGS = 0 V, ID = 1 mA Typ. 800 Zero gate voltage drain current IGSS Gate-body leakage current VDS = 0 V, VGS = ±20 V VGS(th) Gate threshold voltage VDS = VGS, ID = 100 µA RDS(on) Static drain-source on-resistance VGS = 10 V, ID = 8 A VGS = 0 V, VDS = 800 V, TC = 125 °C Unit V VGS = 0 V, VDS = 800 V IDSS Max. 1 (1) 50 µA ±10 µA 4 5 V 0.23 0.28 Ω Min. Typ. Max. Unit - 1000 - - 65 - - 1.5 - 3 1. Defined by design, not subject to production test. Table 5. Dynamic Symbol Parameter Test conditions Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance CO(tr) (1) Equivalent output capacitance VDS = 0 to 640 V, VGS = 0 V - 165 - CO(er) (2) Equivalent output capacitance VDS = 0 to 640 V, VGS = 0 V - 59 - RG Intrinsic gate resistance f = 1 MHz, ID = 0 A - 4.7 - Qg Total gate charge - 33 - Qgs Gate-source charge - 6 - Qgd Gate-drain charge - 25 - VDS = 100 V, f = 1 MHz, VGS = 0 V VDD = 640 V, ID = 16 A, VGS = 0 to 10 V (see Figure 13. Test circuit for gate charge behavior) pF pF Ω nC 1. Time related is defined as a constant equivalent capacitance giving the same charging time as COSS when VDS increases from 0 to 80% VDSS. 2. Energy related is defined as a constant equivalent capacitance giving the same stored energy as COSS when VDS increases from 0 to 80% VDSS Table 6. Switching times Symbol td(on) tr td(off) tf DS11240 - Rev 2 Parameter Test conditions Turn-on delay time Rise time Turn-off delay time Fall time VDD = 400 V, ID = 8 A, RG = 4.7 Ω, VGS = 10 V (see Figure 12. Test circuit for resistive load switching times and Figure 17. Switching time waveform) Min. Typ. Max. - 14 - - 9 - - 48 - - 9 - Unit ns page 3/19 STB23N80K5 Electrical characteristics Table 7. Source-drain diode Symbol ISD ISDM (1) VSD (2) Parameter Test conditions Min. Typ. Max. Unit Source-drain current - 16 A Source-drain current (pulsed) - 64 A - 1.5 V VGS = 0 V, ISD = 16 A Forward on voltage trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current ISD = 16 A, di/dt = 100 A/µs, VDD = 60 V (see Figure 14. Test circuit for inductive load switching and diode recovery times) ISD = 16 A, di/dt = 100 A/µs, VDD = 60 V, Tj = 150 °C (see Figure 14. Test circuit for inductive load switching and diode recovery times) - 410 ns - 7 µC - 34 A - 650 ns - 10 µC - 32 A Min. Typ. Max. Unit ±30 - - V 1. Pulse width is limited by safe operating area. 2. Pulse test: pulse duration = 300 µs, duty cycle 1.5%. Table 8. Gate-source Zener diode Symbol V(BR)GSO Parameter Gate-source breakdown voltage Test conditions IGS = ±1 mA, ID = 0 A The built-in back-to-back Zener diodes are specifically designed to enhance the ESD performance of the device. The Zener voltage facilitates efficient and cost-effective device integrity protection, thus eliminating the need for additional external componentry. DS11240 - Rev 2 page 4/19 STB23N80K5 Electrical characteristics (curves) 2.1 Electrical characteristics (curves) Figure 2. Normalized transient thermal impedance Figure 1. Safe operating area ID (A) GC20540 GIPG280815VK86BSOA Operation in this area is limited by R DS(on) 10 1 10 µs 100 µs 1 ms 10 0 10 ms 10 -1 10 -1 10 0 T j = 150 °C T c = 25 °C single pulse 10 1 10 2 V DS (V) Figure 3. Typical output characteristics ID (A) V GS = 10 V 20 V GS = 8 V 10 10 V GS = 7 V V GS = 6 V 4 8 12 16 V DS (V) Figure 5. Typical gate charge characteristics VGS (V) VDS GIPG130815VK86WQVG VDS (V) VDD= 640 V, ID= 16 A 12 600 10 500 8 400 6 300 4 200 2 100 0 0 DS11240 - Rev 2 10 20 V DS = 20 V 30 V GS = 9 V 20 GIPG130815VK86WTCH 40 V GS = 11 V 30 0 0 ID (A) GIPG130815VK86WOCH 40 Figure 4. Typical transfer characteristics 30 0 Qg(nC) 0 5 6 7 8 9 10 V GS (V) Figure 6. Typical drain-source on-resistance RDS(on) (Ω) GIPG130815VK86WRID VGS= 10 V 0.35 0.30 0.25 0.20 0.15 0 10 20 30 ID(A) page 5/19 STB23N80K5 Electrical characteristics (curves) Figure 7. Typical capacitance characteristics C (pF) Figure 8. Normalized gate threshold vs temperature V GS(th) (norm.) GIPG130815VK86WCVR GIPG130815VK86WVTH I D = 100 µA 1.2 C ISS 10 3 1.0 10 2 0.8 C OSS 10 0 10 -1 0.6 f = 1 MHz 10 1 C RSS 10 0 10 1 10 2 0.4 0.2 -50 V DS (V) Figure 9. Normalized on-resistance vs temperature R DS(on) (norm.) 0 100 T j (°C) Figure 10. Normalized breakdown voltage vs temperature V (BR)DSS (norm.) GIPG130815VK86WRON GIPG130815VK86WBDV V GS = 10 V 2.6 50 I D = 1 mA 1.08 2.2 1.04 1.8 1.00 1.4 0.96 1.0 0.92 0.6 0.2 -50 0 50 100 0.88 -50 T j (°C) 0 50 100 T j (°C) Figure 11. Maximum avalanche energy vs temperature EAS (mJ) GIPG130815VK86WEAS50 Single pulse, ID= 5 A, VDD= 50 V 400 300 200 100 0 -50 DS11240 - Rev 2 0 50 100 TC(°C) page 6/19 STB23N80K5 Test circuits 3 Test circuits Figure 12. Test circuit for resistive load switching times Figure 13. Test circuit for gate charge behavior VDD 12 V 2200 + μF 3.3 μF VDD VD VGS 1 kΩ 100 nF RL IG= CONST VGS RG 47 kΩ + pulse width D.U.T. 2.7 kΩ 2200 μF pulse width D.U.T. 100 Ω VG 47 kΩ 1 kΩ AM01469v1 AM01468v1 Figure 14. Test circuit for inductive load switching and diode recovery times D G A D.U.T. S 25 Ω A L A VD 100 µH fast diode B B B 3.3 µF D G + Figure 15. Unclamped inductive load test circuit RG 1000 + µF 2200 + µF VDD 3.3 µF VDD ID D.U.T. S D.U.T. Vi _ pulse width AM01471v1 AM01470v1 Figure 17. Switching time waveform Figure 16. Unclamped inductive waveform ton V(BR)DSS td(on) toff td(off) tr tf VD 90% 90% IDM VDD 10% 0 ID VDD VGS AM01472v1 0 VDS 10% 90% 10% AM01473v1 DS11240 - Rev 2 page 7/19 STB23N80K5 Package information 4 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 4.1 D²PAK (TO-263) type A package information Figure 18. D²PAK (TO-263) type A package outline 0079457_26 DS11240 - Rev 2 page 8/19 STB23N80K5 D²PAK (TO-263) type A package information Table 9. D²PAK (TO-263) type A package mechanical data Dim. mm Min. Max. A 4.40 4.60 A1 0.03 0.23 b 0.70 0.93 b2 1.14 1.70 c 0.45 0.60 c2 1.23 1.36 D 8.95 9.35 D1 7.50 7.75 8.00 D2 1.10 1.30 1.50 E 10.00 E1 8.30 8.50 8.70 E2 6.85 7.05 7.25 e 10.40 2.54 e1 4.88 5.28 H 15.00 15.85 J1 2.49 2.69 L 2.29 2.79 L1 1.27 1.40 L2 1.30 1.75 R V2 DS11240 - Rev 2 Typ. 0.40 0° 8° page 9/19 STB23N80K5 D²PAK packing information 4.2 D²PAK packing information Figure 19. D²PAK tape outline DS11240 - Rev 2 page 10/19 STB23N80K5 D²PAK packing information Figure 20. D²PAK reel outline T 40mm min. access hole at slot location B D C N A G measured at hub Tape slot in core for tape start 2.5mm min.width Full radius AM06038v1 Table 10. D²PAK tape and reel mechanical data Tape Dim. DS11240 - Rev 2 Reel mm mm Dim. Min. Max. Min. Max. A0 10.5 10.7 A B0 15.7 15.9 B 1.5 D 1.5 1.6 C 12.8 D1 1.59 1.61 D 20.2 E 1.65 1.85 G 24.4 F 11.4 11.6 N 100 K0 4.8 5.0 T P0 3.9 4.1 P1 11.9 12.1 Base quantity 1000 P2 1.9 2.1 Bulk quantity 1000 R 50 T 0.25 0.35 W 23.7 24.3 330 13.2 26.4 30.4 page 11/19 STB23N80K5 D²PAK (TO-263) type B package information 4.3 D²PAK (TO-263) type B package information Figure 21. D²PAK (TO-263) type B package outline 0079457_26_B DS11240 - Rev 2 page 12/19 STB23N80K5 D²PAK (TO-263) type B package information Table 11. D²PAK (TO-263) type B mechanical data Dim. mm Min. Max. A 4.36 4.56 A1 0 0.25 b 0.70 0.90 b1 0.51 0.89 b2 1.17 1.37 c 0.38 0.694 c1 0.38 0.534 c2 1.19 1.34 D 8.60 9.00 D1 6.90 7.50 E 10.15 10.55 E1 8.10 8.70 e 2.54 BSC H 15.00 15.60 L 1.90 2.50 L1 1.65 L2 1.78 L3 L4 DS11240 - Rev 2 Typ. 0.25 4.78 5.28 page 13/19 STB23N80K5 D²PAK (TO-263) type B package information Figure 22. D²PAK (TO-263) recommended footprint (dimensions are in mm) 0079457_Rev26_footprint DS11240 - Rev 2 page 14/19 STB23N80K5 D²PAK type B packing information 4.4 D²PAK type B packing information Figure 23. D²PAK type B tape outline Figure 24. D²PAK type B reel outline T 40mm min. access hole at slot location B D C N A Full radius Tape slot in core for tape start 2.5mm min.width G measured at hub AM06038v1 DS11240 - Rev 2 page 15/19 STB23N80K5 D²PAK type B packing information Table 12. D²PAK type B reel mechanical data Dim. mm Min. A DS11240 - Rev 2 330 B 1.5 C 12.8 D 20.2 G 24.4 N 100 T Max. 13.2 26.4 30.4 page 16/19 STB23N80K5 Revision history Table 13. Document revision history Date Revision 28-Aug-2015 1 Changes First release. Updated Section 4.1 D²PAK (TO-263) type A package information. 21-May-2021 2 Added Section 4.3 D²PAK (TO-263) type B package information. Minor text changes. DS11240 - Rev 2 page 17/19 STB23N80K5 Contents Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 2 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 4 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 4.1 D²PAK (TO-263) type A package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4.2 D²PAK packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4.3 D²PAK (TO-263) type B package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.4 D²PAK type B packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 DS11240 - Rev 2 page 18/19 STB23N80K5 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. 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Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2021 STMicroelectronics – All rights reserved DS11240 - Rev 2 page 19/19