STB34N50DM2AG
Automotive-grade N-channel 500 V, 0.10 Ω typ., 26 A
MDmesh™ DM2 Power MOSFET in a D²PAK package
Datasheet - production data
Features
Order code
VDS
RDS(on)
max.
ID
PTOT
STB34N50DM2AG
500 V
0.12 Ω
26 A
190 W
TAB
3
1
D2PAK
Figure 1: Internal schematic diagram
Designed for automotive applications and
AEC-Q101 qualified
Fast-recovery body diode
Extremely low gate charge and input
capacitance
Low on-resistance
100% avalanche tested
Extremely high dv/dt ruggedness
Zener-protected
Applications
Switching applications
Description
This high voltage N-channel Power MOSFET is
part of the MDmesh™ DM2 fast recovery diode
series. It offers very low recovery charge (Qrr)
and time (trr) combined with low RDS(on), rendering
it suitable for the most demanding high efficiency
converters and ideal for bridge topologies and
ZVS phase-shift converters.
Table 1: Device summary
Order code
Marking
Package
Packing
STB34N50DM2AG
34N50DM2
D²PAK
Tape and reel
August 2015
DocID028248 Rev 1
This is information on a product in full production.
1/15
www.st.com
Contents
STB34N50DM2AG
Contents
1
Electrical ratings ............................................................................. 3
2
Electrical characteristics ................................................................ 4
2.1
Electrical characteristics (curves) ...................................................... 6
3
Test circuits ..................................................................................... 8
4
Package information ....................................................................... 9
5
2/15
4.1
D²PAK (TO-263) type A package information ................................... 9
4.2
D²PAK packing information ............................................................. 12
Revision history ............................................................................ 14
DocID028248 Rev 1
STB34N50DM2AG
1
Electrical ratings
Electrical ratings
Table 2: Absolute maximum ratings
Symbol
Value
Unit
Gate-source voltage
±25
V
Drain current (continuous) at Tcase = 25 °C
26
Drain current (continuous) at Tcase = 100 °C
16
IDM(1)
Drain current (pulsed)
104
A
PTOT
W
VGS
ID
Parameter
Total dissipation at Tcase = 25 °C
190
dv/dt(2)
Peak diode recovery voltage slope
50
dv/dt(3)
MOSFET dv/dt ruggedness
50
Tstg
Storage temperature
Tj
Operating junction temperature
A
V/ns
-55 to 150
°C
Value
Unit
Notes:
(1)
Pulse width is limited by safe operating area.
(2)
ISD ≤ 26 A, di/dt=800 A/μs; VDS peak < V(BR)DSS,VDD = 80% V(BR)DSS.
(3)
VDS ≤ 400 V.
Table 3: Thermal data
Symbol
Parameter
Rthj-case
Thermal resistance junction-case
0.65
Thermal resistance junction-pcb
30
Rthj-pcb
(1)
°C/W
Notes:
(1)
When mounted on a 1-inch² FR-4, 2 Oz copper board.
Table 4: Avalanche characteristics
Symbol
Parameter
IAR(1)
Avalanche current, repetitive or not repetitive
EAS(2)
Single pulse avalanche energy
Value
Unit
5
A
700
mJ
Notes:
(1)pulse
(2)
width limited by Tjmax.
starting Tj = 25 °C, ID = IAR, VDD = 50 V.
DocID028248 Rev 1
3/15
Electrical characteristics
2
STB34N50DM2AG
Electrical characteristics
(Tcase = 25 °C unless otherwise specified)
Table 5: Static
Symbol
Parameter
Test conditions
V(BR)DSS
Drain-source breakdown
voltage
VGS = 0 V, ID = 1 mA
Min.
Typ.
Max.
500
Unit
V
VGS = 0 V, VDS = 500 V
10
VGS = 0 V, VDS = 500 V,
Tcase = 125 °C
100
Gate-body leakage
current
VDS = 0 V, VGS = ±25 V
±5
µA
VGS(th)
Gate threshold voltage
VDS = VGS, ID = 250 µA
4
5
V
RDS(on)
Static drain-source onresistance
VGS = 10 V, ID = 12.5 A
0.10
0.12
Ω
Min.
Typ.
Max.
Unit
-
1850
-
-
100
-
-
2.7
-
IDSS
Zero gate voltage drain
current
IGSS
3
µA
Table 6: Dynamic
Symbol
Parameter
Test conditions
Ciss
Input capacitance
Coss
Output capacitance
Crss
Reverse transfer
capacitance
Coss eq.(1)
Equivalent output
capacitance
VDS = 0 to 400 V, VGS = 0 V
-
160
-
pF
RG
Intrinsic gate resistance
f = 1 MHz, ID = 0 A
-
4.5
-
Ω
Qg
Total gate charge
-
44
-
Qgs
Gate-source charge
-
10.5
-
Qgd
Gate-drain charge
VDD = 480 V, ID = 25 A,
VGS = 10 V (see Figure 15:
"Test circuit for gate charge
behavior")
-
19
-
VDS = 100 V, f = 1 MHz,
VGS = 0 V
pF
nC
Notes:
(1)
Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS
increases from 0 to 80% VDSS.
Table 7: Switching times
Symbol
td(on)
tr
td(off)
tf
4/15
Parameter
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Test conditions
Min.
Typ.
Max.
VDD = 250 V, ID = 12.5 A
RG = 4.7 Ω, VGS = 10 V (see
Figure 14: "Test circuit for
resistive load switching times"
and Figure 19: "Switching time
waveform")
-
19.5
-
-
11.5
-
-
65.5
-
-
8.1
-
DocID028248 Rev 1
Unit
ns
STB34N50DM2AG
Electrical characteristics
Table 8: Source-drain diode
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
ISD
Source-drain current
-
26
A
ISDM(1)
Source-drain current
(pulsed)
-
104
A
VSD(2)
Forward on voltage
VGS = 0 V, ISD = 26 A
-
1.6
V
trr
Reverse recovery time
-
110
ns
Qrr
Reverse recovery charge
-
0.48
µC
IRRM
Reverse recovery current
ISD = 25 A, di/dt = 100 A/µs,
VDD = 100 V (see Figure 16:
"Test circuit for inductive load
switching and diode recovery
times")
-
8.8
A
ISD = 25 A, di/dt = 100 A/µs,
VDD = 100 V, Tj = 150 °C (see
Figure 16: "Test circuit for
inductive load switching and
diode recovery times")
-
190
ns
-
1.52
µC
-
16
A
trr
Reverse recovery time
Qrr
Reverse recovery charge
IRRM
Reverse recovery current
Notes:
(1)
Pulse width is limited by safe operating area.
(2)
Pulse test: pulse duration = 300 µs, duty cycle 1.5%.
Table 9: Gate-source Zener diode
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
V(BR)GSO
Gate-source breakdown voltage
IGS = ±250 µA, ID = 0 A
±30
-
-
V
The built-in back-to-back Zener diodes are specifically designed to enhance the ESD
performance of the device. The Zener voltage facilitates efficient and cost-effective device
integrity protection, thus eliminating the need for additional external componentry.
DocID028248 Rev 1
5/15
Electrical characteristics
2.1
STB34N50DM2AG
Electrical characteristics (curves)
Figure 2: Safe operating area
Figure 3: Thermal impedance
K
δ=0.5
0.2
0.1
10 -1 0.05
0.02
Zth= K*Rthj-c
δ= tp/Ƭ
0.01
Single pulse
10 -2
10 -5
6/15
10
-4
10
tp
-3
10
-2
Ƭ
10 -1
t P (s)
Figure 4: Output characteristics
Figure 5: Transfer characteristics
Figure 6: Gate charge vs gate-source voltage
Figure 7: Static drain-source on-resistance
DocID028248 Rev 1
STB34N50DM2AG
Electrical characteristics
Figure 8: Capacitance variations
Figure 9: Normalized gate threshold voltage
vs temperature
Figure 10: Normalized on-resistance vs
temperature
Figure 11: Normalized V(BR)DSS vs
temperature
Figure 12: Output capacitance stored energy
Figure 13: Source- drain diode forward
characteristics
DocID028248 Rev 1
7/15
Test circuits
3
8/15
STB34N50DM2AG
Test circuits
Figure 14: Test circuit for resistive load
switching times
Figure 15: Test circuit for gate charge
behavior
Figure 16: Test circuit for inductive load
switching and diode recovery times
Figure 17: Unclamped inductive load test
circuit
Figure 18: Unclamped inductive waveform
Figure 19: Switching time waveform
DocID028248 Rev 1
STB34N50DM2AG
4
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
4.1
D²PAK (TO-263) type A package information
Figure 20: D²PAK (TO-263) type A package outline
0079457_A_rev22
DocID028248 Rev 1
9/15
Package information
STB34N50DM2AG
Table 10: D²PAK (TO-263) type A package mechanical data
mm
Dim.
Min.
Max.
A
4.40
4.60
A1
0.03
0.23
b
0.70
0.93
b2
1.14
1.70
c
0.45
0.60
c2
1.23
1.36
D
8.95
9.35
D1
7.50
7.75
8.00
D2
1.10
1.30
1.50
E
10
E1
8.50
8.70
8.90
E2
6.85
7.05
7.25
e
10.40
2.54
e1
4.88
5.28
H
15
15.85
J1
2.49
2.69
L
2.29
2.79
L1
1.27
1.40
L2
1.30
1.75
R
V2
10/15
Typ.
0.4
0°
DocID028248 Rev 1
8°
STB34N50DM2AG
Package information
Figure 21: D²PAK (TO-263) recommended footprint (dimensions are in mm)
DocID028248 Rev 1
11/15
Package information
4.2
STB34N50DM2AG
D²PAK packing information
Figure 22: Tape
12/15
DocID028248 Rev 1
STB34N50DM2AG
Package information
Figure 23: Reel
Table 11: D²PAK tape and reel mechanical data
Tape
Reel
mm
mm
Dim.
Dim.
Min.
Max.
A0
10.5
10.7
A
B0
15.7
15.9
B
1.5
D
1.5
1.6
C
12.8
D1
1.59
1.61
D
20.2
E
1.65
1.85
G
24.4
F
11.4
11.6
N
100
K0
4.8
5.0
T
P0
3.9
4.1
P1
11.9
12.1
Base qty
1000
P2
1.9
2.1
Bulk qty
1000
R
50
T
0.25
0.35
W
23.7
24.3
DocID028248 Rev 1
Min.
Max.
330
13.2
26.4
30.4
13/15
Revision history
5
STB34N50DM2AG
Revision history
Table 12: Document revision history
14/15
Date
Revision
19-Aug-2015
1
DocID028248 Rev 1
Changes
Initial version
STB34N50DM2AG
IMPORTANT NOTICE – PLEASE READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and
improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST
products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order
acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the
design of Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2015 STMicroelectronics – All rights reserved
DocID028248 Rev 1
15/15
很抱歉,暂时无法提供与“STB34N50DM2AG”相匹配的价格&库存,您可以联系我们找货
免费人工找货