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STB6N62K3

STB6N62K3

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

    SOT404

  • 描述:

    MOSFET N-CH 620V 5.5A D2PAK

  • 数据手册
  • 价格&库存
STB6N62K3 数据手册
STB6N62K3 STD6N62K3 N-channel 620 V, 0.95 Ω, 5.5 A SuperMESH3™ Power MOSFET in D²PAK, DPAK Features Order codes VDSS RDS(on) max. ID Pw STB6N62K3 STD6N62K3 620 V < 1.2 Ω 5.5 A 90 W TAB TAB 3 100% avalanche tested ■ Extremely high dv/dt capability ■ Gate charge minimized ■ Very low intrinsic capacitance ■ Improved diode reverse recovery characteristics ■ Zener-protected 1 DPAK D²PAK Figure 1. Internal schematic diagram D(2,TAB) Applications ■ 3 1 ■ Switching applications Description G(1) These SuperMESH3™ Power MOSFETs are the result of improvements applied to STMicroelectronics’ SuperMESH™ technology, combined with a new optimized vertical structure. These devices boast an extremely low onresistance, superior dynamic performance and high avalanche capability, rendering them suitable for the most demanding applications. Table 1. S(3) AM01476v1 Device summary Order codes Marking Package Packaging STB6N62K3 STD6N62K3 6N62K3 D²PAK DPAK Tape and reel December 2011 Doc ID 022605 Rev 1 1/19 www.st.com 19 Contents STB6N62K3, STD6N62K3 Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) ......................... 6 3 Test circuits 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5 Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 2/19 .............................................. 9 Doc ID 022605 Rev 1 STB6N62K3, STD6N62K3 1 Electrical ratings Electrical ratings Table 2. Absolute maximum ratings Value Symbol Parameter Unit D²PAK DPAK VDS Drain-source voltage 620 V VGS Gate- source voltage ± 30 V ID Drain current (continuous) at TC = 25 °C 5.5 A ID Drain current (continuous) at TC = 100 °C 3 A Drain current (pulsed) 22 A PTOT Total dissipation at TC = 25 °C 90 W IAR (2) Avalanche current, repetitive or not-repetitive 5.5 A Single pulse avalanche energy 140 mJ Gate-source human body model (R=1.5 kΩ, C=100 pF) 2.5 kV Peak diode recovery voltage slope 12 V/ns -55 to 150 °C 150 °C IDM (1) EAS (3) ESD dv/dt (4) Tstg Tj Storage temperature Max. operating junction temperature 1. Pulse width limited by safe operating area. 2. Pulse width limited by Tj max. 3. Starting Tj = 25 °C, ID = IAR, VDD = 50 V. 4. ISD ≤ 5.5 A, di/dt ≤ 400 A/µs, VDD = 80% V(BR)DSS. Table 3. Symbol Thermal data Parameter Rthj-case Thermal resistance junction-case max. Rthj-pcb(1) Thermal resistance junction-pcb max. D²PAK DPAK 1.39 30 Unit °C/W 50 °C/W 1. When mounted on 1inch² FR-4 board, 2 oz Cu. Doc ID 022605 Rev 1 3/19 Electrical characteristics 2 STB6N62K3, STD6N62K3 Electrical characteristics (TC = 25 °C unless otherwise specified) Table 4. Symbol V(BR)DSS On /off states Parameter Test conditions Drain-source breakdown voltage ID = 1 mA, VGS = 0 Min. Typ. Max. 620 V IDSS Zero gate voltage VDS = 620 V drain current (VGS = 0) VDS = 620 V, TC=125 °C 0.8 50 µA µA IGSS Gate-body leakage current (VDS = 0) ±9 µA 3.75 4.5 V 0.95 1.2 Ω VGS = ± 20 V VGS(th) Gate threshold voltage VDS = VGS, ID = 50 µA RDS(on Static drain-source on resistance Table 5. Symbol VGS = 10 V, ID = 2.8 A Parameter Test conditions Min. Typ. Max. Unit VDS = 50 V, f = 1 MHz, VGS = 0 - 875 100 17 - pF pF pF - 28 - pF - 63 - pF - 3.5 - Ω - 34 4 22 - nC nC nC Equivalent output Coss(er)(1) capacitance energy related Coss(tr) (2) 3 Dynamic Input capacitance Output capacitance Reverse transfer capacitance Ciss Coss Crss VGS = 0, VDS = 0 to 480 V Equivalent output capacitance time related RG Intrinsic gate resistance f = 1 MHz open drain Qg Qgs Qgd Total gate charge Gate-source charge Gate-drain charge VDD = 496 V, ID = 5.5 A, VGS = 10 V (see Figure 18) 1. Is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS 2. Is defined as a constant equivalent capacitance giving the same storage energy as Coss when VDS increases from 0 to 80% VDSS 4/19 Unit Doc ID 022605 Rev 1 STB6N62K3, STD6N62K3 Table 6. Symbol td(on) tr td(off) tf Table 7. Electrical characteristics Switching times Parameter Test conditions Turn-on delay time Rise time Turn-off-delay time Fall time ISD ISDM (1) Source-drain current Source-drain current (pulsed) VSD (2) Forward on voltage trr Qrr IRRM - 22 12 49 20 Max. Unit - ns ns ns ns Source drain diode Parameter IRRM Typ. VDD = 310 V, ID = 2.75 A, RG = 4.7 Ω, VGS = 10 V (see Figure 17) Symbol trr Qrr Min. Test conditions Min. Typ. Max. Unit - 5.5 27 A A ISD = 5.5 A, VGS = 0 - 1.5 V Reverse recovery time Reverse recovery charge Reverse recovery current ISD = 5.5 A, di/dt = 100 A/µs VDD = 60 V (see Figure 22) - 290 1900 13.5 ns nC A Reverse recovery time Reverse recovery charge Reverse recovery current ISD = 5.5 A, di/dt = 100 A/µs VDD = 60 V, Tj = 150 °C (see Figure 22) - 335 2400 14.5 ns nC A Min. Typ. 1. Pulse width limited by safe operating area 2. Pulsed: pulse duration = 300 µs, duty cycle 1.5% Table 8. Symbol V(BR)GSO Gate-source Zener diode Parameter Test conditions Gate-source breakdown voltage (ID = 0) Igs=± 1 mA 30 Max. Unit - V The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the usage of external components. Doc ID 022605 Rev 1 5/19 Electrical characteristics STB6N62K3, STD6N62K3 2.1 Electrical characteristics (curves) Figure 2. Safe operating area for D²PAK Figure 3. Thermal impedance for D²PAK Figure 5. Thermal impedance for DPAK Figure 7. Transfer characteristics AM09051v1 ID (A) Tj=150°C Tc=25°C Single pulse 10 n) 100µs S( o Op Lim era ite tion d b in y m this ax ar RD ea is 10µs 1 0.1 0.1 Figure 4. 1ms 10ms 10 1 100 VDS(V) Safe operating area for DPAK AM09052v1 ID (A) Tj=150°C Tc=25°C Single pulse n) 10µs (o 100µs DS Op Lim era ite tion d b in y m this ax ar R e ai s 10 1 0.1 0.1 Figure 6. 1ms 10ms 10 1 100 VDS(V) Output characteristics AM09054v1 ID (A) 3.5 VGS=10V AM09055v1 ID (A) 8 VDS=15V 7 3.0 6V 2.5 6 5 2.0 4 1.5 3 1.0 2 0.5 0 0 6/19 1 4V 1 2 VDS(V) 0 0 Doc ID 022605 Rev 1 2 4 6 8 10 VGS(V) STB6N62K3, STD6N62K3 Figure 8. Electrical characteristics Gate charge vs gate-source voltage Figure 9. AM09057v1 VGS (V) VDS(V) VDD=496V ID=5.5A 12 500 Static drain-source on resistance AM09056v1 RDS(on) (Ω) VGS=10V 1.15 VDS 1.10 10 400 8 1.05 300 1.00 6 200 4 100 2 0 0 20 10 30 0 Qg(nC) Figure 10. Capacitance variations 0.90 0.85 0 1 2 3 5 4 6 ID(A) Figure 11. Output capacitance stored energy AM09058v1 C (pF) 0.95 AM09059v1 Eoss (µJ) 5 1000 Ciss 4 100 3 Coss 10 2 Crss 1 1 0.1 1 100 10 Figure 12. Normalized gate threshold voltage vs temperature AM09061v1 VGS(th) (norm) 0 0 VDS(V) 100 200 300 400 500 VDS(V) Figure 13. Normalized on resistance vs temperature AM09062v1 RDS(on) (norm) ID=50µA 1.10 ID=2.8A VGS=10A 2.5 1.00 2.0 1.5 0.90 1.0 0.80 0.5 0.70 -75 -25 25 75 125 TJ(°C) 0.0 -75 Doc ID 022605 Rev 1 -25 25 75 125 TJ(°C) 7/19 Electrical characteristics STB6N62K3, STD6N62K3 Figure 14. Normalized BVDSS vs temperature AM09060v1 BVDSS (norm) Figure 15. Source-drain diode forward characteristics AM09063v1 VSD (V) TJ=-50°C ID=1mA 1.0 1.10 TJ=25°C 0.8 1.05 0.6 1.00 TJ=150°C 0.4 0.95 0.90 -75 0.2 25 -25 75 125 TJ(°C) Figure 16. Maximum avalanche energy vs temperature AM09064v1 EAS (mJ) 160 ID=5.5 A VDD=50 V 140 120 100 80 60 40 20 0 0 8/19 20 40 60 80 100 120 140 TJ(°C) Doc ID 022605 Rev 1 0 0 1 2 3 4 5 6 ISD(A) STB6N62K3, STD6N62K3 3 Test circuits Test circuits Figure 17. Switching times test circuit for resistive load Figure 18. Gate charge test circuit VDD 12V 47kΩ 1kΩ 100nF 3.3 μF 2200 RL μF VGS IG=CONST VDD 100Ω Vi=20V=VGMAX VD RG 2200 μF D.U.T. D.U.T. VG 2.7kΩ PW 47kΩ 1kΩ PW AM01468v1 AM01469v1 Figure 19. Test circuit for inductive load Figure 20. Unclamped Inductive load test switching and diode recovery times circuit A A D.U.T. FAST DIODE B B L A D G VD L=100μH S 3.3 μF B 25 Ω 1000 μF D VDD 2200 μF 3.3 μF VDD ID G RG S Vi D.U.T. Pw AM01470v1 Figure 21. Unclamped inductive waveform AM01471v1 Figure 22. Switching time waveform ton V(BR)DSS tdon VD toff tr tdoff tf 90% 90% IDM 10% ID VDD 10% 0 VDD VDS 90% VGS AM01472v1 0 Doc ID 022605 Rev 1 10% AM01473v1 9/19 Package mechanical data 4 STB6N62K3, STD6N62K3 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 10/19 Doc ID 022605 Rev 1 STB6N62K3, STD6N62K3 Table 9. Package mechanical data D²PAK (TO-263) mechanical data mm Dim. Min. Typ. Max. A 4.40 4.60 A1 0.03 0.23 b 0.70 0.93 b2 1.14 1.70 c 0.45 0.60 c2 1.23 1.36 D 8.95 9.35 D1 7.50 E 10 E1 8.50 10.40 e 2.54 e1 4.88 5.28 H 15 15.85 J1 2.49 2.69 L 2.29 2.79 L1 1.27 1.40 L2 1.30 1.75 R V2 0.4 0° 8° Doc ID 022605 Rev 1 11/19 Package mechanical data STB6N62K3, STD6N62K3 Figure 23. D²PAK (TO-263) drawing 0079457_S Figure 24. D²PAK footprint(a) 16.90 12.20 5.08 1.60 3.50 9.75 a. All dimensions are in millimeters 12/19 Doc ID 022605 Rev 1 Footprint STB6N62K3, STD6N62K3 Table 10. Package mechanical data DPAK (TO-252) mechanical data mm Dim. Min. Typ. Max. A 2.20 2.40 A1 0.90 1.10 A2 0.03 0.23 b 0.64 0.90 b4 5.20 5.40 c 0.45 0.60 c2 0.48 0.60 D 6.00 6.20 D1 E 5.10 6.40 6.60 E1 4.70 e 2.28 e1 4.40 4.60 H 9.35 10.10 L 1 1.50 L1 2.80 L2 0.80 L4 0.60 R V2 1 0.20 0° 8° Doc ID 022605 Rev 1 13/19 Package mechanical data STB6N62K3, STD6N62K3 Figure 25. DPAK (TO-252) drawing 0068772_H Figure 26. DPAK footprint(b) 6.7 1.8 3 1.6 2.3 6.7 2.3 1.6 b. All dimensions are in millimeters 14/19 Doc ID 022605 Rev 1 AM08850v1 STB6N62K3, STD6N62K3 5 Packaging mechanical data Packaging mechanical data Table 11. D²PAK (TO-263) tape and reel mechanical data Tape Reel mm mm Dim. Dim. Min. Max. Min. A0 10.5 10.7 A B0 15.7 15.9 B 1.5 D 1.5 1.6 C 12.8 D1 1.59 1.61 D 20.2 E 1.65 1.85 G 24.4 F 11.4 11.6 N 100 K0 4.8 5.0 T P0 3.9 4.1 P1 11.9 12.1 Base qty 1000 P2 1.9 2.1 Bulk qty 1000 R 50 T 0.25 0.35 W 23.7 24.3 Doc ID 022605 Rev 1 Max. 330 13.2 26.4 30.4 15/19 Packaging mechanical data Table 12. STB6N62K3, STD6N62K3 DPAK (TO-252) tape and reel mechanical data Tape Reel mm mm Dim. Dim. Min. Max. A0 6.8 7 A B0 10.4 10.6 B 1.5 12.1 C 12.8 1.6 D 20.2 G 16.4 50 B1 16/19 Min. Max. 330 13.2 D 1.5 D1 1.5 E 1.65 1.85 N F 7.4 7.6 T K0 2.55 2.75 P0 3.9 4.1 Base qty. 2500 P1 7.9 8.1 Bulk qty. 2500 P2 1.9 2.1 R 40 T 0.25 0.35 W 15.7 16.3 Doc ID 022605 Rev 1 18.4 22.4 STB6N62K3, STD6N62K3 Packaging mechanical data Figure 27. Tape for DPAK (TO-252) and D²PAK (TO-263) 10 pitches cumulative tolerance on tape +/- 0.2 mm T P0 Top cover tape P2 D E F B1 W K0 B0 For machine ref. only including draft and radii concentric around B0 A0 P1 D1 User direction of feed R Bending radius User direction of feed AM08852v1 Figure 28. Reel for DPAK (TO-252) and D²PAK (TO-263) T REEL DIMENSIONS 40mm min. Access hole At sl ot location B D C N A Full radius Tape slot in core for tape start 25 mm min. width G measured at hub AM08851v2 Doc ID 022605 Rev 1 17/19 Revision history 6 STB6N62K3, STD6N62K3 Revision history Table 13. 18/19 Document revision history Date Revision 21-Dec-2011 1 Changes First release. Doc ID 022605 Rev 1 STB6N62K3, STD6N62K3 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein. UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. UNLESS EXPRESSLY APPROVED IN WRITING BY TWO AUTHORIZED ST REPRESENTATIVES, ST PRODUCTS ARE NOT RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY, DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER’S OWN RISK. Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST. ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. © 2011 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com Doc ID 022605 Rev 1 19/19
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