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STB6N65M2

STB6N65M2

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

    SOT404

  • 描述:

    MOSFET N-CH 650V 4A D2PAK

  • 数据手册
  • 价格&库存
STB6N65M2 数据手册
STB6N65M2, STD6N65M2 Datasheet N-channel 650 V, 1.2 Ω typ., 4 A MDmesh™ M2 Power MOSFETs in D²PAK and DPAK packages Features TAB Order code TAB STB6N65M2 2 3 2 1 3 STD6N65M2 1 DPAK D2PAK D(2, TAB) VDS RDS(on)max. ID 650 V 1.35 Ω 4A • • Extremely low gate charge Excellent output capacitance (COSS) profile • • 100% avalanche tested Zener-protected Package D²PAK DPAK Applications G(1) • S(3) AM01475V1 Switching applications Description These devices are N-channel Power MOSFETs developed using the MDmesh™ M2 technology. Thanks to their strip layout and improved vertical structure, these devices exhibit low on-resistance and optimized switching characteristics, rendering them suitable for the most demanding high-efficiency converters. Product status STB6N65M2 STD6N65M2 Product summary Order code STB6N65M2 Marking 6N65M2 Package D²PAK Packing Tape and reel Order code STD6N65M2 Marking 6N65M2 Package DPAK Packing Tape and reel DS10516 - Rev 2 - December 2018 For further information contact your local STMicroelectronics sales office. www.st.com STB6N65M2, STD6N65M2 Electrical ratings 1 Electrical ratings Table 1. Absolute maximum ratings Symbol Value Unit ±25 V Drain current (continuous) at TC = 25 °C 4 A Drain current (continuous) at TC = 100 °C 2.5 A IDM (1) Drain current (pulsed) 16 A PTOT Total power dissipation at TC = 25 °C 60 W dv/dt (2) Peak diode recovery voltage slope 15 V/ns dv/dt (3) MOSFET dv/dt ruggedness 50 V/ns -55 to 150 °C VGS ID Tj Tstg Parameter Gate-source voltage Operating junction temperature range Storage temperature range 1. Pulse width limited by Tjmax. 2. ISD ≤ 4 A, di/dt ≤ 400 A/μs; VDS peak < V(BR)DSS, VDD = 400 V. 3. VDS ≤ 520 V. Table 2. Thermal data Symbol Parameter Rthj-case Thermal resistance junction-case Rthj-pcb(1) Thermal resistance junction-pcb Value D²PAK DPAK 2.08 30 Unit °C/W 50 °C/W 1. When mounted on 1 inch² FR-4, 2 Oz copper board. Table 3. Avalanche characteristics Symbol IAR EAS DS10516 - Rev 2 Parameter Avalanche current, repetitive or not-repetitive (pulse width limited by Tj max) Single pulse avalanche energy (starting Tj = 25 °C, ID = IAR, VDD = 50 V) Value Unit 0.5 A 100 mJ page 2/22 STB6N65M2, STD6N65M2 Electrical characteristics 2 Electrical characteristics (TCASE = 25 °C unless otherwise specified) Table 4. On/off states Symbol V(BR)DSS Parameter Drain-source breakdown voltage Test conditions Min. ID = 1 mA, VGS = 0 V Typ. 650 Zero gate voltage drain current IGSS Gate body leakage current VDS = 0 V, VGS = ±25 V VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA RDS(on) Static drain-source onresistance VGS = 10 V, ID = 2 A VDS = 650 V, VGS = 0 V, TC = 125 °C 1 µA 100 µA ±10 µA 3 4 V 1.2 1.35 Ω Typ. Max. Unit - pF (1) 2 Unit V VDS = 650 V, VGS = 0 V IDSS Max. 1. Defined by design, not subject to production test. Table 5. Dynamic Symbol Parameter Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Test conditions 226 VDS = 100 V, f = 1 MHz, VGS = 0 V - 12.8 0.65 Equivalent output VGS = 0 V, capacitance VDS = 0 to 520 V Rg Gate input resistance f = 1 MHz, ID=0 A Qg Total gate charge Qgs Gate-source charge Qgd Gate-drain charge Coss eq.(1) Min. VDD = 520 V, ID = 4 A, VGS = 0 to 10 V(see Figure 13. Test circuit for gate charge behavior) - 114 - pF - 6.5 - Ω - nC 9.8 - 1.7 4 1. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS. Table 6. Switching times Symbol td(on) tr td(off) tf DS10516 - Rev 2 Parameter Test conditions Turn-on delay time VDD = 325 V, ID = 2 A, Rise time RG = 4.7 Ω, VGS = 10 V Turn-off delay time (see Figure 12. Test circuit for resistive load switching times and Figure 17. Switching time waveform) Fall time Min. Typ. Max. Unit - ns 19 - 7 6.5 20 page 3/22 STB6N65M2, STD6N65M2 Electrical characteristics Table 7. Source-drain diode Symbol ISD Parameter Test conditions Source-drain current Typ. Source-drain current (pulsed) VSD (2) Forward on voltage ISD = 4 A, VGS = 0 V trr Reverse recovery time ISD = 4 A, di/dt = 100 A/µs Qrr Reverse recovery charge IRRM Reverse recovery current VDD = 60 V (see Figure 14. Test circuit for inductive load switching and diode recovery times) trr Reverse recovery time ISD = 4 A, di/dt = 100 A/µs Qrr Reverse recovery charge VDD = 60 V, Tj = 150 °C Reverse recovery current (see Figure 14. Test circuit for inductive load switching and diode recovery times) 16 - - - Max. 4 - ISDM (1) IRRM Min. 1.6 Unit A V 260 ns 1.2 μC 9.2 A 400 ns 1.84 μC 9.1 A 1. Pulse width limited by safe operating area. 2. Pulsed: pulse duration = 300 μs, duty cycle 1.5%. DS10516 - Rev 2 page 4/22 STB6N65M2, STD6N65M2 Electrical characteristics (curves) 2.1 Electrical characteristics (curves) Figure 1. Safe operating area Figure 2. Thermal impedance GIPG100720141541SA ID (A) 101 ar x in n ma tio by ra pe ited O im L 100 R 10µs is ea is th n) D o S( 100µs 1ms 10ms 10-1 Tj=150°C Tc=25°C Single pulse 10-2 10-1 10-0 101 VDS(V) 102 Figure 3. Output characterisics Figure 4. Transfer characteristics GIPG100720140942SA ID (A) VGS=7, 8, 9, 10V 7 6V 6 5 5 4 4 3 3 2 4V 1 1 0 0 10 5 20 15 VDS(V) Figure 5. Gate charge vs gate-source voltage GIPG100720141638SA VDS VGS (V) VDS 12 (V) VDD=520V ID=4A 450 400 8 350 300 6 2 4 6 8 10 VGS(V) Figure 6. Static drain-source on-resistance GIPG100720141645SA RDS(on) (Ω) VGS=10V 1.26 1.22 250 200 4 150 1.18 100 2 DS10516 - Rev 2 0 0 500 10 0 VDS=18V 6 5V 2 GIPG100720141603SA ID (A) 7 0 2 4 6 8 10 50 0 Qg(nC) 1.14 0 1 2 3 4 ID(A) page 5/22 STB6N65M2, STD6N65M2 Electrical characteristics (curves) Figure 8. Normalized gate threshold voltage vs temperature Figure 7. Capacitance variations GIPG100720141652SA C (pF) GIPG100720141751SA VGS(th) (norm) 1000 ID=250µA 1.1 Ciss 1.0 100 0.9 Coss 10 0.8 1 Crss 0.7 0.1 0.1 1 100 10 0.6 -75 VDS(V) GIPG110720140859SA (norm) 1.08 1.8 1.04 1.4 1.00 1 0.96 0.6 0.92 25 75 125 TJ(°C) GIPG110720140905SA (norm) VGS=10V -25 75 V(BR)DSS 2.2 0.2 -75 25 Figure 10. Normalized V(BR)DSS vs temperature Figure 9. Normalized on-resistance vs temperature RDS(on) -25 125 0.88 -75 TJ(°C) ID=1mA -25 25 75 125 TJ(°C) Figure 11. Source-drain diode forward characteristics GIPG110720140910SA VSD (V) 1.2 TJ=-50°C 1.1 1 0.9 0.8 0.7 TJ=25°C 0.6 TJ=150°C 0.5 0.4 0.3 0.2 0.5 DS10516 - Rev 2 1 1.5 2 2.5 3 3.5 ISD(A) page 6/22 STB6N65M2, STD6N65M2 Test circuits 3 Test circuits Figure 12. Test circuit for resistive load switching times Figure 13. Test circuit for gate charge behavior VDD 12 V 2200 + μF 3.3 μF VDD VD VGS 1 kΩ 100 nF RL IG= CONST VGS RG 47 kΩ + pulse width D.U.T. 2.7 kΩ 2200 μF pulse width D.U.T. 100 Ω VG 47 kΩ 1 kΩ AM01469v1 AM01468v1 Figure 14. Test circuit for inductive load switching and diode recovery times D G A D.U.T. S 25 Ω A L A B B 3.3 µF D G + VD 100 µH fast diode B Figure 15. Unclamped inductive load test circuit RG 1000 + µF 2200 + µF VDD 3.3 µF VDD ID D.U.T. S D.U.T. Vi _ pulse width AM01471v1 AM01470v1 Figure 17. Switching time waveform Figure 16. Unclamped inductive waveform ton V(BR)DSS td(on) VD toff td(off) tr tf 90% 90% IDM VDD 10% 0 ID VDD AM01472v1 VGS 0 VDS 10% 90% 10% AM01473v1 DS10516 - Rev 2 page 7/22 STB6N65M2, STD6N65M2 Package information 4 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. DS10516 - Rev 2 page 8/22 STB6N65M2, STD6N65M2 D²PAK (TO-263) type A package information 4.1 D²PAK (TO-263) type A package information Figure 18. D²PAK (TO-263) type A package outline 0079457_25 DS10516 - Rev 2 page 9/22 STB6N65M2, STD6N65M2 D²PAK (TO-263) type A package information Table 8. D²PAK (TO-263) type A package mechanical data Dim. mm Min. Max. A 4.40 4.60 A1 0.03 0.23 b 0.70 0.93 b2 1.14 1.70 c 0.45 0.60 c2 1.23 1.36 D 8.95 9.35 D1 7.50 7.75 8.00 D2 1.10 1.30 1.50 E 10.00 E1 8.30 8.50 8.70 E2 6.85 7.05 7.25 e 10.40 2.54 e1 4.88 5.28 H 15.00 15.85 J1 2.49 2.69 L 2.29 2.79 L1 1.27 1.40 L2 1.30 1.75 R V2 DS10516 - Rev 2 Typ. 0.40 0° 8° page 10/22 STB6N65M2, STD6N65M2 DPAK (TO-252) type A package information 4.2 DPAK (TO-252) type A package information Figure 19. DPAK (TO-252) type A package outline 0068772_A_26 DS10516 - Rev 2 page 11/22 STB6N65M2, STD6N65M2 DPAK (TO-252) type A package information Table 9. DPAK (TO-252) type A mechanical data Dim. mm Min. Max. A 2.20 2.40 A1 0.90 1.10 A2 0.03 0.23 b 0.64 0.90 b4 5.20 5.40 c 0.45 0.60 c2 0.48 0.60 D 6.00 6.20 D1 4.95 E 6.40 E1 4.60 4.70 4.80 e 2.159 2.286 2.413 e1 4.445 4.572 4.699 H 9.35 10.10 L 1.00 1.50 (L1) 2.60 2.80 3.00 L2 0.65 0.80 0.95 L4 0.60 R V2 DS10516 - Rev 2 Typ. 5.10 5.25 6.60 1.00 0.20 0° 8° page 12/22 STB6N65M2, STD6N65M2 DPAK (TO-252) type C package information 4.3 DPAK (TO-252) type C package information Figure 20. DPAK (TO-252) type C package outline 0068772_C_26 DS10516 - Rev 2 page 13/22 STB6N65M2, STD6N65M2 DPAK (TO-252) type C package information Table 10. DPAK (TO-252) type C mechanical data Dim. mm Min. Typ. Max. A 2.20 2.30 2.38 A1 0.90 1.01 1.10 A2 0.00 0.10 b 0.72 0.85 b4 5.13 c 0.47 0.60 c2 0.47 0.60 D 6.00 D1 5.25 E 6.50 E1 4.70 e 5.46 6.10 6.20 6.60 6.70 2.186 2.286 2.386 H 9.80 10.10 10.40 L 1.40 1.50 1.70 L1 L2 2.90 REF 0.90 L3 L4 1.25 0.51 BSC 0.60 L6 DS10516 - Rev 2 5.33 0.80 1.00 1.80 BSC θ1 5° 7° 9° θ2 5° 7° 9° V2 0° 8° page 14/22 STB6N65M2, STD6N65M2 DPAK (TO-252) type E package information 4.4 DPAK (TO-252) type E package information Figure 21. DPAK (TO-252) type E package outline 0068772_type-E_rev.26 DS10516 - Rev 2 page 15/22 STB6N65M2, STD6N65M2 DPAK (TO-252) type E package information Table 11. DPAK (TO-252) type E mechanical data Dim. A mm Min. Typ. Max. 2.18 2.39 A2 0.13 b 0.65 0.884 b4 4.95 5.46 c 0.46 0.61 c2 0.46 0.60 D 5.97 6.22 D1 5.21 E 6.35 E1 4.32 6.73 e 2.286 e1 4.572 H 9.94 10.34 L 1.50 1.78 L1 L2 2.74 0.89 L4 1.27 1.02 Figure 22. DPAK (TO-252) recommended footprint (dimensions are in mm) FP_0068772_26 DS10516 - Rev 2 page 16/22 STB6N65M2, STD6N65M2 D²PAK and DPAK packing information 4.5 D²PAK and DPAK packing information Figure 23. Tape outline DS10516 - Rev 2 page 17/22 STB6N65M2, STD6N65M2 D²PAK and DPAK packing information Figure 24. Reel outline T 40mm min. access hole at slot location B D C N A G measured at hub Tape slot in core for tape start 2.5mm min.width Full radius AM06038v1 Table 12. D²PAK tape and reel mechanical data Tape Dim. DS10516 - Rev 2 Reel mm mm Dim. Min. Max. Min. A0 10.5 10.7 A B0 15.7 15.9 B 1.5 D 1.5 1.6 C 12.8 D1 1.59 1.61 D 20.2 E 1.65 1.85 G 24.4 F 11.4 11.6 N 100 K0 4.8 5.0 T Max. 330 13.2 26.4 30.4 P0 3.9 4.1 P1 11.9 12.1 Base quantity 1000 P2 1.9 2.1 Bulk quantity 1000 R 50 T 0.25 0.35 W 23.7 24.3 page 18/22 STB6N65M2, STD6N65M2 D²PAK and DPAK packing information Table 13. DPAK tape and reel mechanical data Tape Dim. mm mm Dim. Min. Max. A0 6.8 7 A B0 10.4 10.6 B 1.5 12.1 C 12.8 1.6 D 20.2 G 16.4 50 B1 DS10516 - Rev 2 Reel Min. Max. 330 13.2 D 1.5 D1 1.5 E 1.65 1.85 N F 7.4 7.6 T K0 2.55 2.75 P0 3.9 4.1 Base qty. 2500 P1 7.9 8.1 Bulk qty. 2500 P2 1.9 2.1 R 40 T 0.25 0.35 W 15.7 16.3 18.4 22.4 page 19/22 STB6N65M2, STD6N65M2 Revision history Table 14. Document revision history Date Version 04-Aug-2014 1 Changes First release. Removed maturity status indication from cover page. The document status is production data. 05-Dec-2018 2 Updated Section 4 Package information. Minor text changes. DS10516 - Rev 2 page 20/22 STB6N65M2, STD6N65M2 Contents Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 2 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 4 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 4.1 D²PAK (TO-263) type A package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4.2 DPAK (TO-252) type A package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4.3 DPAK (TO-252) type C package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.4 DPAK (TO-252) type E package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4.5 D²PAK and DPAK packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 DS10516 - Rev 2 page 21/22 STB6N65M2, STD6N65M2 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2018 STMicroelectronics – All rights reserved DS10516 - Rev 2 page 22/22
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