STB80N4F6AG

STB80N4F6AG Automotive-grade N-Channel 40 V, 5.5 mΩ typ.,80 A STripFET™ F6 Power MOSFET in a D²PAK package Datasheet - production data Features TAB  3 1     D2PAK Figure 1: Internal schematic diagram Order code VDS RDS(on) max. ID STB80N4F6AG 40 V 6 mΩ 80 A Designed for automotive applications and AEC-Q101 qualified Very low on-resistance Very low gate charge High avalanche ruggedness Low gate drive power loss Applications  Switching applications Description D(2, TAB) This device is an N-channel Power MOSFET developed using the STripFET™ F6 technology with a new trench gate structure. The resulting Power MOSFET exhibits very low RDS(on) in all packages. G(1) S(3) AM01475v1_Tab Table 1: Device summary Order code Marking Package Packaging STB80N4F6AG 80N4F6 D²PAK Tape and Reel November 2015 DocID027978 Rev 2 This is information on a product in full production. 1/15 www.st.com Contents STB80N4F6AG Contents 1 Electrical ratings ............................................................................. 3 2 Electrical characteristics ................................................................ 4 2.1 Electrical characteristics (curves) ...................................................... 6 3 Test circuits ..................................................................................... 8 4 Package mechanical data ............................................................... 9 5 2/15 4.1 D²PAK package information .............................................................. 9 4.2 D²PAK packing information ............................................................. 12 Revision history ............................................................................ 14 DocID027978 Rev 2 STB80N4F6AG 1 Electrical ratings Electrical ratings Table 2: Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage 40 V VGS Gate-source voltage ± 20 V ID Drain current (continuous) at TC = 25 °C 80 A ID Drain current (continuous) at TC= 100 °C 56 A IDM(1) Drain current (pulsed) 320 A PTOT Total dissipation at TC = 25 °C 70 W IAV Avalanche current, repetitive or not-repetitive (pulse width limited by TJ max) 40 A EAS Single pulse avalanche energy(Starting TJ= 25 °C, = ID =IAV, VDD= 25 V) 149 mJ Tstg Storage temperature - 55 to 175 °C 175 °C Tj Max. operating junction temperature Notes: (1) Pulse width limited by safe operating area. Table 3: Thermal data Symbol Rthj-case Rthj-pcb (1) Parameter Thermal resistance junction-case max. Thermal resistance junction-ambient max. Value Unit 2.14 °C/W 35 °C/W Notes: (1)When mounted on FR-4 board of inch2, 2 oz Cu DocID027978 Rev 2 3/15 Electrical characteristics 2 STB80N4F6AG Electrical characteristics (TC = 25 °C unless otherwise specified). Table 4: On/Off States Symbol V(BR)DSS Parameter Drain-source breakdown voltage Test conditions Min. VGS = 0 V, ID = 250 µA 40 Typ. Max. Unit V VDS = 40 V 1 µA VDS = 40 V Tj = 125 °C 100 µA Gate-body leakage current (VDS= 0 V) VGS = ±20 V ±100 nA VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA 4 V RDS(on) Static drain-source on-resistance VGS = 10 V, ID= 40 A 5.5 6 mΩ Min. Typ. Max. Unit - 2150 - pF - 335 - pF - 160 - pF - 36 - nC - 11 - nC - 9 - nC Min. Typ. Max. Unit - 10.5 - ns - 7.6 - ns - 46.1 - ns - 11.9 - ns IDSS Zero gate voltage drain current (VGS= 0V) IGSS 2 Table 5: Dynamic Symbol Parameter Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Qg Total gate charge Qgs Gate-source charge Qgd Gate-drain charge Test conditions VDS = 25 V, f = 1 MHz, VGS = 0 V VDD = 20 V, ID = 80 A, VGS = 10 V (see Figure 14: "Test circuit for gate charge behavior" ) Table 6: Switching times Symbol td(on) tr td(off) tf 4/15 Parameter Turn-on delay time Rise time Turn-off-delay time Fall time Test conditions VDD = 20 V, ID = 40 A RG = 4.7 Ω, VGS = 10 V(see Figure 15: "Test circuit for inductive load switching and diode recovery times" ) DocID027978 Rev 2 STB80N4F6AG Electrical characteristics Table 7: Source-drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit ISD Source drain current 80 A ISDM(1) Source-drain current (pulsed) 320 A VSD(2) Forward on voltage ISD= 40 A, VGS= 0 V 1.3 V Reverse recovery time ISD= 80 A, di/dt = 100 A/μs, VDD= 32 V (See Figure 17: "Unclamped inductive waveform") trr QRR Reverse recovery charge IRRM Reverse recovery current 41.1 ns 43.6 nC 2.1 A Notes: (1)Pulse width limited by safe operating area. (2)Pulsed: pulse duration = 300 μs, duty cycle 1.5% DocID027978 Rev 2 5/15 Electrical characteristics 2.1 STB80N4F6AG Electrical characteristics (curves) Figure 2: Safe operating area ID (A) 100 Figure 3: Thermal impedance is ea ar S(on) is th R D in ax ion y m at er d b Op mite li 100µs 10 1ms 10ms Tj=175°C Tc=25°C 1 Single pulse 0.1 0.1 1 10 VDS(V) Figure 4: Output characteristics Figure 5: Transfer characteristics GIPD160609102015RV S VDS= 2V 1 Figure 6: Normalized gate threshold voltage vs. temperature 2 3 4 5 6 7 8 9 Figure 7: Normalized V(BR)DSS vs. temperature GIPD160620150918RV ID = 250 μA 6/15 DocID027978 Rev 2 STB80N4F6AG Electrical characteristics Figure 8: Static drain-source on-resistance Figure 9: Normalized on-resistance vs. temperature (mΩ) Figure 10: Gate charge vs. gate-source voltage Figure 11: Capacitance variations Figure 12: Source- drain diode forward characteristics DocID027978 Rev 2 7/15 Test circuits 3 8/15 STB80N4F6AG Test circuits Figure 13: Test circuit for resistive load switching times Figure 14: Test circuit for gate charge behavior Figure 15: Test circuit for inductive load switching and diode recovery times Figure 16: Unclamped inductive load test circuit Figure 17: Unclamped inductive waveform Figure 18: Switching time waveform DocID027978 Rev 2 STB80N4F6AG 4 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 4.1 D²PAK package information Figure 19: D²PAK (TO-263) type A package outline 0079457_A_rev22 DocID027978 Rev 2 9/15 Package mechanical data STB80N4F6AG Table 8: D²PAK (TO-263) type A package mechanical data mm Dim. Min. Max. A 4.40 4.60 A1 0.03 0.23 b 0.70 0.93 b2 1.14 1.70 c 0.45 0.60 c2 1.23 1.36 D 8.95 9.35 D1 7.50 7.75 8.00 D2 1.10 1.30 1.50 E 10 E1 8.50 8.70 8.90 E2 6.85 7.05 7.25 e 10.40 2.54 e1 4.88 5.28 H 15 15.85 J1 2.49 2.69 L 2.29 2.79 L1 1.27 1.40 L2 1.30 1.75 R V2 10/15 Typ. 0.4 0° DocID027978 Rev 2 8° STB80N4F6AG Package mechanical data Figure 20: D²PAK (TO-263) recommended footprint (dimensions are in mm) DocID027978 Rev 2 11/15 Package mechanical data 4.2 STB80N4F6AG D²PAK packing information Figure 21: Tape outline 12/15 DocID027978 Rev 2 STB80N4F6AG Package mechanical data Figure 22: Reel outline Table 9: D²PAK tape and reel mechanical data Tape Reel mm mm Dim. Dim. Min. Max. A0 10.5 10.7 A B0 15.7 15.9 B 1.5 D 1.5 1.6 C 12.8 D1 1.59 1.61 D 20.2 E 1.65 1.85 G 24.4 F 11.4 11.6 N 100 K0 4.8 5.0 T P0 3.9 4.1 P1 11.9 12.1 Base quantity 1000 P2 1.9 2.1 Bulk quantity 1000 R 50 T 0.25 0.35 W 23.7 24.3 DocID027978 Rev 2 Min. Max. 330 13.2 26.4 30.4 13/15 Revision history 5 STB80N4F6AG Revision history Table 10: Document revision history 14/15 Date Revision Changes 16-Jun-2015 1 Initial release 18-Nov-2015 2 Document status promoted from preliminary to production data. Updated title and features in cover page. DocID027978 Rev 2 STB80N4F6AG IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2015 STMicroelectronics – All rights reserved DocID027978 Rev 2 15/15