STB9NK80Z

STB9NK80Z Datasheet Automotive-grade N-channel 800 V, 1.5 Ω typ., 5.2 A SuperMESH Power MOSFET in a D²PAK package Features TAB 2 Order code VDS RDS(on) max. ID STB9NK80Z 800 V 1.8 Ω 5.2 A 3 1 • • • • • D²PAK D(2, TAB) AEC-Q101 qualified 100% avalanche tested Gate charge minimized Very low intrinsic capacitance Zener-protected Applications G(1) • Switching applications Description S(3) AM01475V1 This high-voltage device is a Zener-protected N-channel Power MOSFET developed using the SuperMESH technology by STMicroelectronics, an optimization of the wellestablished PowerMESH. In addition to a significant reduction in on-resistance, this device is designed to ensure a high level of dv/dt capability for the most demanding applications. Product status link STB9NK80Z Product summary Order code STB9NK80Z Marking B9NK80Z Package D²PAK Packing Tape and reel DS9606 - Rev 3 - October 2019 For further information contact your local STMicroelectronics sales office. www.st.com STB9NK80Z Electrical ratings 1 Electrical ratings Table 1. Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage 800 V VGS Gate-source voltage ±30 V ID Drain current (continuous) at TC = 25 °C 5.2 A ID Drain current (continuous) at TC = 100 °C 3.3 A IDM (1) Drain current (pulsed) 20.8 A PTOT Total power dissipation at TC = 25 °C 125 W ESD Gate-source human body model (C = 100 pF, R = 1.5 kΩ) 4 kV 4.5 V/ns -55 to 150 °C Value Unit dv/dt (2) Tj Peak diode recovery voltage slope Operating junction temperature range Tstg Storage temperature range 1. Pulse width limited by safe operating area. 2. ISD ≤ 5.2 A, di/dt ≤ 200 A/µs, VDD ≤ V(BR)DSS. Table 2. Thermal data Symbol Parameter Rthj-case Thermal resistance junction-case Rthj-amb Thermal resistance junction-ambient 1 62.5 °C/W Table 3. Avalanche characteristics Symbol IAR (1) EAS (2) Parameter Value Unit Avalanche current, repetitive or not-repetitive 5.2 A Single pulse avalanche energy 210 mJ 1. Pulse width limited by Tjmax. 2. Starting Tj = 25 °C, ID = IAR, VDD = 50 V. DS9606 - Rev 3 page 2/17 STB9NK80Z Electrical characteristics 2 Electrical characteristics (TCASE = 25 °C unless otherwise specified) Table 4. On/off states Symbol V(BR)DSS Parameter Drain-source breakdown voltage Test conditions VGS = 0 V, ID = 1 mA Min. Typ. Max. 800 Unit V VGS = 0 V, VDS = 800 V 1 µA IDSS Zero gate voltage drain current VGS = 0 V, VDS = 800 V, TC = 125 °C (1) 50 µA IGSS Gate-body leakage current VDS = 0 V, VGS = ±20 V ±10 µA VGS(th) Gate threshold voltage VDS = VGS, ID = 100 µA 3.75 4.5 V RDS(on) Static drain-source onresistance VGS = 10 V, ID = 2.6 A 1.5 1.8 Ω Typ. Max. Unit 3 1. Defined by design, not subject to production test. Table 5. Dynamic Symbol gfs (1) Parameter Forward transconductance Test conditions VDS = 15 V, ID = 2.6 A Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Coss eq. (2) Equivalent output capacitance VGS = 0 V, VDS = 0 V to 640 V Qg Total gate charge VDD = 640 V, ID = 2.6 A, Qgs Gate-source charge VGS = 0 to 10 V Gate-drain charge (see Figure 15. Test circuit for gate charge behavior) Qgd Min. VDS = 25 V, f = 1 MHz, VGS = 0 V 5 S 1138 - 122 - pF - pF - nC 25 - 50 40 - 7 21 1. Pulsed: pulse duration=300μs, duty cycle 1.5%. 2. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDSincreases from 0 to 80% VDSS. DS9606 - Rev 3 page 3/17 STB9NK80Z Electrical characteristics Table 6. Switching times Symbol td(on) tr td(off) tr tr(Voff) tr tc Parameter Test conditions Turn-on delay time Min. Unit - ns Max. Unit 12 Fall time (see Figure 14. Test circuit for resistive load switching times and Figure 19. Switching time waveform) Off-voltage rise time VDD = 640 V, ID = 5.2 A, 12 Fall time RG = 4.7 Ω, VGS = 10 V 10 Cross-over time (see Figure 16. Test circuit for inductive load switching and diode recovery times) 20 Turn-off delay time Max. 20 VDD = 400 V, ID = 2.6 A, RG = 4.7 Ω, VGS = 10 V Rise time Typ. 45 - 22 Table 7. Source-drain diode Symbol ISD Parameter Test conditions Min. Typ. Source-drain current - 5.2 ISDM (1) Source-drain current (pulsed) - 20.8 VSD (2) Forward on voltage ISD = 5.2 A, VGS = 0 V - 1.6 trr Reverse recovery time ISD = 5.2 A, di/dt = 100 A/µs - 530 ns Qrr Reverse recovery charge - 3.31 μC IRRM Reverse recovery current VDD = 50 V, Tj = 150 °C (see Figure 16. Test circuit for inductive load switching and diode recovery times) - 12.5 A Min. Typ. Max. Unit 30 - - V A V 1. Pulse width is limited by safe operating area. 2. Pulsed: pulse duration = 300 μs, duty cycle 1.5%. Table 8. Gate-source Zener diode Symbol V(BR)GSO Parameter Test conditions Gate-source breakdown voltage IGS = ±1 mA, ID = 0 A The built-in back-to-back Zener diodes are specifically designed to enhance the ESD performance of the device. The Zener voltage facilitates efficient and cost-effective device integrity protection, thus eliminating the need for additional external componentry. DS9606 - Rev 3 page 4/17 STB9NK80Z Electrical characteristics (curves) 2.1 Electrical characteristics (curves) Figure 1. Safe operating area DS9606 - Rev 3 Figure 2. Thermal impedance Figure 3. Output characterisics Figure 4. Transfer characteristics Figure 5. Transconductance Figure 6. Static drain-source on- resistance page 5/17 STB9NK80Z Electrical characteristics (curves) Figure 7. Gate charge vs gate-source voltage Figure 8. Capacitance variations Figure 9. Normalized gate threshold voltage vs temperature Figure 10. Normalized on-resistance vs temperature Figure 11. Source-drain diode forward characteristics Figure 12. Normalized breakdown voltage vs temperature DS9606 - Rev 3 page 6/17 STB9NK80Z Electrical characteristics (curves) Figure 13. Maximum avalanche energy vs temperature DS9606 - Rev 3 page 7/17 STB9NK80Z Test circuits 3 Test circuits Figure 14. Test circuit for resistive load switching times Figure 15. Test circuit for gate charge behavior VDD 12 V 2200 + μF 3.3 μF VDD VD VGS 1 kΩ 100 nF RL IG= CONST VGS RG 47 kΩ + pulse width D.U.T. 2.7 kΩ 2200 μF pulse width D.U.T. 100 Ω VG 47 kΩ 1 kΩ AM01469v1 AM01468v1 Figure 16. Test circuit for inductive load switching and diode recovery times D G A D.U.T. S 25 Ω A L A B B 3.3 µF D G + VD 100 µH fast diode B Figure 17. Unclamped inductive load test circuit RG 1000 + µF 2200 + µF VDD 3.3 µF VDD ID D.U.T. S D.U.T. Vi _ pulse width AM01471v1 AM01470v1 Figure 19. Switching time waveform Figure 18. Unclamped inductive waveform ton V(BR)DSS td(on) VD toff td(off) tr tf 90% 90% IDM VDD 10% 0 ID VDD AM01472v1 VGS 0 VDS 10% 90% 10% AM01473v1 DS9606 - Rev 3 page 8/17 STB9NK80Z Package information 4 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. DS9606 - Rev 3 page 9/17 STB9NK80Z D²PAK (TO-263) type A package information 4.1 D²PAK (TO-263) type A package information Figure 20. D²PAK (TO-263) type A package outline 0079457_26 DS9606 - Rev 3 page 10/17 STB9NK80Z D²PAK (TO-263) type A package information Table 9. D²PAK (TO-263) type A package mechanical data Dim. mm Min. Max. A 4.40 4.60 A1 0.03 0.23 b 0.70 0.93 b2 1.14 1.70 c 0.45 0.60 c2 1.23 1.36 D 8.95 9.35 D1 7.50 7.75 8.00 D2 1.10 1.30 1.50 E 10.00 E1 8.30 8.50 8.70 E2 6.85 7.05 7.25 e 10.40 2.54 e1 4.88 5.28 H 15.00 15.85 J1 2.49 2.69 L 2.29 2.79 L1 1.27 1.40 L2 1.30 1.75 R V2 DS9606 - Rev 3 Typ. 0.40 0° 8° page 11/17 STB9NK80Z D²PAK (TO-263) type A package information Figure 21. D²PAK (TO-263) recommended footprint (dimensions are in mm) Footprint_26 DS9606 - Rev 3 page 12/17 STB9NK80Z D²PAK packing information 4.2 D²PAK packing information Figure 22. D²PAK tape outline DS9606 - Rev 3 page 13/17 STB9NK80Z D²PAK packing information Figure 23. D²PAK reel outline T 40mm min. access hole at slot location B D C N A G measured at hub Tape slot in core for tape start 2.5mm min.width Full radius AM06038v1 Table 10. D²PAK tape and reel mechanical data Tape Dim. DS9606 - Rev 3 Reel mm mm Dim. Min. Max. Min. A0 10.5 10.7 A B0 15.7 15.9 B 1.5 D 1.5 1.6 C 12.8 D1 1.59 1.61 D 20.2 E 1.65 1.85 G 24.4 F 11.4 11.6 N 100 K0 4.8 5.0 T Max. 330 13.2 26.4 30.4 P0 3.9 4.1 P1 11.9 12.1 Base quantity 1000 P2 1.9 2.1 Bulk quantity 1000 R 50 T 0.25 0.35 W 23.7 24.3 page 14/17 STB9NK80Z Revision history Table 11. Document revision history Date Version Changes 05-Jun-2013 1 First issue. 12-Jul-2013 2 Document status promoted from preliminary to production data. 21-Oct-2019 3 Modified Table 5. Dynamic and Section 4.1 D²PAK (TO-263) type A package information. Minor text changes. DS9606 - Rev 3 page 15/17 STB9NK80Z Contents Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 2 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 4 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 4.1 D²PAK (TO-263) type A package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4.2 D²PAK packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 DS9606 - Rev 3 page 16/17 STB9NK80Z IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2019 STMicroelectronics – All rights reserved DS9606 - Rev 3 page 17/17