STBB2
800 mA 2.5 MHz, high efficiency dual mode
buck-boost DC-DC converter
Datasheet - production data
• Cellular phones
Description
Flip Chip 20 (2.1 x 1.8 mm)
Features
• Operating input voltage range from 2.4 V to
5.5 V
• ± 2% output voltage tolerance over process
and temperature variations
• Bypass power save function
• Selectable output voltage with dedicated VSEL
pin
• Very fast line and load transients
• 2.5 MHz switching frequency
• Power save mode (PS) at light load
• Typical efficiency higher than 90%
• 50 µA max. quiescent current
The STBB2 is a fixed frequency, high efficiency,
buck-boost DC-DC converter which provides
output voltages from 1.2 V to 4.5 V starting from
input voltage from 2.4 V to 5.5 V. The device can
operate with input voltages higher than, equal to,
or lower than the output voltage making the
product suitable for single Li-Ion, multi-cell
alkaline or NiMH applications where the output
voltage is within the battery voltage range. The
low-RDS(on) N-channel and P-channel MOSFET
switches are integrated and help to achieve high
efficiency. The MODE pin allows the selection
between auto mode and forced PWM mode,
taking advantage from either lower power
consumption or best dynamic performance. The
bypass function allows the battery power saving.
In this operating mode, the high-side switches are
turned on so that the output voltage is equal to the
input voltage; in this condition the current
consumption is reduced to a maximum of 5 µA.
The device also includes soft-start control,
thermal shutdown, and current limit. The STBB2
is packaged in Flip Chip 20 bumps with 0.4 mm
pitch.
• Flip Chip 20 bumps 0.4 mm pitch 2.1 x 1.8 mm
Applications
• Memory card supply
Table 1. Device summary
Order codes
Markings
Packaging
Output voltages
STBB2JAD-R
BB2
Tape and reel
Adjustable
STBB2J29-R
B229
Tape and reel
2.9 V / 3.4 V
STBB2J30-R
B230
Tape and reel
3.0 V / 3.3 V
February 2014
This is information on a product in full production.
DocID022745 Rev 9
1/25
www.st.com
25
Contents
STBB2
Contents
1
Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
4
Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
5
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
6
Typical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
7
General description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
8
7.1
Dual mode operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
7.2
Enable pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
7.3
Bypass operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
7.4
VSEL pin operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
7.5
Protection features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
7.5.1
Soft-start and short-circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
7.5.2
Undervoltage lockout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
7.5.3
Overtemperature protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
8.1
Programming the output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
8.2
Inductor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
8.3
Input and output capacitor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
8.4
Layout guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
8.5
Product evaluation board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
8.6
Thermal consideration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
9
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
10
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
2/25
DocID022745 Rev 9
STBB2
1
Application schematic
Application schematic
Figure 1. Application schematic for fixed version
L1
VBAT
SW1
SW2
VOUT
VIN
C3
C4
C1
VINA
FB
VINA1
C2
MODE
EN
BP
VSEL
PGND
GND
Figure 2. Application schematic for adjustable version
L1
VBAT
SW1
SW2
VOUT
VIN
R1
C1
VINA
C3
C4
FB
R2
VINA1
C2
VSEL
EN
BP
MODE
PGND
GND
Table 2. Typical external components
Component
Manufacturer
Part number
Murata
GRM188R60J106M
TDK-EPC
C1608X5R0J106M
Murata
GRM188R61C105K
Murata
GRM188R60J106M
TDK-EPC
C1608X5R0J106M
Murata
LQH3NPN1R0NM0
Coilcraft
LPS3015-102ML
TDK-EPC
VLS252010ET1R0N
C1
C2
C3, C4
L(1)
Value
Size
10 µF
0603
1 µF
0603
10 µF
0603
3 x 3 x 1.4 mm
1.0 µH
R1
Depending on the output voltage, 0 Ω for fixed output version
R2
Depending on the output voltage, not used for fixed output
version
3.0 x 3.0 x 1.5 mm
2.5 x 2 x 1 mm
1. Inductor used for the maximum power capability. Optimized choice can be made according to the
application conditions (see Section 8).
Note:
All the above components refer to a typical application. Operation of the device is not limited
to the choice of these external components.
DocID022745 Rev 9
3/25
Block diagram
2
STBB2
Block diagram
Figure 3. Block diagram adjustable
SW2
SW1
VOUT
VIN
VINA1
-
+
Gate
driver
OSC
-
+
Σ
DMD
FB
+
VSUM
UVLO
COMP 1
EA
EN
OTP
Level shift
GND
OSC
MODE
+
-
COMP 2
OSC
VREF and
Soft-start
Burst
control 2
VINA
SHUT
DOWN
Burst
control 1
DMD
VSUM
+
LOGIC
CONTROL
DEVICE
CONTROL
VSEL
BP
VSEL
BP
AM10455v1
Figure 4. Block diagram fixed
SW2
SW1
VOUT
VIN
VINA1
-
+
Σ
Gate
driver
OSC
VSUM
UVLO
COMP 1
BP
-
OTP
Burst
control 2
COMP 2
OSC
Level shift
OSC
MODE
DMD
VSEL
DEVICE
CONTROL
BP
VSEL
BP
AM10456v1
4/25
DocID022745 Rev 9
VINA
EN
+
VREF and
Soft-start
SHUT
DOWN
Burst
Control 1
VSUM
+
EA
LOGIC
CONTROL
-
-
GND
DMD
+
VSEL
-
+
FB
STBB2
Absolute maximum ratings
3
Absolute maximum ratings
Table 3. Absolute maximum ratings
Symbol
VIN, VINA, VINA1
SW1,SW2
VOUT
MODE, EN, BP, VSEL
FB
Parameter
Value
Unit
Supply voltage
-0.3 to 7.0
V
Switching nodes
-0.3 to 7.0
V
Output voltage
-0.3 to 7.0
V
Logic pins
-0.3 to 7.0
V
Feedback pin
-0.3 to 6.0
V
Human body model
± 2000
Charged device model
± 500
ESD
TAMB
TJ
TSTG
Note:
V
Operating ambient temperature
Maximum operating junction temperature
Storage temperature
-40 to 85
°C
150
°C
-65 to 150
°C
Absolute maximum ratings are those values beyond which damage to the device may occur.
Functional operation under these conditions is not implied.
Table 4. Thermal data
Symbol
RthJA
Parameter
Value
Unit
Thermal resistance junction-ambient
(1)
°C/W
80
1. PCB condition: JEDEC standard 2s2P(4-layer).
DocID022745 Rev 9
5/25
Pin configuration
4
STBB2
Pin configuration
Figure 5. Pin connections (top view)
A4
B4
C4
D4
E4
[EN]
[BP]
[MODE]
[VSEL]
[GND]
A3
B3
C3
D3
E3
[VINA]
[VINA1]
[GND]
[GND]
[FB]
A2
B2
C2
D2
E2
[VIN]
[SW1]
[PGND]
[SW2]
[VO]
A1
B1
C1
D1
E1
[VIN]
[SW1]
[PGND]
[SW2]
[VO]
A1
B1
C1
D1
E1
[VIN]
[SW1]
[PGND]
[SW2]
[VO]
A2
B2
C2
D2
E2
[VIN]
[SW1]
[PGND]
[SW2]
[VO]
A3
B3
C3
D3
E3
[VINA]
[VINA1]
[GND]
[GND]
[FB]
A4
B4
C4
D4
E4
[EN]
[BP]
[MODE]
[VSEL]
[GND]
Bottom view
Top view
Table 5. Pin description
Pin name
Pin n°
VOUT
E1, E2
Output voltage.
SW2
D1, D2
Switch pin - internal switches C and D are connected to this pin. Connect inductor
between SW1 to SW2.
PGND
C1, C2
Power ground.
SW1
B1, B2
Switch pin - internal switches A and B are connected to this pin. Connect inductor
between SW1 and SW2.
EN
A4
Enable pin. Connect this pin to GND or a voltage lower than 0.4 V to shut down the IC. A
voltage higher than 1.2 V is required to enable the IC. Do not leave this pin floating.
MODE
C4
When in normal operation, the MODE pin selects between auto mode and forced PWM
mode. If the MODE pin is low, the STBB2 automatically switches between pulse-skipping
and standard PWM according to the load level. If the MODE pin is pulled high, the STBB2
always works in PWM mode. Do not leave this pin floating.
VINA
A3
Supply voltage for control stage.
VINA1
B3
A 100 Ω resistor is internally connected between VIN and VINA1. Connecting a 1 µF
capacitor between VINA1 and GND.
VIN
A1, A2
GND
FB
6/25
Description
Power input voltage. Connect a ceramic bypass capacitor (10 µF min.) between this pin
and PGND.
C3, D3, E4 Signal ground.
E3
Feedback voltage. For the fixed version this pin must be connected to VOUT.
DocID022745 Rev 9
STBB2
Pin configuration
Table 5. Pin description (continued)
Pin name
BP
VSEL
Pin n°
Description
B4
Bypass mode selection. When EN is high, connecting this pin to a voltage higher than 1.2
V, the device works in bypass mode. A voltage lower than 0.4 V is required to disable
bypass mode. In bypass mode VIN is shorted to VOUT through internal switches. Do not
leave this pin floating.
D4
Selection of output voltage for fixed versions (0 VOUT = 2.9 V / 1 VOUT = 3.4 V),
(0 VOUT = 3.0 V / 1 VOUT = 3.3 V).
This feature is not present in the adjustable version where the VSEL pin must be
connected to VINA. Do not leave this pin floating.
DocID022745 Rev 9
7/25
Electrical characteristics
5
STBB2
Electrical characteristics
- 40 °C < TA < 85 °C, VIN = 3.6 V; VOUT = 3.4 V, VEN = VIN, VBP = 0 V; typical values are at
TA = 25 °C, unless otherwise specified.
Table 6. Electrical characteristics
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
5.5
V
General section
VIN
Iq
VUVLO
fSW
IOUT
IPK
IPS-PWM
h
TON
TSHDN
Operating power input voltage
range
2.4
Shutdown mode
VEN = 0 V
0.5
2
µA
Pulse-skipping
IOUT = 0 A, VMODE = 0
35
50
µA
PWM mode
IOUT = 0 A, VMODE = VIN
8
10
mA
Bypass mode
VBP = VIN; IOUT = 0 A;
VMODE = 0, VIN = 2.4 to 5.5 V
5
10
µA
VIN rising; VMODE = VIN;
IOUT = 100 mA
2.1
2.35
VIN falling; VMODE = VIN;
IOUT = 100 mA
1.8
2.1
2.5
3
Undervoltage lockout threshold
Switching frequency
Continuous output current
V
2
(1)
2.5 V ≤ VIN ≤ 5.5 V
Switch current limitation
800
2.4
MHz
mA
2.5
PS to PWM transition
300
PWM to PS transition
280
2.7
A
mA
Efficiency
(VIN = 3.6 V; VOUT = 3.4 V)
Turn-on time (2)
IOUT =1 0 mA (PS mode)
85
IOUT = 50 mA (PS mode)
90
IOUT = 150 mA (PWM)
90
IOUT = 250 mA (PWM)
91
IOUT = 500 mA (PWM)
92
IOUT = 800 mA (PWM)
92
VEN from low to high;
IOUT = 10 mA
260
%
300
µs
Thermal shutdown
150
°C
Hysteresis
20
°C
Output voltage
VOUT
8/25
Output voltage range
1.2
DocID022745 Rev 9
4.5
V
STBB2
Electrical characteristics
Table 6. Electrical characteristics (continued)
Symbol
Parameter
Output voltage accuracy in PWM
mode
%VOUT
VFB
%VOUT
VIN = 2.5 to 5.5 V, VMODE = VIN
VSEL= GND/VIN
VIN = 2.5 to 5.5 V, VMODE = GND
Output voltage accuracy in power
VSEL = GND/VIN suitable output
save mode
current to keep PS operation
Min.
Max.
Unit
-1.5
+1.5
%
-3
+3
%
507
mV
Adjustable version
Maximum load regulation
ILOAD = from 10 mA to 800 mA
±0.5
%
IOUT = 100 mA
130
mV
FB pin leakage current
493
Typ.
Feedback voltage accuracy
VOPP-PS Peak-to-peak ripple in PS mode
ILKFB
Test conditions
500
VFB = 5.5 V
9
µA
0.4
V
Logic inputs
VIL
Low-level input voltage (EN,
MODE, BP, VSEL pins)
VIH
High-level input voltage (EN,
MODE, BP, VSEL pins)
ILK-I
Input leakage current (EN,
MODE, BP, VSEL pins)
1.2
VEN=VMODE=VBP=VSEL= 5.5 V
V
0.01
1
µA
P-channel on-resistance
130
350
mΩ
N-channel on-resistance
130
350
mΩ
Power switches
RDS(on)
ILKG-P
P-channel leakage current
VIN = VOUT = 5.5 V; VEN = 0
1
µA
ILKG-N
N-channel leakage current
VSW1 = VSW2 = 5.5 V; VEN = 0
1
µA
1. Not tested in production. This value is guaranteed by correlation with RDS(on), peak current limit and operating input
voltage.
2. Not tested in production.
DocID022745 Rev 9
9/25
Typical performance characteristics
6
STBB2
Typical performance characteristics
Table 7. Table of graphs
Maximum output
vs. input voltage
current
Efficiency
Waveforms
Figure 5
vs. output current (power save enabled, VIN = 2.5 V, 3.6 V, 4.5 V/VOUT = 3.4 V)
Figure 6
vs. output current (power save disabled, VOUT = 2.5 V, 3.6 V, 4.5 V/
VOUT = 3.4 V)
Figure 7
vs. output current (power save enabled, VIN = 2.5 V, 3.6 V, 4.5 V/VOUT = 2.9 V)
Figure 8
vs. output current (power save disabled, VOUT = 2.5 V, 3.6 V, 4.5 V/
VOUT = 2.9 V)
Figure 9
vs. input voltage power save enabled, VOUT = 3.4 V, IOUT = (10; 50; 150; 500;
800 mA)
Figure 10
vs. input voltage power save disabled, VOUT = 3.4 V, IOUT = (10; 500; 1000;
2000 mA)
Figure 12
vs. output current (PWM/Auto mode)
Figure 13
Load transient response VIN < VOUT
Figure 14
Load transient response VIN > VOUT
Figure 15
Line transient response (VOUT = 3.3 V, IOUT = 1500 mA)
Figure 16
Startup after enable (VOUT = 3.3 V, VIN = 2.4 V, IOUT = 300 mA)
Figure 17
Startup after enable (VOUT = 3.3 V, VIN = 4.2 V, IOUT = 300 mA)
Figure 18
Figure 6. Maximum output current vs. input voltage
AM10444v1
2200
2000
1800
IOUT max [ mA]
1600
1400
1200
1000
800
600
VOUT = 2.9 V
400
VOUT = 3.4 V
200
0
2
2.5
3
3.5
4
VIN [V]
10/25
DocID022745 Rev 9
4.5
5
5.5
STBB2
Typical performance characteristics
Figure 7. Efficiency vs. output current (power save mode enabled VOUT = 3.4 V)
100
90
80
Eff [%]
70
VOUT = 3.4 V
60
50
40
30
Vin = 2.5 V
20
Vin = 3.6 V
Power save mode enabled
10
Vin = 4.5 V
0
1
10
100
1000
IOUT [mA ]
AM01436v1
Figure 8. Efficiency vs. output current (power save mode disabled VOUT = 3.4 V)
AM10437v1
100
90
80
Eff [%]
70
VOUT = 3.4 V
60
50
40
30
Vin = 2.5V
20
Vin = 3.6V
10
Power save mode disabled
Vin = 4.5V
0
1
10
100
1000
IOUT [mA]
Figure 9. Efficiency vs. output current (power save mode enabled VOUT = 2.9 V)
AM10438v1
100
90
80
Eff [%]
70
60
VOUT = 2.9 V
50
40
30
Vin = 2.5V
20
Vin = 3.6V
Power save mode enabled
10
Vin = 4.5V
0
1
10
100
1000
IOUT [mA]
DocID022745 Rev 9
11/25
Typical performance characteristics
STBB2
Figure 10. Efficiency vs. output current (power save mode disabled V OUT = 2.9 V)
AM10439v1
100
90
80
Eff [%]
70
VOUT = 2.9 V
60
50
40
30
Vin=2.5V
20
Vin=3.6V
Power save mode disabled
10
Vin=4.5V
0
1
10
100
1000
IOUT [mA]
Figure 11. Efficiency vs. input voltage (power save enabled, VOUT = 3.4 V)
AM10440v1
100
90
80
VOUT = 3.4 V
Eff [%]
70
60
50
40
Iout = 10 mA
Iout = 50 mA
Iout = 150 mA
Iout = 500 mA
Iout = 800 mA
30
20
Power save mode
10
0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
VIN [V]
Figure 12. Efficiency vs. input voltage (power save disabled, VOUT = 3.4 V)
AM10441v1
100
90
80
VOUT = 3.4 V
Eff [%]
70
60
50
Iout=10 mA
40
Iout=50 mA
30
Iout =150 mA
20
Iout=500 mA
10
Power save mode
Iout=800 mA
0
2.5
3.0
3.5
4.0
VIN [V]
12/25
DocID022745 Rev 9
4.5
5.0
5.5
STBB2
Typical performance characteristics
Figure 13. Efficiency vs. output current (PWM / auto mode)
AM10442v1
100
90
80
Eff [%]
70
VOUT = 3.4 V
60
50
40
30
Vin=2.5V PWM mode
20
Vin=2.5V Auto mode
10
0
1
10
100
1000
IOUT [mA]
Figure 14. VIN = 2.4 V, VOUT = 3.4 V, IOUT = from 80 mA to 630 mA
Input voltage 200 mV/div,
DC Offset 2.46
VOUT = 3.4 V
Output Voltage
200 mV/div, AC
Output Current
500 mA/div
Time base 1 msec
Figure 15. VIN = 4.2 V, VOUT = 3.4 V, IOUT = from 80 mA to 1100 mA
VOUT = 3.4 V
Input voltage
200 mV/div, DC offset 4.2 V
Output Voltage
200 mV/div, AC
Output Current
500 mA/div
Time base 1 msec
DocID022745 Rev 9
13/25
Typical performance characteristics
STBB2
Figure 16. VIN = from 3.6 V to 4 V, VOUT = 3.4 V, IOUT = 300 mA
Input Voltage 400 mV/div,
Offset = 3.6 V
Output voltage
20 mV/div
Timebase 1 msec
Figure 17. Startup after enable (VOUT = 3.3 V, VIN = 2.4 V, IOUT = 300 mA)
SW2
SW1
VOUT
ISW
Figure 18. Startup after enable (VOUT = 3.3 V, VIN = 4.2 V, IOUT = 300 mA)
SW2
SW1
VOUT
ISW
14/25
DocID022745 Rev 9
STBB2
7
General description
General description
The STBB2 is a high efficiency dual mode buck-boost switch mode converter. Thanks to the
4 internal switches, 2 P-channels and 2 N-channels, it is able to deliver a well-regulated
output voltage using a variable input voltage which can be higher than, equal to, or lower
than the desired output voltage. This solves most of the power supply problems that circuit
designers face when dealing with battery powered equipment.
The controller uses an average current mode technique in order to obtain good stability in all
possible conditions of input voltage, output voltage and output current. In addition, the peak
inductor current is monitored to avoid saturation of the coil.
The STBB2 can work in two different modes: PWM mode or power save mode. In the first
case, the device operates with a fixed oscillator frequency in all line/load conditions. This is
the suitable condition to obtain the maximum dynamic performance. In the second case the
device operates in burst mode allowing a drastic reduction of the power consumption.
Top-class line and load transients are achieved thanks to a feed-forward technique and due
to the innovative control method specifically designed to optimize the performance in the
buck-boost region where input voltage is very close to the output voltage.
The STBB2 is self-protected from short-circuit and overtemperature. Undervoltage lockout
and soft-start guarantee proper operation during startup.
Input voltage and ground connections are split into power and signal pins. This allows
reduction of internal disturbances when the 4 internal switches are working. The switch
bridge is connected between the VIN and PGND pins while all logic blocks are connected
between VINA and GND.
7.1
Dual mode operation
The STBB2 works at fixed frequency pulse width modulation (PWM) or in power save mode
(PS) according to the different operating conditions. If the MODE pin is pulled high the
device works at fixed frequency pulse width modulation (PWM) even at light or no load. In
this condition, the STBB2 provides the best dynamic performance. If the MODE pin is logic
low, the STBB2 operation changes according to the average input current handled by the
device. At low average current the STBB2 is in PS mode allowing very low power
consumption and therefore obtaining very good efficiency event at light load. When the
average current increases, the device automatically switches to fixed switching frequency
mode in order to deliver the power needed by the load. In PS mode the STBB2 implements
a burst mode operation: if the output voltage increases above its nominal value the device
stops switching; as soon the VOUT falls below the nominal value the device restarts
switching.
7.2
Enable pin
The device turns on when the EN pin is pulled high. If the EN pin is low the device goes to
shutdown mode and all internal blocks are turned off. In shutdown mode the load is
electrically disconnected from the input to avoid unwanted current leakage from the input to
the load and the current drawn from the battery is lower than 1 µA in the whole temperature
range.
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General description
7.3
STBB2
Bypass operation
In bypass mode the output is connected directly to the battery by two P-channels and the
inductor. The bypass function has been implemented in order to save energy when the
application is in idle mode. At light load condition, the device can be in bypass mode to
reduce the current drained from the battery. In bypass mode the quiescent current is around
5 µA. Without bypass function, the buck-boost works in pulse-skipping mode with around 50
µA of current consumption. The device can be placed in bypass mode by the BYP pin.
Table 8. Bypass and enable matrix
7.4
EN
BP
MODE
Status
0
0
0
Shutdown
0
0
1
Shutdown
0
1
0
Shutdown
0
1
1
Shutdown
1
0
0
Auto mode
1
0
1
PWM mode
1
1
0
Bypass
1
1
1
Bypass
VSEL pin operation
For the fixed output voltage version, the FB pin must be connected to the VOUT pin. Fixed
output voltage versions have two different output voltages programmed internally which are
selected by programming high or low at VSEL. The higher output voltage is selected by
programming VSEL high and the lower output voltage is selected by programming VSEL
low. This feature is not present in the adjustable version, where the VSEL pin must be
connected to VINA.
Table 9. Output selection
P/N
VSEL
VOUT
Low
2.9 V
High
3.4 V
Low
3.0 V
High
3.3 V
STBB2J-29
STBB2J-30
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STBB2
General description
7.5
Protection features
7.5.1
Soft-start and short-circuit
After the EN pin is pulled high, the device initiates the start-up phase. The average current
limit is set to 400 mA at the beginning and is gradually increased while the output voltage
increases. As soon as the output voltage reaches 1.0 V, the average current limit is set to its
nominal value.
This method allows a current limit proportional to the output voltage. If there is a short in the
VOUT pin, the output current does not exceed 400 mA. This process is not handled by a
timer so the device is also able to start up even with large capacitive loads.
7.5.2
Undervoltage lockout
The undervoltage lockout function prevents improper operation of the STBB2 when the
input voltage is not high enough. When the input voltage is below the VUVLO threshold, the
device is in shutdown mode. The hysteresis of 100 mV prevents unstable operation when
the input voltage is close to the UVLO threshold.
7.5.3
Overtemperature protection
An internal temperature sensor continuously monitors the IC junction temperature. If the IC
temperature exceeds 150 °C (typ.), the device stops operating. As soon as the temperature
falls below 130 °C (typ.), normal operation is restored.
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Application information
STBB2
8
Application information
8.1
Programming the output voltage
The STBB2 is available in two versions: fixed output voltage and adjustable output voltage.
In the first case the device integrates the resistor divider needed to set the correct output
voltage and the FB pin must be connected directly to VOUT. For the fixed version, two
different output voltages, programmed internally by the VSEL pin, can be selected. For the
adjustable version, the VSEL pin must be connected to VIN. The resistor divider must be
connected between VOUT and GND and the middle point of the divider must be connected
to FB as shown in Figure 19.
Equation 1
V
R1 = R2 × OUT − 1
V
FB
Figure 19. Adjustable output voltage
L1
B1
B2
A1
A2
A3
C1
C2
B3
A4
GND
GND
SW1
SW1
SW2
SW2
VIN
VIN
VINA
VOUT
VOUT
STBB2
VINA1
FB
EN
B4
BP
C4
MODE
D4
VSEL
D1
D2
E1
E2
R1
C3
E3
PGND
PGND
C1
C2
GND
GND
GND
C3
D3
E4
R2
GND
GND
GND
GND
C4
GND
GND
AM10443v1
A suggested value for R2 is 100 kΩ. To reduce the power consumption a maximum value of
500 kΩ can be used.
8.2
Inductor selection
The inductor is the key passive component for switching converters. With a buck-boost
device, the inductor selection must take into consideration the following two conditions in
which the converter works:
•
as buck at the maximum operative input voltage of the application
•
as a boost at the minimum operative input voltage of the application
Two critical inductance values are then obtained according to the following formulas:
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STBB2
Application information
Equation 2
L MIN − BUCK
=
VOUT × ( VIN MAX − VOUT )
VIN MAX × fs × Δ IL
Equation 3
L MIN − BOOST =
VIN MIN × ( VOUT − VIN MIN )
VOUT × fs × Δ IL
where fs is the minimum value of the switching frequency and ΔIL is the peak-to-peak
inductor ripple current. The peak-to-peak ripple can be set at 10% or 20% of the output
current.
The minimum inductor value for the application is the highest between Equation 2 and
Equation 3. In addition to the inductance value, the maximum current, which the inductor
can handle, must be calculated in order to avoid saturation.
Equation 4
IPEAK − BUCK = (IOUT / η) +
VOUT × ( VIN MAX − VOUT )
2 × VIN MAX × fs × L
Equation 5
IPEAK −BOOST =
VOUT × IOUT VINMIN × ( VOUT − VINMIN )
+
2 × VOUT × fs × L
η × VINMIN
where η is the estimated efficiency. The maximum of the two above values must be
considered when the inductor is selected.
8.3
Input and output capacitor selection
It is recommended ceramic capacitors to be used with low ESR as input and output
capacitors in order to filter any disturbance present in the input line and to obtain stable
operation.
Minimum values of 10 µF for both capacitors are needed to achieve good behavior of the
device. The input capacitor must be placed as closer as possible to the device.
8.4
Layout guidelines
Due to the high switching frequency and peak current, the layout is an important design step
for all switching power supplies. If the layout is not fulfilled carefully, important parameters
such as efficiency and output voltage ripple may be compromised.
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Application information
STBB2
Short and wide traces must be implemented for main current and for power ground paths.
The input capacitor must be placed as closer as possible to the device pins as well as the
inductor and output capacitor.
The feedback pin (FB) is a high impedance node, so the interference can be minimized by
placing the routing of the feedback node as far as possible from the high current paths. A
common ground node minimizes ground noise.
8.5
Product evaluation board
Figure 20. Assembly layer
Figure 21. Top layer
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STBB2
Application information
Figure 22. Bottom layer
8.6
Thermal consideration
To enhance the thermal performance, the power dissipation capability of the PCB design
can be improved by traces as wider as possible. The maximum recommended junction
temperature (TJ) of the devices is 125 °C. The junction ambient thermal resistance of this
20-pin Flip Chip package is 80 °C/W, if all pins are soldered.
To the maximum ambient temperature TA = 85 °C the maximum power dissipated inside the
package is given by:
Equation 6
PDISS_MAX = (TJMAX - TAMAX) / RJA = (125 - 85) / 80 = 500 mW
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Package mechanical data
9
STBB2
Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK is an ST trademark.
Figure 23. Flip Chip 20 (2.1 x 1.8 mm) package dimensions
7504889_G
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STBB2
Package mechanical data
Table 10. Flip Chip 20 (2.1 x 1.8 mm) mechanical data
mm
Dim.
Min.
Typ.
Max.
A
0.52
0.56
0.60
A1
0.17
A2
0.35
0.36
0.37
b
0.23
0.25
0.29
D
2.03
2.06
2.09
D1
E
0.23
1.6
1.71
1.74
E1
1.2
e
0.40
SE
0.20
fD
0.23
fE
0.27
ccc
0.075
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Revision history
10
STBB2
Revision history
Table 11. Document revision history
Date
Revision
27-Jan-2012
1
First release.
27-Mar-2012
2
Datasheet promoted from preliminary data to production data.
Removed: order code STBB2J28-R Table 1 on page 1.
09-May-2012
3
Modified: marking BB2 Table 1 on page 1, description pin B4 and D4 Table 5
on page 6.
26-Jul-2012
4
Modified: C2 value Table 2 on page 3.
Updated: Figure 20, Figure 21 and Figure 22 on page 21.
19-Sep-2012
5
Modified: Figure 2 on page 3.
06-Mar-2013
6
Added: new order code STBB2J33-R Table 1 on page 1.
17-Dec-2013
7
Changed order code from the STBB2J33-R to the STBB2J30-R in Table 1:
Device summary and in Table 9: Output selection.
Changed VOPP-PS typ. value from 100 to 130 in Table 6: Electrical
characteristics.
Minor text changes.
20-Jan-2014
8
Updated mechanical data.
9
Updated Features and Description in cover page.
Changed typ. and max. values of VUVLO parameter in Table 6.
Changed VIN min. value in Table 6.
Changed VIN test conditions of Iq parameter in Table 6.
Changed IPK min. value in Table 6.
Updated Table 7.
12-Feb-2014
24/25
Changes
DocID022745 Rev 9
STBB2
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