STBC03
Datasheet
Li-Ion linear battery charger with LDO and load switches
Features
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Maturity status link
STBC03
Device summary
Order code
STBC03JR
LDO
3.0 V
Package
400 µm pitch
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Charges single-cell Li-Ion batteries with CC/CV algorithm and charge
termination
Fast charge current up to 650 mA adjustable by external resistor
Pre-charge current from 1 mA
Adjustable floating voltage up to 4.45 V
Integrated low quiescent LDO regulator
Automatic power path management
Auto-recharge function
Embedded protection circuit module (PCM) featuring battery overcharge, battery
over-discharge and battery overcurrent protections
Charging timeout
Shipping mode feature allows battery low leakage when over-discharged
Very low battery leakage in over-discharge and shutdown mode
Charger enable input
Charge/fault status output
Battery voltage pin to allow external gauging
Two 3 Ω SPDT load switches
Available in Flip Chip 30, 400 µm pitch package
Rugged ±4 kV HBM, ESD protection on the most critical pins
Applications
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Smart watches and wearable devices
Fitness and medical accessories
Li-Ion and other Li-Poly battery rechargeable equipment
Description
The STBC03 is a highly integrated power management, embedding a linear battery
charger, a 150 mA LDO, 2 SPDT load switches, and a protection circuit module
(PCM) to prevent the battery from being damaged under fault conditions.
The STBC03 uses a CC/CV algorithm to charge the battery; the fast charge and
the pre-charge current can be both independently programmed using dedicated
resistors. The termination current is set to 5% of the programmed fast charge current,
but has fixed values for fast charge currents lower than 20 mA. The battery floating
voltage value is programmable and can be set to a value up to 4.45 V.
The STBC03 also features a charger enable input to stop the charging process
anytime.
The STBC03 is automatically powered off from the connected battery when the IN pin
is not connected to a valid power source (battery mode).
A battery under/overtemperature condition can be detected by using an external
circuitry (NTC thermistor).
The STBC03 draws less than 10 nA from the connected battery in shipping mode
conditions, so to maximize the battery life during shelf life of the final application. The
device is available in the Flip Chip 30 package.
DS11889 - Rev 6 - March 2022
For further information contact your local STMicroelectronics sales office.
www.st.com
STBC03
Application schematic
1
Application schematic
Figure 1. STBC03 application schematic
Table 1. Typical bill of material (BOM)
Symbol
Value
Description
Note
CIN
10 µF (16 V)
Input supply voltage capacitor
Ceramic type
CSYS
1 µF (10 V)
System output capacitor
Ceramic type
RISET
Refer to ISET
Charge current programming resistor
Film type
RIPRE
Refer to IPRE
Pre-charge current programming resistor
Film type
CBAT
4.7 µF (6.3 V)
Battery positive terminal capacitor
Ceramic type
RFLOAT
BATSNSFV
Floating voltage programming resistor
Film type
RDIV1, DIV2
100-200 kΩ
Battery monitor resistor divider
Film type
RCHG
10 kΩ
Charging/fault pull-up resistor(1)
Film type
CLDO
1.0 µF (10 V)
LDO output capacitor
Ceramic type
1. RCHG must be calculated according to the external LED electrical characteristics.
DS11889 - Rev 6
page 2/31
STBC03
Pin configuration
2
Pin configuration
Figure 2. Pin configuration top through view
Table 2. Pin description
Bump
name
Description
IN
E5-F5
Input supply voltage. Bypass this pin to ground with a 10 µF capacitor
BAT
A5-B5
Battery positive terminal. Bypass this pin to GND with a 4.7 µF ceramic capacitor
SYS
C5-D5
System output. Bypass this pin to ground with 1 µF ceramic capacitor
LDO
F4
LDO output. Bypass this pin to ground with 1 µF ceramic capacitor
NTC
D1
Battery temperature monitor pin
AGND
B4
Analog ground
GND
A3
GROUND
ISET
A4
Fast charge current programming resistor
IPRE
D4
Pre-charge current programming resistor
BATMS
C4
Battery voltage measurement pin
BATSNS
B3
Battery voltage sensing. Connect as close as possible to the battery positive terminal
BATSNSFV
A2
Floating voltage sensing. Connect as close as possible to the battery positive terminal
CEN
B1
Charger enable pin. Active high. 500 kΩ internal pull-up (to LDO)
CHG
E1
Charging/fault flag. Active low (open drain output)
WAKE-UP
D2
Shipping mode exit input pin. Active high. 50 kΩ internal pull-down
SW_SEL2
C1
Load switch 2 selection input (refer to LDO level)
BATMS_EN
C2
Battery monitor enable input (refer to LDO level)
SW_SEL1
B2
Load switch 1 selection input (refer to LDO level)
SD
A1
Shutdown input signal (refer to LDO level). When low, the STBC03 exits ship mode. It
cannot be left floating
SW1_I
F3
Load switch SPDT1 input (1.8 V
to 5 V range)
SW1_OA
E4
Load switch SPDT1 output A
SW1_OB
E3
Load switch SPDT1 output B
SW2_I
E2
Load switch SPDT2 input (1.8 V
to 5 V range)
Bump
Power
Programming
Sensing
Digital I/Os
Switch matrix
DS11889 - Rev 6
Connect together with the same ground layer
If SPDT switches are used, decoupling capacitors
are recommended on input and output. Capacitor
values depend on application conditions and
requirements.
If not used, connect inputs and outputs to GND
page 3/31
STBC03
Pin configuration
Bump
name
Bump
Description
SW2_OA
F2
Load switch SPDT2 output A
SW2_OB
F1
Load switch SPDT2 output B
NC
C3-D3
Not connected
Switch matrix
DS11889 - Rev 6
If SPDT switches are used, decoupling capacitors
are recommended on input and output. Capacitor
values depend on application conditions and
requirements.
If not used, connect inputs and outputs to GND
Leave floating
page 4/31
STBC03
Maximum ratings
3
Maximum ratings
Table 3. Absolute maximum ratings
Note:
Symbol
Parameter
Test conditions
Value
Unit
VIN
Input supply voltage pin
DC voltage
-0.3 to +10.0
V
Non repetitive, 60 s pulse
length
-0.3 to +16.0
V
VLDO
LDO output pin voltage
DC voltage
-0.3 to +4.0
V
VSYS
SYS pin voltage
DC voltage
-0.3 to +6.5
V
VSW
Switch pin voltage (SW1_I, SW2_I, SW1_OA,
SW1_OB, SW2_OA, SW2_OB)
DC voltage
-0.3 to +6.5
V
VCHG
CHG pin voltage
DC voltage
-0.3 to +6.5
V
VWake-up
WAKE-UP pin voltage
DC voltage
-0.3 to +4.6
V
VLGC
Voltage on logic pins (CEN, SW_SEL1,
SW_SEL2, SD,BATMS_EN)
DC voltage
-0.3 to +4.0
V
VISET, VIPRE
Voltage on ISET, IPRE pins
DC voltage
-0.3 to +2
V
VNTC
Voltage on NTC pin
DC voltage
-0.3 to VLDO
V
VBAT, VBATSNS,
VBATSNSFV
Voltage on BAT, BATSNS and BATSNSFV pins
DC voltage
-0.3 to +5.5
V
VBATMS
Voltage on BATMS pin
DC voltage
-0.3 to VBAT+0.3
V
ESD
Human body model (IN, SYS, WAKE-UP, LDO,
BAT, BATSNS, BATSNSFV)
JS-001-2012 vs. AGND
PGND and GND
±4000
V
Human body model (all the others)
JS-001-2012
±2000
V
TAMB
Operating ambient temperature
-40 to +85
°C
TJ
Maximum junction temperature
+125
°C
TSTG
Storage temperature
-65 to +150
°C
Absolute maximum ratings are those values beyond which damage to the device may occur. Functional
operation under these conditions is not implied.
Table 4. Thermal data
Symbol
Parameter
Flip Chip 30 (2.25x2.59 mm)
Unit
RTHJB (1)
Junction-to-pcb board thermal resistance
50
°C/W
1. Standard FR4 pcb board.
DS11889 - Rev 6
page 5/31
STBC03
Electrical characteristics
4
Electrical characteristics
VIN=5 V, VBAT = 3.6 V, CLDO = 1 µF, CBAT = 4.7 µF, CIN = 10 µF, CSYS = 1 µF, RISET = 1 kΩ, SD = GND, CEN =
high, RIPRE = 4.7 kΩ, TA = 25 °C, SW_SEL1 = SW_SEL2 = GND, BATMS_EN = GND, WAKE-UP floating unless
otherwise specified.
Table 5. Electrical characteristics
Symbol
Test conditions
Min.
Max.
Unit
VFLOAT set 4.2 V, IFAST < 250 mA
4.55
5.4
V
Operating input voltage
VFLOAT set 4.45 V, IFAST < 450 mA, ISYS = ILDO = 0
mA
4.75
5.4 (1)
V
VINOVP
Input overvoltage protection
VIN rising
5.6
6.4
V
VINOVPH
Input overvoltage protection
hysteresis
VIN falling
200
mV
VUVLO
Undervoltage lock-out
VIN falling
3.9
V
VUVLOH
Undervoltage lock-out hysteresis
VIN rising
300
mV
Charger disabled mode (CEN = low), ISYS = ILDO =
0A
600
μA
Charging, VHOT < VNTC < VCOLD, including RISET
current
1.4
mA
VIN
IIN
VFLOAT
IBAT
IFAST
Parameter
IN supply current
Battery floating voltage
BAT pin supply current
Fast charge current
IBAT = 1 mA, BATSNS and BATSNSFV short to
battery terminal
4.179
Typ.
5.9
4.2
4.221
V
Battery-powered mode (VIN < VUVLO), ILDO = 0 A
4
8
µA
Charge terminated
9
12
µA
Shutdown mode (by SD pin)
10
50
Over-discharge mode (VBAT < VODC, VIN < VUVLO)
10
50
RISET = 300 Ω
650(1)
RISET = 430 Ω, constant-current mode ILDO+ ISYS
< 150 mA
450(1)
500
nA
mA
RISET = 1 kΩ, constant-current mode
200
RIPRE = 10 kΩ, constant-current mode
20
mA
IPRE
Pre-charge current
VISET
ISET regulated voltage
1
V
VIPRE
IPRE regulated voltage
1
V
VPRE
Pre-charge to fast charge battery
voltage threshold
Charger active
3
V
IEND
End-of-charge current
Charging in CV mode for 20 mA < IFAST
5
%IFAST
VOCHG
Battery voltage overcharge
threshold
Charging in CV mode for IFAST< 20 mA
VBAT rising, BATSNSFV short to battery terminal
See Table 10. IFAST and IEND
4.245
VBAT rising, external resistor between BATSNSFV
and battery terminal
4.275
4.305
VFLOAT+75
V
mV
VODC
Battery voltage over-discharge
threshold
VIN < VUVLO, ILDO = 150 mA, BATSNSFV and
BATSNS short to battery terminal
VODCR
Battery voltage over-discharge
release threshold
VUVLO < VIN < VOVP, ILDO = 150 mA, BATSNSFV
and BATSNS short to battery terminal
3.0
V
Wake-up voltage threshold
VBAT>3 V rising, ILDO = 150 mA
2.2
V
VWAKE-UP
DS11889 - Rev 6
2.750
2.8
2.850
V
page 6/31
STBC03
Electrical characteristics
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
RON-IS
Input to SYS on-resistance
0.25
0.35
Ω
RON-BS
Battery to SYS on-resistance
0.35
0.4
Ω
RON-BATMS
BATSNS to BATMS on-resistance
ISINK = 500 µA
290
550
Ω
RON-LOADSW1
Input to output load switch 1
resistance
VSW1_I = 1.8 V to 5 V SW1_OA or SW1_OB test
current = 50 mA
2.0
3.8
Ω
RON-LOADSW2
Input to output load switch 2
resistance
VSW2_I = 1.8 V to 5 V
2.0
3.4
Ω
VOL
Output low level (CHG)
ISINK = 5 mA
0.4
V
IOHZ
High level open drain output
current (CHG)
VOH = 5 V
1
μA
0.4
V
SW2_OA or SW2_OB test current = 50 mA
VIL
Logic low input level
(CEN, SW_SEL1, SW_SEL2,
BATMS_EN, SD)
VIH
Logic high input level
(CEN, SW_SEL1, SW_SEL2,
BATMS_EN, SD)
1.6
RUP
CEN pull-up resistor
375
500
625
kΩ
VLDO
LDO output voltage
ILDO = 1 mA
2.9
3.0
3.1
V
LDO static load regulation
ILDO = 1 mA to 150 mA
±0.002
±0.003
%/mA
ISC
LDO short-circuit current
RLOAD = 0 Ω
tON
LDO turn-on time
ΔVOUT-LOAD
350
mA
0 to 95% VLDO, IOUT = 150 mA
210
µs
Battery discharge overcurrent
protection
VIN VILIMSCTH; VUVLO < VIN < VINOVP (powered
from IN)
1.7
A
SYS voltage threshold for input
current limitation short-circuit
detection
VUVLO < VIN < VINOVP
2
V
SYS short-circuit protection
threshold
VIN < VUVLO or VIN>VINOVP (powered from BAT)
VBAT-0.8
V
INTCB
NTC pin bias current
VNTC = 0.25 V
VHOT
Thermal hot threshold
VCOLD
THYST
IBATOCP
IINLIM
VILIMSCTH
VSCSYS
250
V
45
50
55
µA
Increasing NTC temperature
0.234
0.246
0.258
V
Thermal cold threshold
Decreasing NTC temperature
1.28
1.355
1.43
V
Hot/cold temperature thresholds
hysteresis
10 kΩ NTC, ß = 3370
3
°C
Thermal shutdown die temperature
155
°C
TWRN
Thermal warning die temperature
135
°C
tPW-VIN
Minimum input voltage connection
time to exit from shutdown mode
VBAT = 3.5 V, RNTC = 10 kΩ
350
ms
tOCD
Overcharge detection delay
VBAT> VOCHG, VUVLO IBATOCP, VIN VINOVP
10
ms
tPFD
Pre-charge to fast charge transition
Rising
deglitch time
100
ms
TSD
DS11889 - Rev 6
page 7/31
STBC03
Electrical characteristics
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
tFPD
Fast charge to pre-charge fault
deglitch time
10
ms
tEND
End-of-charge deglitch time
100
ms
tPRE
Pre-charge timeout
1800
s
tFAST
Fast charge timeout
tCRDD
Charger restart deglitch time
After end-of-charge, VBAT < 3.9 V restart enabled
VREC
Charger restart threshold
After end-of-charge, restart enabled
tNTCD
Battery temperature transition
deglitch time
tPW
tPW-WA
CEN valid input pulse width
WAKE-UP valid input pulse width
VBAT = 2 V, charging
14000
18000
22000
s
1200
ms
3.9
V
100
ms
15
ms
1200
ms
1. If the internal thermal temperature of the STBC03 reaches TWRN, then the programmed IFAST is halved until the internal temperature drops
below TWRN - 10 °C typically. A warning is signaled via the CHG output.
DS11889 - Rev 6
page 8/31
STBC03
Typical performance characteristics
5
Typical performance characteristics
Figure 3. Battery mode 3 V LDO load transient response
VBAT = 3.7 V, 10 mA to 150 mA, slope 150 mA/1 µs
CH2 (red) = LDO 1 V/div
CH3 (green) = LDO 10 mV/div
CH4 (pink) = LDO load variation
Figure 5. VIN mode, overvoltage protection
Charging is resumed when OVP disappears
CH1 (blue) = VIN 800 mV/div
CH2 (red) = VSYS 800 mV/div
CH3 (green) = VBAT 800 mV/div
CH4 (pink) = IBAT 20 mA/div
DS11889 - Rev 6
Figure 4. Thermal management
VBAT = 3.7 V, VIN = 5.0 V
CH1 (blue) = VIN
CH2 (red) = LDO
CH3 (green) = CHG
CH4 (pink) = IBAT
Figure 6. Pre-charge to fast charge mode transition
threshold
CH1 (blue) = VIN 800 mV/div
CH2 (red) = VSYS 800 mV/div
CH3 (green) = VBAT 800 mV/div
CH4 (pink) = IBAT 20 mA/div
page 9/31
STBC03
Typical performance characteristics
Figure 7. Pre-charge to fast charge mode transition
deglitch
Figure 8. Pre-charge to fast charge mode to no charge
mode transition
CH1 (blue) = VIN 800 mV/div
CH1 (blue) = VIN 800 mV/div
CH2 (red) = VSYS 800 mV/div
CH2 (red) = VSYS 800 mV/div
CH3 (green) = VBAT 800 mV/div
CH3 (green) = VBAT 800 mV/div
CH4 (pink) = IBAT 20 mA/div
CH4 (pink) = IBAT 20 mA/div
Figure 9. Wake-up pin operation
Shutdown mode to battery mode transition. VIN floating
CH1 (blue) = WAKE-UP pin 800 mV/div
CH2 (red) = VSYS 800 mV/div
CH3 (green) = VBAT 800 mV/div
DS11889 - Rev 6
Figure 10. VIN plug, charging initialization
Shutdown mode to VIN mode transition
CH1 (blue) = VIN 800 mV/div
CH2 (red) = VSYS 800 mV/div
CH3 (green) = VBAT 800 mV/div
CH4 (pink) = IBAT 20 mA/div
page 10/31
STBC03
Typical performance characteristics
Figure 11. Wake-up operation, VSYS and LDO rise
overview
Figure 12. Wake-up operation, VSYS and LDO rise detail
CH1 (blue) = VLDO 800 mV/div
CH1 (blue) = VLDO 800 mV/div
CH2 (red) = VSYS 800 mV/div
CH2 (red) = VSYS 800 mV/div
CH3 (green) = VBAT 800 mV/div
CH3 (green) = VBAT 800 mV/div
CH4 (pink) = Wake-up 3 V/div
CH4 (pink) = Wake-up 3 V/div
Figure 13. VIN plug, charging initialization battery mode to
VIN mode transition
CH1 (blue) = VIN 800 mV/div
CH2 (red) = VSYS 800 mV/div
CH3 (green) = VBAT 800 mV/div
CH4 (pink) = IBAT 20 mA/div
DS11889 - Rev 6
Figure 14. Shutdown mode entry
By SD pin
CH1 (blue) = SD pin, 1 V/div
CH2 (red) = SYS pin, 1 V/div
page 11/31
STBC03
Typical performance characteristics
Figure 15. VBAT to VSYS drop and VSYS to VLDO drop
(10 mA)
Figure 16. VBAT to VSYS drop and VSYS to VLDO drop
(100 mA)
LDO loaded by 10 mA; VODC cut-off
LDO loaded by 100 mA; VODC cut-off
CH1 (blue) = VLDO 400 mV/div
CH1 (blue) = VLDO 400 mV/div
CH2 (red) = VSYS 400 mV/div
CH2 (red) = VSYS 400 mV/div
CH3 (green) = VBAT 400 mV/div
CH3 (green) = VBAT 400 mV/div
CH4 (pink) = ILDO 10 mA/div
CH4 (pink) = ILDO 20 mA/div
Figure 17. CEN operation
Figure 18. CEN operation, VIN plug/unplug
CH1 (blue) = CEN 3 V/div
CH1 (blue) = IN pin 3.0 V/div
CH3 (green) = VBAT 800 mV/div
CH3 (green) = CEN 2.0 V/div
CH4 (pink) = IBAT 20 mA/div
CH4 (pink) = IBAT 30 mA/div
DS11889 - Rev 6
page 12/31
STBC03
Functional pin description
6
Functional pin description
6.1
GND, AGND
The STBC03 ground pins.
6.2
NTC
The battery temperature monitoring pin. Connect the battery NTC thermistor to this pin. The charging cycle stops
when the battery temperature is outside of the safe temperature range (0 °C to 45 °C). When the charging cycle is
completed, the NTC pin goes to a high impedance state, therefore the NTC thermistor can be also used, together
with an external circuitry, to monitor the battery temperature while it is being discharged. If the NTC thermistor is
not used, a 10 kΩ resistor must be connected to ensure proper IC operations.
6.3
ISET, IPRE
Fast and pre-charge current programming pins. Connect two resistors (RISET, RIPRE) to ground to set the fast and
pre-charge current (IFAST, IPRE) according to the following equation (valid for IFAST, IPRE > 5 mA):
Equation 1:
V
V
IPRE = IPRE *K ; I
= RISET *K
RIPRE
FAST
ISET
(1)
Where VISET = VIPRE = 1 V and K = 200. Fast charge and pre-charge currents can be independently set from 1
mA to 650 mA. End-of-charge current value is typically 5% of the fast charging current value being set.
For low charging current (IFAST, IPRE < 5 mA), the RISET and RIPRE values in the following table must be used.
Table 6. Charging current setting
IFAST, IPRE
RISET, RIPRE
5 mA
40.5 k
2 mA
110 k
1 mA
260 k
Both RISET and RIPRE must be always used. Short-circuit to ground or open circuit are not allowed options.
6.4
BATMS, BATMS_EN
Battery voltage measurement. If BATMS_EN is high, the BATMS pin is internally shorted to the BATSNS pin
during normal conditions to monitor the battery voltage using external components (µC and embedded ADC).
The internal path from BATMS pin to the battery is opened in case any of the following conditions occur:
overcurrent, battery over-discharge, shutdown mode, short-circuit on SYS or LDO. To minimize overall system
power consumption, this function must be disabled. BATMS_EN pin should be pulled low.
6.5
BATSNS, BATSNSFV
Battery voltage sense pin. The BATSNS pin must be connected as close as possible to the battery positive
terminal to ensure the maximum accuracy on the floating voltage and on the battery voltage protection thresholds.
The BATSNSFV pin can be used to fix the VFLOAT value by connecting a proper external series resistor to
BATSNSFV. The battery floating voltage can be set up to 4.45 V according to the following equation:
Equation 2:
Rfloat
Rfloat
Vfloatadj = Vfloatdef * 1 + 1MΩ V = 4.2* 1 + 1MΩ V
(2)
Example: to set the battery floating voltage for 4.35 V, refer to the following equation.
Equation 3:
Rext = 1MΩ *
DS11889 - Rev 6
Vfloatadj
4.35V
− 1 = 1MΩ* 4.2V − 1 = 35.7KΩ
4.2V
(3)
page 13/31
STBC03
BAT
If the BATSNSFV pin is connected to the battery positive terminal, the floating voltage is set for its 4.2 V default
value.
6.6
BAT
External battery connection pin (positive terminal). A 4.7 µF ceramic bypass capacitor must be connected to
GND.
6.7
IN
5 V input supply voltage pin. The STBC03 is powered off from this pin when a valid voltage source is detected,
meaning a voltage higher than VUVLO and lower than VINOVP. A 10 µF ceramic bypass capacitor must be
connected to GND.
6.8
SYS
The internal LDO input voltage and external unregulated supply pin. The maximum current deliverable through
this pin depends on the following two conditions: LDO load and battery status. However, if none of the above
loads sinks current, the maximum SYS current budget is 650 mA, provided that the input voltage source can
deliver that amount of current.
SYS voltage source can be either IN or BAT, depending on the operating conditions (refer to the following table).
A ceramic bypass capacitor of 1 µF must be connected to GND.
Table 7. SYS voltage source
VIN
< VUVLO
VBAT
< VODC
(1)
SYS status
LDO status
Not powered
Off
< VUVLO
> VODC
VBAT
On
> < VUVLO and < VINOVP
X (don’t care)(3)
VIN
On
> VINOVP
< VODC
Not powered
Off
> VINOVP
> VODC
VBAT
On
1. VODCR if the shutdown mode or the over-discharge protection has been previously activated.
2. Voltage drop over internal MOSFET is not included.
3. Battery disconnected (0 V) or fully discharged. Resistive short-circuit is not supported for safety reasons.
6.9
LDO
LDO output voltage pin. The maximum current capability is anyhow 150 mA. A 1 µF ceramic bypass capacitor
must be connected to GND.
6.10
WAKE-UP
Wake-up input pin. To restore normal operations of the STBC03, so to exit from a shutdown condition, connect
the WAKE-UP pin to the battery voltage. The STBC03 is enabled to operate in normal conditions again, only if the
battery voltage is higher than VODCR (3 V). A deglitch delay is implemented to prevent unwanted false operations.
The above-described WAKE-UP pin functionality is disabled when a valid VIN voltage source is detected. The pin
has an internal 50 kΩ pull-down resistor.
DS11889 - Rev 6
page 14/31
STBC03
CHG
6.11
CHG
Active low, open drain charging/fault flag output pin. The CHG provides status information about VIN voltage
level, battery charging and faults by toggling at different frequencies as reported in the table below.
Table 8. CHG pin state
Device state
CHG pin state
Not valid input (VIN <
VBAT or VIN > VINOVP
or VIN < VINUVLO)
High Z (high by
external pull-up)
Valid input (VIN
>VINUVLO, VIN <
VINOVP, VBAT < VIN
and CEN low)
Low
End-of-charge
(EOC)
6.12
Note
Toggling 4.1 Hz
(until USB is
disconnected)
Charging phase (pre
and fast)
Toggling 6.2 Hz
Overcharge fault
Toggling 8.2 Hz
Charging timeout
(pre-charge, fast
charge)
Toggling 10.2 Hz
Battery voltage
below VPRE after the
fast charge starts
Toggling 12.8 Hz
Charging thermal
limitation (thermal
warning)
Toggling 14.2 Hz
Battery temperature
fault (NTC warning)
Toggling 16.2 Hz
In case of synchronous alarm events, the highest toggling frequency has higher
priority.
Example: NTC warning and EOC are concurrent events. NTC warning, signaled
by toggling CHG at 16.2 Hz is the only signal available till the battery temperature
goes back to a safe range (0 °C to 45 °C). If an EOC condition is still present then
a 4.1 Hz toggling signal is present.
CEN
Internal CC/CV charger block enable pin. A low logic level on this pin disables the internal CC/CV charger block.
Transitioning CEN from high to low and then back to high, allows the CC/CV charger block to be restarted if it was
stopped due to one of the following conditions:
•
•
Charging timeout (pre-charge, fast charge)
Battery voltage below VPRE after the fast charge has already started
•
End-of-charge
CEN has no effect if the charging cycle has been stopped by a battery overcharge condition.
If the CC/CV charger stops the charging cycle due to an out of range battery temperature, a low logic level on
the CEN pin disables the CC/CV charger and resets the charging timeout timers. If CEN is set high, the CC/CV
charger restarts normal operations, assuming that no fault condition is detected. CEN is internally pulled up to
LDO via a 500 kΩ resistor and must be either left floating or tied to LDO when the STBC03 is powered for the first
time.
The auto-recharge function is always enabled so, the CC/CV charger restarts automatically charging the battery if
VBAT goes below 3.9 V; a deglitch time delay has been added to prevent unwanted charging cycle from restarting.
6.13
SD
The shutdown pin. In battery mode (if no valid VBUS voltage is present) a logic high level on this pin asserts the
low power consumption mode. If SD is kept high when a pulse is applied to WAKE-UP pin the device exits the
shutdown condition for the duration of the WAKE-UP pulse. In shutdown mode, the battery drain is then reduced
to less than 50 nA. If a valid VBUS voltage is present, the SD pin status has no effect and the device is always out
of the shutdown condition.
DS11889 - Rev 6
page 15/31
STBC03
SW1_OA, SW1_OB, SW1_I, SW2_OA, SW2_OB, SW2_I
6.14
SW1_OA, SW1_OB, SW1_I, SW2_OA, SW2_OB, SW2_I
SPDT load switch pins. Both of SPDT load switches are controlled by the digital control pins (see section below).
Each SPDT features a typical RDS(on) of 3 Ω. SPDT load switches can be paralleled to reduce the series resistor
as well as to increase the allowable flowing current.
6.15
SW_SEL1 and SW_SEL2
SW_SEL1 and SW_SEL2 drive the SPDT switches according to the following table. They should be connected to
GND if not used.
Table 9. SW_SEL1, SW_SEL2 operation
INPUTS
DS11889 - Rev 6
OUTPUTS
SW_SEL 1
SW_SEL2
SW1_OA
SW1_OB
SW2_OA
SW2_OB
0
0
SW1_I
Hi-Z
SW2_I
Hi-Z
1
0
Hi-Z
SW1_I
SW2_I
Hi-Z
0
1
SW1_I
Hi-Z
Hi-Z
SW2_I
1
1
Hi-Z
SW1_I
Hi-Z
SW2_I
page 16/31
STBC03
Block diagram
7
Block diagram
Figure 19. STBC03 block diagram
DS11889 - Rev 6
page 17/31
STBC03
Operation description
8
Operation description
The STBC03 is a power management IC integrating a battery charger with an embedded power path function, a
150 mA low quiescent LDO, two SPDT load switches and a protection circuit module (PCM) to prevent the battery
from being damaged.
When powered off from a single-cell Li-Ion or Li-Poly battery, and after having performed all the safety checks, the
STBC03 starts charging the battery using a constant-current and constant-voltage algorithm.
The embedded power path allows simultaneously the battery to be charged and the overall system to be supplied.
By contrast, when the input voltage is above the valid range, the battery supplies the LDO as well as every load
connected to SYS.
The STBC03 also protects the battery in case of:
•
•
•
•
Overcharge
Over-discharge
Charge overcurrent
Discharge overcurrent
If a fault condition is detected when the input voltage is valid (VUVLO < VIN < VINOVP), the CHG pin starts toggling,
signaling the fault.
The device can also be in shutdown mode (shutdown IBAT < 50 nA) maximizing the battery life of the end-product
during its shelf life.
8.1
Power-on
When the STBC03 is in shutdown mode, any load connected to LDO and to SYS is not supplied.
An applied valid input voltage (VUVLO < VIN < VINOVP) for at least 250 ms, regardless the presence of a battery or
if the battery is fully depleted, allows the loads connected to SYS and LDO to be supplied, thus enabling proper
system operations.
The CEN pin must be left floating or tied high (LDO level) during the power-on for proper operations. The STBC03
can be also turned on when VIN is outside the valid range, below the conditions that the battery has at least a
remaining charge of 3 V and the wake-up input is properly triggered. The STBC03 features an UVLO circuit that
prevents oscillations if the input voltage source is unstable. The CEN pin must be left floating or tied to a high
level (LDO) when the STBC03 is powered.
8.2
Battery charger
The STBC03 allows single-cell Li-Ion and Li-Poly battery chemistry to be charged up to a 4.45 V using a CC/CV
charging algorithm. The charging cycle starts when a valid input voltage source (VUVLO < VIN < VINOVP) is
detected and signaled by the CHG pin toggling from a high impedance state to a low logic level.
If the battery is deeply discharged (the battery voltage is lower than VPRE), the STBC03 charger enters the
pre-charge phase and starts charging in constant-current mode with the pre-charge current (IPRE) set. In case the
battery voltage does not reach the VPRE threshold within the tPRE time, the charging process is stopped and a
fault is signaled.
By contrast, as soon as the battery voltage reaches the VPRE threshold, the constant-current fast charge phase
starts operating, and the relevant charging current increases to the IFAST level.
Likewise, if the constant current fast charge phase is not completed within tFAST, meaning that VBAT < VFLOAT,
the charging process is stopped and a fault is signaled (CHG starts toggling at 10.2 Hz as long as a valid VIN is
present).
Should the battery voltage decrease below VPRE during the fast charge phase, the charging process is halted and
a fault is signaled. The constant-current fast charge phase lasts until the battery voltage is lower than VFLOAT.
After that, the charging algorithm switches to a constant-voltage (CV) mode.
During the CV mode, the battery voltage is regulated to VFLOAT and the charging current starts decreasing over
time. As soon as it goes below IEND, the charging process is considered to be completed (EOC, end-of-charge )
and the relevant status is signaled via a 4.1 Hz toggling signal on the CHG pin, again as long as a there is a valid
input source applied (VUVLO < VIN < VINOVP).
Both IPRE and the IFAST values can be programmed from 1 mA to 450 mA via an external resistor, as described in
the ISET pin description.
DS11889 - Rev 6
page 18/31
STBC03
Battery charger
For any IFAST programmed value above 20 mA, the IEND value can be set either 5% or 2.5% of the IFAST level.
For any IFAST programmed value below 20 mA, the relevant IEND value is set as per the following table:
Table 10. IFAST and IEND
IFAST
IEND
20 mA
1.7 mA
10 mA
1.1 mA
5 mA
0.65 mA
2 mA
0.4 mA
1 mA
0.2 mA
The battery temperature is monitored throughout the charging cycle for safety reasons.
Figure 20. Charging flowchart
DS11889 - Rev 6
page 19/31
STBC03
Battery charger
Actions:
•
Pre-charge starts tPRE timer, starts charging in CC mode at IPRE
•
Fast-charge CC starts tFAST timer, increases charge current to IFAST
•
•
Fast-charge CV activates the constant-voltage control loop
Start alarm: the CHG pin starts toggling
Figure 21. End-of-charge flowchart
DS11889 - Rev 6
page 20/31
STBC03
Battery temperature monitoring
Figure 22. CC/CV charging profile (not in scale)
Charger
current
Charger
voltages
VFLOAT
Battery voltage
VPRE
IFAST
Battery current
IPRE
IEND
Time
OFF
PRE-CHARGE
FAST-CHARGE
CC
8.3
OFF
CV
Battery temperature monitoring
The STBC03 integrates all the needed blocks to monitor the battery temperature through an external NTC
resistor. The battery temperature monitoring is enabled only during the battery charging process, in order to save
power when the system is supplied from the battery.
When the battery temperature is outside the normal operating range (0-45 °C), the charging process is halted, an
alarm signal is activated (the CHG pin toggles at 16.2 Hz) but the charging timeout timers are not stopped.
If the temperature goes back to the normal operating range, before the maximum charging time has elapsed, the
charging process is resumed and the alarm signal is cleared.
In case of the charging timeout expires and the temperature is still outside the normal operating range, the
charging process is stopped but it can be still restarted using the CEN pin.
Both temperature thresholds feature a 3 °C hysteresis. The battery temperature monitoring block is designed to
work with an NTC thermistor having R25 = 10 kΩ and ß = 3370 (Mitsubishi TH05-3H103F). If an NTC thermistor is
not used, 10 kΩ resistor must be connected to ensure the proper IC operation.
8.4
Battery overcharge protection
The battery overcharge protection is a safety feature, active when a valid input voltage is connected, preventing
the battery voltage from exceeding a VOCHG value. Should an overcharge condition be detected, the current path
from the input to the battery is opened and a fault signal is activated (the CHG pin toggles at 8.2 Hz). When
the battery voltage goes below VOCHG, normal operations can only be restarted by disconnecting and connecting
back again the input voltage (VIN).
DS11889 - Rev 6
page 21/31
STBC03
Battery over-discharge protection
8.5
Battery over-discharge protection
The battery over-discharge protection is a safety feature enabled only when no valid input voltage source (VUVLO
< VIN < VINOVP) is detected. Therefore, when the STBC03 and the system are powered off from the battery, an
over-discharge of the battery itself is avoided. Should the battery voltage level be below VODC for more than
tODD (over-discharge state), the STBC03 turns off and current sunk from the battery is reduced to less than 50
nA. When a valid input voltage source is detected, while the battery is in an over-discharge state, the STBC03
charger, SYS and LDO outputs are enabled. This condition persists until the battery voltage has exceeded the
over-discharge released threshold (VODCR), otherwise any other disconnection of a valid input voltage source
brings back the STBC03 to a battery over-discharge state.
8.6
Battery discharge overcurrent protection
When the STBC03 is powered off from the battery connected to the BAT pin, a discharge overcurrent protection
circuit disables the STBC03 if the current sunk from the battery is in excess of IBATOCP (900 mA typical) for more
than tDOD.
The presence of a valid input voltage source or triggering the WAKE-UP input pin, allows normal operating
conditions to be restored.
8.7
Battery fault protection
The STBC03 features a battery fault protection. The STBC03 charger is stopped if the battery voltage remains
below 1 V for at least 16 seconds.
8.8
Floating voltage adjustment
The STBC03 features a floating voltage adjustment, controlled via the external resistor RFLOAT connected
between battery and BATSNSFV. For safety reasons, the battery voltage overcharge threshold level (VOCHG)
is linked to any floating voltage set.
8.9
Input overcurrent protection
When the STBC03 is powered off from a valid input voltage source, a current limitation circuit prevents the input
current from increasing in an uncontrolled manner in case of excessive load. In fact, when VSYS is lower than
VILIMSCTH, the input current is limited so to have a reduced power dissipation. As soon as VSYS increases over
VILIMSCTH, the input current limit value is increased to IINLIM.
8.10
SYS short-circuit protection, LDO current limitation
In battery mode condition, if a short-circuit on the SYS pin happens, the STBC03 is turned off (no deglitch). This
short-circuit protection occurs until the SYS voltage drops below VSCSYS.
If the LDO output is in a short-circuit condition, the maximum delivered current is limited to ISC.
8.11
IN overvoltage protection
Should the input voltage source temporarily be VIN>VINOVP (for example due to a poorly regulated voltage
source), then the STBC03 is powered off from the battery, thus any load connected to SYS is protected.
As soon as the input voltage source goes back within a valid input range (VUVLO < VIN < VINOVP), the STBC03 is
then powered off again from VIN.
8.12
Shutdown mode
Asserting the SD pin high forces the STBC03 to enter in shutdown mode (low power), the current sunk from the
battery is reduced to less than 50 nA. Both SYS and LDO pins are not supplied. Normal operating conditions
are restored either by connecting a valid input voltage source (VUVLO