STD12N50M2

STD12N50M2 Datasheet N-channel 500 V, 0.325 Ω typ., 10 A MDmesh™ M2 Power MOSFET in a DPAK package Features TAB 2 3 1 DPAK Order code VDS RDS(on)max. ID STD12N50M2 500 V 0.38 Ω 10 A • • Extremely low gate charge Excellent output capacitance (COSS) profile • • 100% avalanche tested Zener-protected Applications D ( 2 , TAB ) • Switching applications Description G( 1) AM15572V1 S(3) This device is an N-channel Power MOSFET developed using MDmesh™ M2 technology. Thanks to its strip layout and an improved vertical structure, the device exhibits low on-resistance and optimized switching characteristics, rendering it suitable for the most demanding high efficiency converters. Product status STD12N50M2 Product summary Order code STD12N50M2 Marking 12N50M2 Package DPAK Packing Tape and reel DS10237 - Rev 5 - May 2018 For further information contact your local STMicroelectronics sales office. www.st.com STD12N50M2 Electrical ratings 1 Electrical ratings Table 1. Absolute maximum ratings Symbol Value Unit Gate-source voltage ±30 V ID Drain current (continuous) at TC = 25 °C 10 A ID Drain current (continuous) at TC = 100 °C 7 A IDM (1) Drain current (pulsed) 40 A PTOT Total dissipation at TC = 25 °C 85 W dv/dt (2) Peak diode recovery voltage slope 15 V/ns dv/dt (3) MOSFET dv/dt ruggedness 50 V/ns -55 to 150 °C VGS Tj Parameter Operating junction temperature range Tstg Storage temperature range 1. Pulse width limited by safe operating area. 2. ISD ≤ 10 A, di/dt ≤ 400 A/μs; VDS peak < V(BR)DSS, VDD = 400 V. 3. VDS ≤ 400 V. Table 2. Thermal data Symbol Rthj-case (1) Rthj-pcb Parameter Value Unit Thermal resistance junction-case 1.47 °C/W Thermal resistance junction-pcb 50 °C/W Value Unit 1. When mounted on 1 inch² FR-4, 2 Oz copper board. Table 3. Avalanche characteristics Symbol DS10237 - Rev 5 Parameter IAR Avalanche current, repetitive or not-repetitive (pulse width limited by Tj Max) 3.5 A EAS Single pulse avalanche energy (starting Tj = 25 °C, ID = IAR, VDD = 50 V) 204 mJ page 2/18 STD12N50M2 Electrical characteristics 2 Electrical characteristics (TCASE = 25 °C unless otherwise specified) Table 4. On/off states Symbol V(BR)DSS Parameter Drain-source breakdown voltage Test conditions ID = 1 mA, VGS = 0 V Min. Typ. Max. 500 Unit V VDS = 500 V, VGS = 0 V 1 µA (1) 100 µA Gate body leakage current VDS = 0 V, VGS = ±25 V ±10 µA VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA 3 4 V RDS(on) Static drain-source on resistance VGS = 10 V, ID = 5 A 0.325 0.38 Ω Typ. Max. Unit - pF IDSS IGSS Zero gate voltage drain current VDS = 500 V, VGS = 0 V, TC = 125 °C 2 1. Defined by design, not subject to production test. Table 5. Dynamic Symbol Parameter Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Coss eq.(1) Equivalent output capacitance Rg Gate input resistance Qg Total gate charge Qgs Gate-source charge Qgd Gate-drain charge Test conditions Min. 550 VDS = 100 V, f = 1 MHz, VGS = 0 V - 33 1 VGS = 0 V, VDS = 0 to 400 V - 125 - pF f = 1 MHz open drain - 6.8 - Ω - nC 15 VDD = 400 V, ID = 10 A, VGS = 0 to 10 V(see Figure 14. Test circuit for gate charge behavior) - 3 8.3 1. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS. Table 6. Switching times Symbol td(on) tr td(off) tf DS10237 - Rev 5 Parameter Test conditions Turn-on delay time VDD = 250 V, ID = 5 A, Rise time RG = 4.7 Ω, VGS = 10 V Turn-off delay time (see Figure 13. Test circuit for resistive load switching times and Figure 18. Switching time waveform) Fall time Min. Typ. Max. Unit - ns 13.5 - 10.5 8 34.5 page 3/18 STD12N50M2 Electrical characteristics Table 7. Source drain diode Symbol ISD Parameter Test conditions Source-drain current Min. Typ. 10 - ISDM (1) Source-drain current (pulsed) VSD (2) Forward on voltage ISD = 10 A, VGS = 0 V trr Reverse recovery time ISD = 10 A, di/dt = 100 A/µs Qrr Reverse recovery charge IRRM Reverse recovery current VDD = 60 V (see Figure 15. Test circuit for inductive load switching and diode recovery times) trr Reverse recovery time ISD = 10 A, di/dt = 100 A/µs Qrr Reverse recovery charge IRRM Reverse recovery current VDD = 60 V, Tj = 150 °C (see Figure 15. Test circuit for inductive load switching and diode recovery times) 40 - - - Max. 1.6 Unit A V 276 ns 2.4 μC 17.5 A 376 ns 3.4 μC 18.3 A 1. Pulse width limited by safe operating area. 2. Pulsed: pulse duration = 300 μs, duty cycle 1.5%. DS10237 - Rev 5 page 4/18 STD12N50M2 Electrical characteristics curves 2.1 Electrical characteristics curves Figure 1. Safe operating area Figure 2. Thermal impedance GIPG040620140931SA ID (A) 10µs p Lim era ite tion d in by th m is ax RD are a S( is on ) 100 100µs O 10 GC20460 K 1 1ms 10ms Tj=150°C Tc=25°C Single pulse 0.1 0.1 1 10 10-2 10-5 VDS(V) 100 Figure 3. Output characterisics ID (A) VGS=8, 9, 10V 7V 15 10-2 tp (s) 10-1 GIPG040620140953SA ID (A) VDS=18V 15 6V 10 5V 5 0 0 5 4V 10 5 15 20 VDS(V) Figure 5. Gate charge vs gate-source voltage GIPG040620141000SA VDS VGS (V) VDS 12 VDD=400V ID=10A 10 350 0.340 250 6 200 150 100 0 5 10 15 2 4 8 6 10 VGS(V) Figure 6. Static drain-source on resistance RDS(on) (Ω) 0.345 8 2 0 0 (V) 400 300 4 DS10237 - Rev 5 10-3 20 10 0 10-4 Figure 4. Transfer characteristics GIPG040620140942SA 20 10-1 GIPG040620141029SA VGS=10V 0.335 0.330 0.325 0.320 50 0.315 0 Qg(nC) 0.310 0 1 2 3 4 5 6 7 8 9 ID(A) page 5/18 STD12N50M2 Electrical characteristics curves Figure 7. Capacitance variations Figure 8. Output capacitance stored energy GIPG040620141038SA C (pF) GIPG040620141050SA Eoss (µJ) 3 1000 Ciss 2 100 Coss 1 10 1 0.1 1 100 10 Crss VDS(V) Figure 9. Normalized gate threshold voltage vs temperature GIPG040620141054SA VGS(th) (norm) ID=250µA 0 0 200 100 300 400 500 VDS(V) Figure 10. Normalized on-resistance vs temperature GIPG040620141059SA RDS(on) (norm) VGS=10V 2.3 1.1 2.1 1.9 1.0 1.7 1.5 0.9 1.3 0.8 0.9 1.1 0.7 -50 -25 0 25 50 75 100 TJ(°C) Figure 11. Normalized V(BR)DSS vs temperature GIPG040620141106SA V(BR)DSS (norm) 1.09 ID=1mA 0.7 0.5 -50 -25 0 25 50 TJ(°C) 75 100 Figure 12. Source-drain diode forward characteristics GIPG040620141113SA VSD(V) 1.4 1.2 1.07 TJ=-50°C 1 1.03 0.8 0.6 0.99 0.4 0.95 0.91 -50 DS10237 - Rev 5 TJ=25°C TJ=150°C 0.2 -25 0 25 50 75 100 TJ(°C) 0 0 2 4 6 8 10 ISD(A) page 6/18 STD12N50M2 Test circuits 3 Test circuits Figure 13. Test circuit for resistive load switching times Figure 14. Test circuit for gate charge behavior VDD 12 V 2200 + μF 3.3 μF VDD VD VGS 1 kΩ 100 nF RL IG= CONST VGS RG 47 kΩ + pulse width D.U.T. 2.7 kΩ 2200 μF pulse width D.U.T. 100 Ω VG 47 kΩ 1 kΩ AM01469v1 AM01468v1 Figure 15. Test circuit for inductive load switching and diode recovery times D G A D.U.T. S 25 Ω A L A B B 3.3 µF D G + VD 100 µH fast diode B Figure 16. Unclamped inductive load test circuit RG 1000 + µF 2200 + µF VDD 3.3 µF VDD ID D.U.T. S D.U.T. Vi _ pulse width AM01471v1 AM01470v1 Figure 17. Unclamped inductive waveform Figure 18. Switching time waveform V(BR)DSS ton VD td(on) 90% IDM tf 90% 10% 10% 0 ID VDD toff td(off) tr VDD VGS 0 VDS 90% 10% AM01472v1 AM01473v1 DS10237 - Rev 5 page 7/18 STD12N50M2 Package information 4 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. DS10237 - Rev 5 page 8/18 STD12N50M2 DPAK (TO-252) type A2 package information 4.1 DPAK (TO-252) type A2 package information Figure 19. DPAK (TO-252) type A2 package outline 0068772_type-A2_rev25 DS10237 - Rev 5 page 9/18 STD12N50M2 DPAK (TO-252) type A2 package information Table 8. DPAK (TO-252) type A2 mechanical data Dim. mm Min. Max. A 2.20 2.40 A1 0.90 1.10 A2 0.03 0.23 b 0.64 0.90 b4 5.20 5.40 c 0.45 0.60 c2 0.48 0.60 D 6.00 6.20 D1 4.95 E 6.40 E1 5.10 5.20 5.30 e 2.159 2.286 2.413 e1 4.445 4.572 4.699 H 9.35 10.10 L 1.00 1.50 L1 2.60 2.80 3.00 L2 0.65 0.80 0.95 L4 0.60 R V2 DS10237 - Rev 5 Typ. 5.10 5.25 6.60 1.00 0.20 0° 8° page 10/18 STD12N50M2 DPAK (TO-252) type C2 package information 4.2 DPAK (TO-252) type C2 package information Figure 20. DPAK (TO-252) type C2 package outline 0068772_C2_25 DS10237 - Rev 5 page 11/18 STD12N50M2 DPAK (TO-252) type C2 package information Table 9. DPAK (TO-252) type C2 mechanical data Dim. mm Min. Typ. Max. A 2.20 2.30 2.38 A1 0.90 1.01 1.10 A2 0.00 0.10 b 0.72 0.85 b4 5.13 c 0.47 0.60 c2 0.47 0.60 D 6.00 D1 5.10 E 6.50 E1 5.20 e 2.186 2.286 2.386 H 9.80 10.10 10.40 L 1.40 1.50 1.70 L1 L2 6.20 5.60 6.60 6.70 5.50 0.90 1.25 0.51 BSC 0.60 L6 DS10237 - Rev 5 6.10 5.46 2.90 REF L3 L4 5.33 0.80 1.00 1.80 BSC θ1 5° 7° 9° θ2 5° 7° 9° V2 0° 8° page 12/18 STD12N50M2 DPAK (TO-252) type C2 package information Figure 21. DPAK (TO-252) recommended footprint (dimensions are in mm) FP_0068772_25 DS10237 - Rev 5 page 13/18 STD12N50M2 DPAK (TO-252) packing information 4.3 DPAK (TO-252) packing information Figure 22. DPAK (TO-252) tape outline 10 pitches cumulative tolerance on tape +/- 0.2 mm T P0 Top cover tape P2 D E F B1 K0 For machine ref. only including draft and radii concentric around B0 W B0 A0 P1 D1 User direction of feed R Bending radius User direction of feed AM08852v1 DS10237 - Rev 5 page 14/18 STD12N50M2 DPAK (TO-252) packing information Figure 23. DPAK (TO-252) reel outline T 40mm min. access hole at slot location B D C N A G measured at hub Tape slot in core for tape start 2.5mm min.width Full radius AM06038v1 Table 10. DPAK (TO-252) tape and reel mechanical data Tape Dim. mm mm Dim. Min. Max. A0 6.8 7 A B0 10.4 10.6 B 1.5 12.1 C 12.8 1.6 D 20.2 G 16.4 50 B1 DS10237 - Rev 5 Reel Min. Max. 330 13.2 D 1.5 D1 1.5 E 1.65 1.85 N F 7.4 7.6 T K0 2.55 2.75 P0 3.9 4.1 Base qty. 2500 P1 7.9 8.1 Bulk qty. 2500 P2 1.9 2.1 R 40 T 0.25 0.35 W 15.7 16.3 18.4 22.4 page 15/18 STD12N50M2 Revision history Table 11. Document revision history Date Version 12-Mar-2014 1 Changes First release. – Modified: title – Modified: dv/dt values – Modified: values in Table 4 17-Jun-2014 2 – Modified: the entire typical values in Table 5, 6, 7 and 8 – Added: Section 2.1: Electrical characteristics (curves) – Updated: Section 4: Package mechanical data – Minor text changes 12-Nov-2014 3 09-Dec-2014 4 – Document status promoted from preliminary to production data. – Updated title, features and description in cover page. – Updated VGS in Table 2: Absolute maximum ratings. – Updated Section 4: Package mechanical data. Removed maturity status indication from cover page. The document status is production data. 02-May-2018 5 Updated Section 2 Electrical characteristics and Section 4 Package information. Minor text changes. DS10237 - Rev 5 page 16/18 STD12N50M2 Contents Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 2 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2.1 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 4 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4.1 DPAK (TO-252) type A2 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4.2 DPAK (TO-252) type C2 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4.3 DPAK (TO-252) packing information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 DS10237 - Rev 5 page 17/18 STD12N50M2 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2018 STMicroelectronics – All rights reserved DS10237 - Rev 5 page 18/18