STD140N6F7

STD140N6F7 Datasheet N-channel 60 V, 3.1 mΩ typ., 80 A STripFET F7 Power MOSFET in a DPAK package Features TAB 2 3 1 DPAK D(2, TAB) Order code VDS RDS(on) max. ID PTOT STD140N6F7 60 V 3.8 m Ω 80 A 134 W • Among the lowest RDS(on) on the market • • Excellent FoM (figure of merit) Low Crss/Ciss ratio for EMI immunity • High avalanche ruggedness Applications • G(1) Switching applications Description S(3) AM01475v1_noZen This N-channel Power MOSFET utilizes STripFET F7 technology with an enhanced trench gate structure that results in very low on-state resistance, while also reducing internal capacitance and gate charge for faster and more efficient switching. Product status STD140N6F7 Product summary Order code STD140N6F7 Marking 140N6F7 Package DPAK Packing Tape and reel DS11454 - Rev 3 - April 2019 For further information contact your local STMicroelectronics sales office. www.st.com STD140N6F7 STD140N6F7 electrical ratings 1 Electrical ratings Table 1. Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage 60 V VGS Gate-source voltage ±20 V Drain current (continuous) at Tcase = 25 °C 80 Drain current (continuous) at Tcase = 100 °C 80 IDM (2) Drain current (pulsed) 320 A PTOT Total power dissipation at Tcase = 25 °C 134 W Single pulse avalanche energy 200 mJ Drain-body diode dynamic dv/dt ruggedness 7.1 V/ns -55 to 175 °C Value Unit ID(1) EAS (3) dv/dt (4) Tstg Storage temperature range Tj Operating junction temperature range A 1. Current is limited by package. 2. Pulse width is limited by safe operating area. 3. starting Tj = 25 °C, ID = 20 A, VDD = 30 V. 4. ISD= 80 A; di/dt = 600 A/μs; VDD = 48 V; Tj < Tjmax Table 2. Thermal data Symbol Rthj-pcb Rthj-c (1) Parameter Thermal resistance junction-pcb 50 Thermal resistance junction-case 1.12 °C/W 1. When mounted on FR-4 board of 1 inch², 2oz Cu, t < 10 s. DS11454 - Rev 3 page 2/17 STD140N6F7 STD140N6F7 electrical characteristics 2 Electrical characteristics (Tcase = 25 °C unless otherwise specified) Table 3. On/off-states Symbol V(BR)DSS Parameter Test conditions Min. Typ. Max. Unit Drain-source breakdown voltage VGS = 0 V, ID = 1 mA IDSS Zero gate voltage drain current VGS = 0 V, VDS = 60 V 1 µA IGSS Gate-body leakage current VDS = 0 V, VGS = 20 V 100 nA VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA 4 V RDS(on) Static drain-source on-resistance VGS = 10 V, ID = 40 A 3.1 3.8 mΩ Min. Typ. Max. Unit - 3100 - - 1520 - - 193 - - 55 - - 19 - - 18 - Min. Typ. Max. - 24 - - 68 - - 39 - - 20 - Min. Typ. Max. Unit 1.2 V 60 V 2 Table 4. Dynamic Symbol Parameter Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Qg Total gate charge Qgs Gate-source charge Qgd Gate-drain charge Test conditions VDS = 30 V, f = 1 MHz, VGS = 0 V VDD = 30 V, ID = 80 A, VGS = 0 to 10 V (see Figure 13. Test circuit for gate charge behavior) pF nC Table 5. Switching times Symbol td(on) tr td(off) tf Parameter Test conditions Turn-on delay time Rise time Turn-off delay time VDD = 30 V, ID = 40 A, RG = 4.7 Ω, VGS = 10 V (see Figure 12. Test circuit for resistive load switching times and Figure 17. Switching time waveform) Fall time Unit ns Table 6. Source-drain diode Symbol VSD (1) Parameter Forward on voltage trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current Test conditions VGS = 0 V, ISD = 80 A ISD = 80 A, di/dt = 100 A/µs, VDD = 48 V (see Figure 14. Test circuit for inductive load switching and diode recovery times) - 42.4 ns - 36.2 nC - 1.8 A 1. Pulse test: pulse duration = 300 µs, duty cycle 1.5%. DS11454 - Rev 3 page 3/17 STD140N6F7 Electrical characteristics curves 2.1 Characteristics curves Figure 1. Safe operating area ID (A) 10 Figure 2. Thermal impedance K GIPD221220150915SOA Operation in this area is limited by RDS(on) GIPD221220150916ZTH δ=0.5 0.2 2 0.1 tp= 100µs 10 0.05 0.02 0.01 tp= 1ms 1 tp= 10ms Tj ≤ 175°C Tc = 25°C single pulse 0 10 -1 10 10 0 10 1 VDS (V) Figure 3. Output characteristics ID (A) V GS = 9,10 V V GS = 8 V 250 GIPG310320151043OCH Zth=k*Rthj-c Single pulse 10 -2 10 -5 10 -4 10 -3 10 -2 10 -1 t p (s) Figure 4. Transfer characteristics ID (A) GIPG310320151058TCH 250 V GS = 7 V 200 150 V DS = 2 V 200 150 V GS = 6 V 100 100 50 0 0 10 -1 50 V GS = 5 V 2 4 6 8 V DS (V) Figure 5. Gate charge vs gate-source voltage V GS (V) GIPG310320151113QVG 12 2 4 6 8 V GS (V) Figure 6. Static drain-source on-resistance R DS(on) (mΩ) GIPG020420150841SID 3.25 V DD = 30 V I D = 80 A 10 0 0 3.20 V GS = 10 V 8 3.15 6 3.10 4 3.05 2 0 0 DS11454 - Rev 3 20 40 60 Q g (nC) 3.00 30 40 50 60 70 I D (A) page 4/17 STD140N6F7 Electrical characteristics curves Figure 8. Normalized gate threshold voltage vs temperature Figure 7. Capacitance variations C (pF) GIPG310320151105CVR V GS(th) (norm.) GIPG310320150943VGS 1.1 I D = 250 μA 10 4 1.0 C ISS 0.9 C OSS 10 3 0.8 f = 1 MHz 10 2 C RSS 0.7 0.6 10 1 10 -1 10 0 0.5 -75 V DS (V) 10 1 25 75 125 T j (°C) Figure 10. Normalized V(BR)DSS vs temperature Figure 9. Normalized on-resistance vs temperature R DS(on) (norm.) -25 V (BR)DSS (norm.) GIPG310320151015RDS GIPG310320150929BDV 1.8 V GS = 10 V 1.02 1.6 I D = 1 mA 1.4 1.00 1.2 1.0 0.98 0.8 0.6 -75 -25 25 75 125 0.96 -75 T j (°C) -25 25 75 125 T j (°C) Figure 11. Source-drain diode forward characteristics V SD(on) (V) GIPG310320151032SDF 1.0 T j = -55 °C 0.9 T j = 25 °C 0.8 T j = 175 °C 0.7 0.6 0.5 10 DS11454 - Rev 3 20 30 40 50 60 70 I SD (A) page 5/17 STD140N6F7 Test circuits 3 Test circuits Figure 12. Test circuit for resistive load switching times Figure 13. Test circuit for gate charge behavior VDD 12 V 2200 + μF 3.3 μF VDD VD VGS 1 kΩ 100 nF RL IG= CONST VGS RG 47 kΩ + pulse width D.U.T. 2.7 kΩ 2200 μF pulse width D.U.T. 100 Ω VG 47 kΩ 1 kΩ AM01469v1 AM01468v1 Figure 14. Test circuit for inductive load switching and diode recovery times D G A D.U.T. S 25 Ω A L A B B 3.3 µF D G + VD 100 µH fast diode B Figure 15. Unclamped inductive load test circuit RG 1000 + µF 2200 + µF VDD 3.3 µF VDD ID D.U.T. S D.U.T. Vi _ pulse width AM01471v1 AM01470v1 Figure 17. Switching time waveform Figure 16. Unclamped inductive waveform ton V(BR)DSS td(on) VD toff td(off) tr tf 90% 90% IDM VDD 10% 0 ID VDD AM01472v1 VGS 0 VDS 10% 90% 10% AM01473v1 DS11454 - Rev 3 page 6/17 STD140N6F7 Package information 4 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. DS11454 - Rev 3 page 7/17 STD140N6F7 DPAK (TO-252) type A2 package information 4.1 DPAK (TO-252) type A2 package information Figure 18. DPAK (TO-252) type A2 package outline 0068772_type-A2_rev26 DS11454 - Rev 3 page 8/17 STD140N6F7 DPAK (TO-252) type A2 package information Table 7. DPAK (TO-252) type A2 mechanical data Dim. mm Min. Max. A 2.20 2.40 A1 0.90 1.10 A2 0.03 0.23 b 0.64 0.90 b4 5.20 5.40 c 0.45 0.60 c2 0.48 0.60 D 6.00 6.20 D1 4.95 E 6.40 E1 5.10 5.20 5.30 e 2.159 2.286 2.413 e1 4.445 4.572 4.699 H 9.35 10.10 L 1.00 1.50 L1 2.60 2.80 3.00 L2 0.65 0.80 0.95 L4 0.60 R V2 DS11454 - Rev 3 Typ. 5.10 5.25 6.60 1.00 0.20 0° 8° page 9/17 STD140N6F7 DPAK (TO-252) type C2 package information 4.2 DPAK (TO-252) type C2 package information Figure 19. DPAK (TO-252) type C2 package outline 0068772_type-C2_rev26 DS11454 - Rev 3 page 10/17 STD140N6F7 DPAK (TO-252) type C2 package information Table 8. DPAK (TO-252) type C2 mechanical data Dim. mm Min. Typ. Max. A 2.20 2.30 2.38 A1 0.90 1.01 1.10 A2 0.00 0.10 b 0.72 0.85 b4 5.13 c 0.47 0.60 c2 0.47 0.60 D 6.00 D1 5.10 E 6.50 E1 5.20 e 2.186 2.286 2.386 H 9.80 10.10 10.40 L 1.40 1.50 1.70 L1 L2 6.20 5.60 6.60 6.70 5.50 0.90 1.25 0.51 BSC 0.60 L6 DS11454 - Rev 3 6.10 5.46 2.90 REF L3 L4 5.33 0.80 1.00 1.80 BSC θ1 5° 7° 9° θ2 5° 7° 9° V2 0° 8° page 11/17 STD140N6F7 DPAK (TO-252) type C2 package information Figure 20. DPAK (TO-252) recommended footprint (dimensions are in mm) DS11454 - Rev 3 page 12/17 STD140N6F7 DPAK (TO-252) packing information 4.3 DPAK (TO-252) packing information Figure 21. DPAK (TO-252) tape outline 10 pitches cumulative tolerance on tape +/- 0.2 mm T P0 Top cover tape P2 D E F B1 K0 For machine ref. only including draft and radii concentric around B0 W B0 A0 P1 D1 User direction of feed R Bending radius User direction of feed AM08852v1 DS11454 - Rev 3 page 13/17 STD140N6F7 DPAK (TO-252) packing information Figure 22. DPAK (TO-252) reel outline T 40mm min. access hole at slot location B D C N A G measured at hub Tape slot in core for tape start 2.5mm min.width Full radius AM06038v1 Table 9. DPAK (TO-252) tape and reel mechanical data Tape Dim. mm mm Dim. Min. Max. A0 6.8 7 A B0 10.4 10.6 B 1.5 12.1 C 12.8 1.6 D 20.2 G 16.4 50 B1 DS11454 - Rev 3 Reel Min. Max. 330 13.2 D 1.5 D1 1.5 E 1.65 1.85 N F 7.4 7.6 T K0 2.55 2.75 P0 3.9 4.1 Base qty. 2500 P1 7.9 8.1 Bulk qty. 2500 P2 1.9 2.1 R 40 T 0.25 0.35 W 15.7 16.3 18.4 22.4 page 14/17 STD140N6F7 Revision history Table 10. Document revision history DS11454 - Rev 3 Date Revision 21-Dec-2015 1 11-Apr-2016 2 10-Apr-2019 3 Changes First release. Datasheet promoted from preliminary data to production data. Minor text changes. Added Section 4.2 DPAK (TO-252) type C2 package information. Minor text changes. page 15/17 STD140N6F7 Contents Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 2 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2.1 Characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 4 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 4.1 DPAK package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4.2 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4.3 DPAK (TO-252) packing information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 DS11454 - Rev 3 page 16/17 STD140N6F7 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. 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Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2019 STMicroelectronics – All rights reserved DS11454 - Rev 3 page 17/17