STD15N50M2AG

STD15N50M2AG Automotive-grade N-channel 500 V, 0.336 Ω typ., 10 A MDmesh™ M2 Power MOSFET in a DPAK package Datasheet - production data Features Order code VDS RDS(on) max. ID PTOT STD15N50M2AG 500 V 0.380 Ω 10 A 85 W  Figure 1: Internal schematic diagram     Designed for automotive applications and AEC-Q101 qualified Extremely low gate charge Excellent output capacitance (COSS) profile 100% avalanche tested Zener-protected Applications  Switching applications Description This device is an N-channel Power MOSFET developed using MDmesh™ M2 technology. Thanks to its strip layout and an improved vertical structure, the device exhibits low on-resistance and optimized switching characteristics, rendering it suitable for the most demanding high efficiency converters. Table 1: Device summary Order code Marking Package Packing STD15N50M2AG 15N50M2 DPAK Tape and reel May 2016 DocID027708 Rev 2 This is information on a product in full production. 1/16 www.st.com Contents STD15N50M2AG Contents 1 Electrical ratings ............................................................................. 3 2 Electrical characteristics ................................................................ 4 2.1 Electrical characteristics (curves) ...................................................... 6 3 Test circuits ..................................................................................... 8 4 Package information ....................................................................... 9 5 2/16 4.1 DPAK (TO-252) type A2 package information................................. 10 4.2 DPAK (TO-252) packing information ............................................... 13 Revision history ............................................................................ 15 DocID027708 Rev 2 STD15N50M2AG 1 Electrical ratings Electrical ratings Table 2: Absolute maximum ratings Symbol Value Unit Gate-source voltage ±30 V Drain current (continuous) at Tcase = 25 °C 10 Drain current (continuous) at Tcase = 100 °C 7 IDM(1) Drain current (pulsed) 40 A PTOT Total dissipation at Tcase = 25 °C 85 W Peak diode recovery voltage slope 10 MOSFET dv/dt ruggedness 25 VGS ID dv/dt(2) dv/dt (3) Tstg Parameter Storage temperature range Tj Operating junction temperature range A V/ns -55 to 150 °C Value Unit Notes: (1) Pulse width is limited by safe operating area. (2) ISD ≤ 10 A, di/dt=800 A/μs; VDS peak < V(BR)DSS,VDD = 80% V(BR)DSS (3) VDS ≤ 400 V. Table 3: Thermal data Symbol Rthj-case Rthj-pcb (1) Parameter Thermal resistance junction-case max. 1.47 Thermal resistance junction-pcb max. 50 °C/W Notes: (1)When mounted on a 1 inch² FR-4, 2 Oz copper board Table 4: Avalanche characteristics Symbol Parameter Value Unit IAR(1) Avalanche current, repetitive or not repetitive 3.5 A EAS(2) Single pulse avalanche energy 200 mJ Notes: (1) pulse width limited by Tjmax (2) starting Tj = 25 °C, ID = IAR, VDD = 50 V. DocID027708 Rev 2 3/16 Electrical characteristics 2 STD15N50M2AG Electrical characteristics (Tcase = 25 °C unless otherwise specified) Table 5: Static Symbol Parameter Test conditions V(BR)DSS Drain-source breakdown voltage VGS = 0 V, ID = 1 mA Min. Typ. Max. 500 Unit V VGS = 0 V, VDS = 500 V 1 VGS = 0 V, VDS = 500 V, Tcase = 125 °C 100 Gate-body leakage current VDS = 0 V, VGS = ±25 V ±5 µA VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA 3 4 V RDS(on) Static drain-source onresistance VGS = 10 V, ID = 5 A 0.336 0.380 Ω Min. Typ. Max. Unit - 530 - - 33 - - 0.8 - IDSS Zero gate voltage drain current IGSS 2 µA Table 6: Dynamic Symbol Parameter Test conditions Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Coss eq.(1) Equivalent output capacitance VDS = 0 to 400 V, VGS = 0 V - 125 - pF RG Intrinsic gate resistance f = 1 MHz, ID = 0 A - 6.9 - Ω Qg Total gate charge - 13 - Qgs Gate-source charge - 2.8 - Qgd Gate-drain charge VDD = 400 V, ID = 9 A, VGS = 10 V (see Figure 15: "Test circuit for gate charge behavior") - 5.1 - VDS = 100 V, f = 1 MHz, VGS = 0 V pF nC Notes: (1) Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS. Table 7: Switching times Symbol td(on) tr td(off) tf 4/16 Parameter Turn-on delay time Rise time Turn-off delay time Fall time Test conditions Min. Typ. Max. VDD = 250 V, ID = 4.5 A RG = 4.7 Ω, VGS = 10 V (see Figure 14: "Test circuit for resistive load switching times" and Figure 19: "Switching time waveform") - 10 - - 3.2 - - 84 - - 8.8 - DocID027708 Rev 2 Unit ns STD15N50M2AG Electrical characteristics Table 8: Source-drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit ISD Source-drain current - 10 A ISDM(1) Source-drain current (pulsed) - 40 A VSD(2) Forward on voltage VGS = 0 V, ISD = 10 A - 1.6 V trr Reverse recovery time - 230 ns Qrr Reverse recovery charge - 2 µC IRRM Reverse recovery current ISD = 9 A, di/dt = 100 A/µs, VDD = 100 V (see Figure 16: "Test circuit for inductive load switching and diode recovery times") - 17.4 A ISD = 9 A, di/dt = 100 A/µs, VDD = 100 V, Tj = 150 °C (see Figure 16: "Test circuit for inductive load switching and diode recovery times") - 310 ns - 2.7 µC - 17.5 A trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current Notes: (1) Pulse width is limited by safe operating area. (2) Pulse test: pulse duration = 300 µs, duty cycle 1.5%. Table 9: Gate-source Zener diode Symbol V(BR)GSO Parameter Test conditions Gate-source breakdown voltage IGS = ±250 µA, ID = 0 A Min. Typ. Max. Unit ±30 - - V The built-in back-to-back Zener diodes are specifically designed to enhance the ESD performance of the device. The Zener voltage facilitates efficient and cost-effective device integrity protection, thus eliminating the need for additional external componentry. DocID027708 Rev 2 5/16 Electrical characteristics 2.1 6/16 STD15N50M2AG Electrical characteristics (curves) Figure 2: Safe operating area Figure 3: Thermal impedance Figure 4: Output characteristics Figure 5: Transfer characteristics Figure 6: Gate charge vs gate-source voltage Figure 7: Static drain-source on-resistance DocID027708 Rev 2 STD15N50M2AG Electrical characteristics Figure 8: Capacitance variations Figure 9: Normalized gate threshold voltage vs temperature Figure 10: Normalized on-resistance vs temperature Figure 11: Normalized V(BR)DSS vs temperature Figure 12: Output capacitance stored energy Figure 13: Source-drain diode forward characteristics DocID027708 Rev 2 7/16 Test circuits 3 8/16 STD15N50M2AG Test circuits Figure 14: Test circuit for resistive load switching times Figure 15: Test circuit for gate charge behavior Figure 16: Test circuit for inductive load switching and diode recovery times Figure 17: Unclamped inductive load test circuit Figure 18: Unclamped inductive waveform Figure 19: Switching time waveform DocID027708 Rev 2 STD15N50M2AG 4 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. DocID027708 Rev 2 9/16 Package information 4.1 STD15N50M2AG DPAK (TO-252) type A2 package information Figure 20: DPAK (TO-252) type A2 package outline 0068772_type-A2_rev21 10/16 DocID027708 Rev 2 STD15N50M2AG Package information Table 10: DPAK (TO-252) type A2 mechanical data mm Dim. Min. Typ. Max. A 2.20 2.40 A1 0.90 1.10 A2 0.03 0.23 b 0.64 0.90 b4 5.20 5.40 c 0.45 0.60 c2 0.48 0.60 D 6.00 6.20 D1 4.95 E 6.40 E1 5.10 5.20 5.30 e 2.16 2.28 2.40 e1 4.40 4.60 H 9.35 10.10 L 1.00 1.50 L1 2.60 2.80 3.00 L2 0.65 0.80 0.95 L4 0.60 R V2 5.10 5.25 6.60 1.00 0.20 0° DocID027708 Rev 2 8° 11/16 Package information STD15N50M2AG Figure 21: DPAK (TO-252) recommended footprint (dimensions are in mm) 12/16 DocID027708 Rev 2 STD15N50M2AG 4.2 Package information DPAK (TO-252) packing information Figure 22: DPAK (TO-252) tape outline DocID027708 Rev 2 13/16 Package information STD15N50M2AG Figure 23: DPAK (TO-252) reel outline Table 11: DPAK (TO-252) tape and reel mechanical data Tape Reel mm mm Dim. Dim. Min. Max. A0 6.8 7 A B0 10.4 10.6 B 1.5 12.1 C 12.8 B1 14/16 D 1.5 D1 1.5 E 1.65 F 1.6 Min. Max. 330 13.2 D 20.2 G 16.4 1.85 N 50 7.4 7.6 T K0 2.55 2.75 P0 3.9 4.1 Base qty. 2500 P1 7.9 8.1 Bulk qty. 2500 P2 1.9 2.1 R 40 T 0.25 0.35 W 15.7 16.3 DocID027708 Rev 2 18.4 22.4 STD15N50M2AG 5 Revision history Revision history Table 12: Document revision history Date Revision 13-Apr-2015 1 First release. 2 Minor text edits Document status promoted to production data Updated Section 1: "Electrical ratings" Updated Section 2: "Electrical characteristics" Updated Section 2.1: "Electrical characteristics (curves)" Updated Section 4.1: "DPAK (TO-252) type A2 package information" 07-May-2016 Changes DocID027708 Rev 2 15/16 STD15N50M2AG IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2016 STMicroelectronics – All rights reserved 16/16 DocID027708 Rev 2