STD15N60DM6
Datasheet
N-channel 600 V, 286 mΩ typ., 12 A MDmesh DM6 Power MOSFET
in a DPAK package
Features
TAB
2 3
1
DPAK
D(2, TAB)
G(1)
S(3)
AM01475V1
Order code
VDS
RDS(on) max.
ID
STD15N60DM6
600 V
338 mΩ
12 A
•
•
Fast-recovery body diode
Lower RDS(on) per area vs previous generation
•
•
•
•
Low gate charge, input capacitance and resistance
100% avalanche tested
Extremely high dv/dt ruggedness
Zener-protected
Applications
•
Switching applications
Description
This high-voltage N-channel Power MOSFET is part of the MDmesh DM6 fastrecovery diode series. Compared with the previous MDmesh fast generation, DM6
combines very low recovery charge (Qrr), recovery time (trr) and excellent
improvement in RDS(on) per area with one of the most effective switching behaviors
available in the market for the most demanding high-efficiency bridge topologies and
ZVS phase-shift converters.
Product status
STD15N60DM6
Product summary
Order code
STD15N60DM6
Marking
15N60DM6
Package
DPAK
Packing
Tape and reel
DS13337 - Rev 1 - May 2020
For further information contact your local STMicroelectronics sales office.
www.st.com
STD15N60DM6
Electrical ratings
1
Electrical ratings
Table 1. Absolute maximum ratings
Symbol
Value
Unit
Gate-source voltage
±25
V
Drain current (continuous) at TC = 25 °C
12
Drain current (continuous) at TC = 100 °C
7.3
IDM (1)
Drain current (pulsed)
32
A
PTOT
Total power dissipation at TC = 25 °C
110
W
IAR (2)
Avalanche current, repetitive or not repetitive
3
A
Single pulse avalanche energy
240
mJ
dv/dt (4)
Peak diode recovery voltage slope
100
V/ns
di/dt(4)
Peak diode recovery current slope
1000
A/µs
MOSFET dv/dt ruggedness
100
V/ns
-55 to 150
°C
Value
Unit
VGS
ID
EAS
dv/dt
(3)
(5)
Tstg
TJ
Parameter
Storage temperature range
Operating junction temperature range
A
1. Pulse width is limited by safe operating area.
2. Pulse width limited by TJ max.
3. Starting TJ = 25 °C, ID = IAR, VDD = 50 V.
4. ISD ≤ 12 A, VDS (peak) < V(BR)DSS, VDD = 400 V.
5. VDS ≤ 480 V.
Table 2. Thermal data
Symbol
Parameter
Rthj-case
Thermal resistance junction-case
1.14
Rthj-pcb(1)
Thermal resistance junction-pcb
50
°C/W
1. When mounted on an 1-inch² FR-4, 2 Oz copper board.
DS13337 - Rev 1
page 2/17
STD15N60DM6
Electrical characteristics
2
Electrical characteristics
(TC = 25 °C unless otherwise specified)
Table 3. On/off states
Symbol
V(BR)DSS
Parameter
Test conditions
Drain-source breakdown voltage
Min.
VGS = 0 V, ID = 1 mA
Typ.
600
Zero gate voltage drain current
IGSS
Gate-body leakage current
VDS = 0 V, VGS = ±25 V
VGS(th)
Gate threshold voltage
VDS = VGS, ID = 250 µA
RDS(on)
Static drain-source on-resistance
VGS = 10 V, ID = 6 A
VGS = 0 V, VDS = 600 V, TC = 125 °C
Unit
V
VGS = 0 V, VDS = 600 V
IDSS
Max.
1
(1)
100
µA
±5
µA
4
4.75
V
286
338
mΩ
Min.
Typ.
Max.
Unit
-
607
-
-
40
-
-
4
-
3.25
1. Defined by design, not subject to production test.
Table 4. Dynamic
Symbol
Parameter
Ciss
Input capacitance
Coss
Output capacitance
Crss
Test conditions
VGS = 100 V, f = 1 MHz, VGS = 0 V
Reverse transfer capacitance
(1)
pF
Equivalent output capacitance
VDS = 0 to 480 V, VGS = 0 V
-
100
-
pF
RG
Intrinsic gate resistance
f = 1 MHz open drain
-
5.7
-
Ω
Qg
Total gate charge
-
15.3
-
Qgs
Gate-source charge
-
4.1
-
Qgd
Gate-drain charge
-
7.7
-
Coss eq.
VDD = 480 V, ID = 12 A, VGS = 0 to 10 V
(see Figure 14. Test circuit for gate
charge behavior)
nC
1. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0
to 80% VDSS.
Table 5. Switching times
Symbol
td(on)
tr
td(off)
tf
DS13337 - Rev 1
Parameter
Test conditions
Min.
Typ.
Max.
Turn-on delay time
VDD = 300 V, ID = 6 A,
-
8.8
-
Rise time
RG = 4.7 Ω, VGS = 10 V
-
7.4
-
Turn-off delay time
(see Figure 13. Test circuit for resistive
load switching times and
Figure 18. Switching time waveform)
-
29.2
-
-
7.2
-
Fall time
Unit
ns
page 3/17
STD15N60DM6
Electrical characteristics
Table 6. Source-drain diode
Symbol
ISD
Parameter
Test conditions
Min.
Typ.
Max.
Unit
Source-drain current
-
12
A
ISDM(1)
Source-drain current (pulsed)
-
32
A
VSD(2)
Forward on voltage
VGS = 0 V, ISD = 12 A
-
1.6
V
trr
Reverse recovery time
ISD = 12 A, di/dt = 100 A/µs,
-
85
ns
Qrr
Reverse recovery charge
VDD = 60 V
-
0.268
µC
Reverse recovery current
(see Figure 15. Test circuit for inductive
load switching and diode recovery times)
-
6.3
A
trr
Reverse recovery time
ISD = 12 A, di/dt = 100 A/µs,
-
147
ns
Qrr
Reverse recovery charge
VDD = 60 V, TJ = 150 °C
-
0.661
µC
IRRM
Reverse recovery current
(see Figure 15. Test circuit for inductive
load switching and diode recovery times)
-
9
A
IRRM
1. Pulse width is limited by safe operating area.
2. Pulse test: pulse duration = 300 µs, duty cycle 1.5%.
DS13337 - Rev 1
page 4/17
STD15N60DM6
Electrical characteristics (curves)
2.1
Electrical characteristics (curves)
Figure 2. Maximum transient thermal impedance
Figure 1. Safe operating area
ID
(A)
ZthJ-C
(°C/W)
GADG130520200844SOA
IDM
tp =1µs
10 0
a
10 1
10 0
0.3
n)
re
10 -1
10 -1
duty=0.5 0.4
tp =10µs
DS
(o
O
is per
lim ati
ite on
d in
by th
R is a
10 0
GADG300420201017ZTH
tp =100µs
0.2
10 -1
0.1
RDS(on) max.
tp =1ms
Single pulse,
TC = 25 °C,
TJ ≤ 150 °C,
VGS = 10 V
10 1
0.05
10 -2
tp =10ms
V(BR)DSS
VDS (V)
10 2
RthJ-C = 1.14 °C/W
duty = ton / T
Single pulse
ton
10 -3
10 -6
T
10 -5
10 -4
10 -3
10 -2
10 -1
tp (s)
Figure 3. Typical output characteristics
Figure 4. Typical transfer characteristics
ID
(A)
ID
(A)
GADG201220190735OCH
VGS = 9, 10 V
30
25
GADG201220190736TCH
30
VGS =8V
20
25
VDS = 20 V
20
15
VGS =7V
10
15
10
5
VGS =6V
0
0
4
8
12
16
VDS (V)
Figure 5. Typical gate charge characteristics
GADG191220192038QVG VGS
VDS
(V)
(V)
Qg
500
10
5
0
4
5
6
7
8
9
VGS (V)
Figure 6. Typical drain-source on-resistance
RDS(on)
(mΩ)
GADG300420201020RID
302
298
400
Qgs
Qgd
8
300
6
VDD = 480 V,
ID = 12 A
200
4
DS13337 - Rev 1
2
3
6
9
12
VGS = 10 V
290
286
282
100
0
0
294
15
0
Qg (nC)
278
274
0
3
6
9
12
ID (A)
page 5/17
STD15N60DM6
Electrical characteristics (curves)
Figure 7. Typical capacitance characteristics
C
(pF)
Figure 8. Typical output capacitance stored energy
EOSS
(µJ)
GADG201220190738CVR
GADG201220190733EOS
6
10 3
CISS
5
4
10 2
3
COSS
10 1
f = 1 MHz
10 0
10 0
10 1
CRSS
VDS (V)
10 2
Figure 9. Normalized gate threshold vs temperature
VGS(th)
(norm.)
GADG201220190743VTH
2
1
0
0
1.0
2.0
1.0
0.7
0.5
-25
25
75
125
TJ (°C)
Figure 11. Normalized breakdown voltage vs temperature
V(BR)DSS
(norm.)
GADG201220190741BDV
1.05
500
600
VDS (V)
VGS = 10 V
0.0
-75
-25
25
75
125
TJ (°C)
Figure 12. Typical reverse diode forward characteristics
VSD
(V)
GADG130520200910SDF
1.1
1.10
400
GADG201220190743RON
1.5
0.8
0.6
-75
300
RDS(on)
(norm.)
2.5
ID = 250 μA
200
Figure 10. Normalized on-resistance vs temperature
1.1
0.9
100
TJ = -50 °C
1.0
ID = 1 mA
0.9
TJ = 25 °C
1.00
0.8
0.95
0.90
0.85
-75
DS13337 - Rev 1
TJ = 150 °C
0.7
0.6
-25
25
75
125
TJ (°C)
0.5
0
3
6
9
12
ISD (A)
page 6/17
STD15N60DM6
Test circuits
3
Test circuits
Figure 13. Test circuit for resistive load switching times
Figure 14. Test circuit for gate charge behavior
VDD
RL
RL
2200
+ μF
3.3
μF
VDD
VD
IG= CONST
VGS
+
pulse width
RG
VGS
D.U.T.
2.7 kΩ
2200
μF
pulse width
D.U.T.
100 Ω
VG
47 kΩ
1 kΩ
AM01469v10
AM01468v1
Figure 15. Test circuit for inductive load switching and
diode recovery times
D
G
A
D.U.T.
S
25 Ω
A
L
A
VD
100 µH
fast
diode
B
B
B
3.3
µF
D
G
+
Figure 16. Unclamped inductive load test circuit
RG
1000
+ µF
2200
+ µF
VDD
3.3
µF
VDD
ID
D.U.T.
S
D.U.T.
Vi
_
pulse width
AM01471v1
AM01470v1
Figure 18. Switching time waveform
Figure 17. Unclamped inductive waveform
ton
V(BR)DSS
td(on)
toff
td(off)
tr
tf
VD
90%
90%
IDM
VDD
10%
0
ID
VDD
AM01472v1
VGS
0
VDS
10%
90%
10%
AM01473v1
DS13337 - Rev 1
page 7/17
STD15N60DM6
Package information
4
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages,
depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product
status are available at: www.st.com. ECOPACK is an ST trademark.
4.1
DPAK (TO-252) type A2 package information
Figure 19. DPAK (TO-252) type A2 package outline
0068772_type-A2_rev27
DS13337 - Rev 1
page 8/17
STD15N60DM6
DPAK (TO-252) type A2 package information
Table 7. DPAK (TO-252) type A2 mechanical data
Dim.
mm
Min.
Max.
A
2.20
2.40
A1
0.90
1.10
A2
0.03
0.23
b
0.64
0.90
b4
5.20
5.40
c
0.45
0.60
c2
0.48
0.60
D
6.00
6.20
D1
4.95
E
6.40
E1
5.10
5.20
5.30
e
2.159
2.286
2.413
e1
4.445
4.572
4.699
H
9.35
10.10
L
1.00
1.50
L1
2.60
2.80
3.00
L2
0.65
0.80
0.95
L4
0.60
R
V2
DS13337 - Rev 1
Typ.
5.10
5.25
6.60
1.00
0.20
0°
8°
page 9/17
STD15N60DM6
DPAK (TO-252) type C2 package information
4.2
DPAK (TO-252) type C2 package information
Figure 20. DPAK (TO-252) type C2 package outline
0068772_type-C2_rev27
DS13337 - Rev 1
page 10/17
STD15N60DM6
DPAK (TO-252) type C2 package information
Table 8. DPAK (TO-252) type C2 mechanical data
Dim.
mm
Min.
Typ.
Max.
A
2.20
2.30
2.38
A1
0.90
1.01
1.10
A2
0.00
0.10
b
0.72
0.85
b4
5.13
c
0.47
0.60
c2
0.47
0.60
D
6.00
D1
5.10
E
6.50
E1
5.20
e
2.186
2.286
2.386
H
9.80
10.10
10.40
L
1.40
1.50
1.70
L1
L2
6.20
5.60
6.60
6.70
5.50
0.90
1.25
0.51 BSC
0.60
L6
DS13337 - Rev 1
6.10
5.46
2.90 REF
L3
L4
5.33
0.80
1.00
1.80 BSC
θ1
5°
7°
9°
θ2
5°
7°
9°
V2
0°
8°
page 11/17
STD15N60DM6
DPAK (TO-252) type C2 package information
Figure 21. DPAK (TO-252) recommended footprint (dimensions are in mm)
FP_0068772_27
DS13337 - Rev 1
page 12/17
STD15N60DM6
DPAK (TO-252) packing information
4.3
DPAK (TO-252) packing information
Figure 22. DPAK (TO-252) tape outline
10 pitches cumulative
tolerance on tape +/- 0.2 mm
T
P0
Top cover
tape
P2
D
E
F
B1
K0
For machine ref. only
including draft and
radii concentric around B0
W
B0
A0
P1
D1
User direction of feed
R
Bending radius
User direction of feed
AM08852v1
DS13337 - Rev 1
page 13/17
STD15N60DM6
DPAK (TO-252) packing information
Figure 23. DPAK (TO-252) reel outline
T
40mm min.
access hole
at slot location
B
D
C
N
A
G measured
at hub
Tape slot
in core for
tape start
2.5mm min.width
Full radius
AM06038v1
Table 9. DPAK (TO-252) tape and reel mechanical data
Tape
Dim.
mm
mm
Dim.
Min.
Max.
A0
6.8
7
A
B0
10.4
10.6
B
1.5
12.1
C
12.8
1.6
D
20.2
G
16.4
50
B1
DS13337 - Rev 1
Reel
Min.
Max.
330
13.2
D
1.5
D1
1.5
E
1.65
1.85
N
F
7.4
7.6
T
K0
2.55
2.75
P0
3.9
4.1
Base qty.
2500
P1
7.9
8.1
Bulk qty.
2500
P2
1.9
2.1
R
40
T
0.25
0.35
W
15.7
16.3
18.4
22.4
page 14/17
STD15N60DM6
Revision history
Table 10. Document revision history
DS13337 - Rev 1
Date
Revision
19-May-2020
1
Changes
First release.
page 15/17
STD15N60DM6
Contents
Contents
1
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
2
Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.1
Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3
Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
4
Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
4.1
DPAK (TO-252) type A2 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4.2
DPAK (TO-252) type C2 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.3
DPAK (TO-252) packing information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
DS13337 - Rev 1
page 16/17
STD15N60DM6
IMPORTANT NOTICE – PLEASE READ CAREFULLY
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Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2020 STMicroelectronics – All rights reserved
DS13337 - Rev 1
page 17/17