STD35NF06LT4

STD35NF06L N-CHANNEL 60V - 0.014 Ω - 35A DPAK STripFET™ II POWER MOSFET TYPE STD35NF06L s s s s VDSS 60 V RDS(on) < 0.017 Ω ID 35 A TYPICAL RDS(on) = 0.014 Ω LOW THRESHOLD DRIVE GATE CHARGE MINIMIZED SURFACE-MOUNTING DPAK (TO-252) POWER PACKAGE IN TAPE & REEL (SUFFIX “T4") 3 1 DPAK TO-252 (Suffix “T4”) DESCRIPTION This Power MOSFET is the latest development of STMicroelectronis unique "Single Feature Size™" stripbased process. The resulting transistor shows extremely high packing density for low on-resistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. INTERNAL SCHEMATIC DIAGRAM APPLICATIONS s DC-AC CONVERTERS s AUTOMOTIVE SWITCHING APPLICATION Ordering Information SALES TYPE STD35NF06LT4 MARKING D35NF06L PACKAGE TO-252 PACKAGING TAPE & REEL ABSOLUTE MAXIMUM RATINGS Symbol VDS VDGR VGS ID ID IDM(•) Ptot dv/dt (1) EAS (2) Tstg Tj Parameter Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 kΩ) Gate- source Voltage Drain Current (continuous) at TC = 25°C Drain Current (continuous) at TC = 100°C Drain Current (pulsed) Total Dissipation at TC = 25°C Derating Factor Peak Diode Recovery voltage slope Single Pulse Avalanche Energy Storage Temperature Operating Junction Temperature Value 60 60 ± 16 35 24.5 140 80 0.67 5 280 -55 to 175 (1) ISD ≤35A, di/dt ≤100A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX (2) Starting T j = 25 oC, ID = 30A, VDD =30V Unit V V V A A A W W/°C V/ns mJ °C (•) Pulse width limited by safe operating area. November 2003 1/9 STD35NF06L THERMAL DATA Rthj-case Rthj-amb Tl Thermal Resistance Junction-case Thermal Resistance Junction-ambient Maximum Lead Temperature For Soldering Purpose (1.6 mm from case, for 10 sec) Max Max 1.88 100 275 °C/W °C/W °C ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED) OFF Symbol V(BR)DSS IDSS IGSS Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) Test Conditions ID = 250 µA, VGS = 0 VDS = Max Rating VDS = Max Rating TC = 125°C VGS = ± 16V Min. 60 1 10 ±100 Typ. Max. Unit V µA µA nA ON (*) Symbol VGS(th) RDS(on) Parameter Gate Threshold Voltage Static Drain-source On Resistance Test Conditions VDS = VGS VGS = 10 V VGS = 4.5 V ID = 250 µA ID = 17.5 A ID = 17.5 A Min. 1 0.014 0.016 0.017 0.020 Typ. Max. Unit V Ω Ω DYNAMIC Symbol gfs (*) Ciss Coss Crss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Conditions VDS = 15 V ID = 17.5 A Min. Typ. 28 1700 305 105 Max. Unit S pF pF pF VDS = 25V f = 1 MHz VGS = 0 2/9 STD35NF06L ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbol td(on) tr Qg Qgs Qgd Parameter Turn-on Delay Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions ID =27.5 A VDD = 30 V RG = 4.7 Ω VGS = 4.5 V (Resistive Load, Figure 3) VDD= 48 V ID= 55 A VGS=4.5 V Min. Typ. 20 100 25 5 10 33 Max. Unit ns ns nC nC nC SWITCHING OFF Symbol td(off) tf Parameter Turn-off Delay Time Fall Time Test Conditions ID =27.5 A VDD = 30 V RG = 4.7 Ω VGS = 4.5 V (Resistive Load, Figure 3) Min. Typ. 40 20 Max. Unit ns ns SOURCE DRAIN DIODE Symbol ISD ISDM (•) VSD (*) trr Qrr IRRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current 1.5 %. Test Conditions Min. Typ. Max. 35 140 Unit A A V ISD = 35 A VGS = 0 80 200 5 1.5 di/dt = 100A/µs ISD = 35 A VDD = 30 V Tj = 150°C (see test circuit, Figure 5) QC A ns (*)Pulsed: Pulse duration = 300 µs, duty cycle (•)Pulse width limited by safe operating area. Safe Operating Area Thermal Impedance 3/9 STD35NF06L Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations 4/9 STD35NF06L Normalized Gate Threshold Voltage vs Temperature Normalized on Resistance vs Temperature Source-drain Diode Forward Characteristics . . 5/9 STD35NF06L Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/9 STD35NF06L TO-252 (DPAK) MECHANICAL DATA mm MIN. A A1 A2 B B2 C C2 D E G H L2 L4 0.6 2.2 0.9 0.03 0.64 5.2 0.45 0.48 6 6.4 4.4 9.35 0.8 1 0.023 TYP. MAX. 2.4 1.1 0.23 0.9 5.4 0.6 0.6 6.2 6.6 4.6 10.1 MIN. 0.086 0.035 0.001 0.025 0.204 0.017 0.019 0.236 0.252 0.173 0.368 0.031 0.039 inch TYP. MAX. 0.094 0.043 0.009 0.035 0.212 0.023 0.023 0.244 0.260 0.181 0.397 DIM. H A C2 C DETAIL "A" A1 L2 D DETAIL "A" B = = 3 B2 = = G E 2 L4 1 = = A2 0068772-B 7/9 STD35NF06L *on sales type 8/9 STD35NF06L Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. 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