STD4N62K3

STD4N62K3 Datasheet N-channel 620 V, 1.7 Ω typ., 3.8 A MDmesh™ K3 Power MOSFET in DPAK package Features TAB 2 3 1 • • • • • DPAK D(2, TAB) Order codes VDS RDS(on) max. ID PTOT STD4N62K3 620 V 2Ω 3.8 A 70 W 100% avalanche tested Extremely high dv/dt capability Very low intrinsic capacitance Improved diode reverse recovery characteristics Zener-protected Applications G(1) • S(3) AM01475V1 Switching applications Description This MDmesh™ K3 Power MOSFET is the result of improvements applied to STMicroelectronics’ MDmesh™ technology, combined with a new optimized vertical structure. This device boasts an extremely low on-resistance, superior dynamic performance and high avalanche capability, rendering it suitable for the most demanding applications. Product status link STD4N62K3 Product summary Order code STD4N62K3 Marking 4N62K3 Package DPAK Packing Tape and reel DS7065 - Rev 4 - August 2018 For further information contact your local STMicroelectronics sales office. www.st.com STD4N62K3 Electrical ratings 1 Electrical ratings Table 1. Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage 620 V VGS Gate- source voltage ± 30 V Drain current (continuous) at TC = 25 °C 3.8 A Drain current (continuous) at TC = 100 °C 2 A 15.2 A Total dissipation at TC = 25 °C 70 W Avalanche current, repetitive or not-repetitive 3.8 A Single pulse avalanche energy 115 mJ Gate-source human body model (R = 1.5 kΩ, C = 100 pF) 2.5 kV Peak diode recovery voltage slope 12 V/ns -55 to 150 °C Value Unit Thermal resistance junction-case 1.79 °C/W Thermal resistance junction-pcb 50 °C/W ID ID IDM (1) PTOT IAR EAS (2) ESD dv/dt (3) Tstg Drain current (pulsed) Storage temperature range Tj Operating junction temperature range 1. Pulse width limited by safe operating area. 2. Starting Tj = 25 °C, ID = IAR, VDD = 50 V. 3. ISD ≤ 3.8 A, di/dt ≤ 400 A/µs, VDD = 80% V(BR)DSS, VDS peak ≤ V(BR)DSS. Table 2. Thermal data Symbol Rthj-case Rthj-pcb (1) Parameter 1. When mounted on 1inch² FR-4 board, 2 oz Cu. DS7065 - Rev 4 page 2/20 STD4N62K3 Electrical characteristics 2 Electrical characteristics (TC = 25 °C unless otherwise specified) Table 3. On /off states Symbol V(BR)DSS Parameter Drain-source breakdown voltage Test conditions ID = 1 mA, VGS = 0 V Min. Typ. Max. 620 Unit V VGS = 0 V, VDS = 620 V 1 µA VGS = 0 V, VDS = 620 V TC = 125 °C (1) 50 µA ± 10 µA 3.75 4.5 V 1.7 2 Ω Typ. Max. Unit - pF IDSS Zero gate voltage drain current IGSS Gate body leakage current VGS = ±20 V, VDS = 0 V VGS(th) Gate threshold voltage VDS = VGS, ID = 50 µA RDS(on) Static drain-source on resistance VGS = 10 V, ID = 1.9 A 3 1. Defined by design, not subject to production test. Table 4. Dynamic Symbol Ciss Parameter Test conditions Min. Input capacitance 550 VDS = 50 V, f = 1 MHz, VGS = 0 V Coss Output capacitance Crss Reverse transfer capacitance Coss eq. (1) Equivalent output capacitance VGS = 0 V, VDS = 0 to 496 V RG Intrinsic gate resistance f = 1 MHz open drain Qg Total gate charge VDD = 496 V, ID = 3.8 A, Qgs Gate-source charge Qgd Gate-drain charge VGS = 0 to 10 V (see Figure 15. Test circuit for gate charge behavior) - 42 7 27 2 5 pF 10 Ω - nC 22 - 4 13 1. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS. Table 5. Switching times Symbol td(on) tr td(off) tf DS7065 - Rev 4 Parameter Test conditions Turn-on delay time VDD = 300 V, ID = 1.9 A, Rise time RG = 4.7 Ω, VGS = 10 V Turn-off delay time (see Figure 14. Test circuit for resistive load switching times and Figure 19. Switching time waveform) Fall time Min. Typ. Max. Unit - ns 10 9 - 29 19 page 3/20 STD4N62K3 Electrical characteristics Table 6. Source drain diode Symbol ISD Parameter Test conditions Min. Source-drain current Typ. Max. 3.8 - ISDM (1) Source-drain current (pulsed) VSD (2) Forward on voltage ISD = 3.8 A, VGS = 0 V trr Reverse recovery time ISD = 3.8 A, di/dt = 100 A/µs Qrr Reverse recovery charge IRRM Reverse recovery current VDD = 60 V (see Figure 16. Test circuit for inductive load switching and diode recovery times) trr Reverse recovery time ISD = 3.8 A, di/dt = 100 A/µs Qrr Reverse recovery charge VDD = 60 V, Tj = 150 °C IRRM Reverse recovery current (see Figure 16. Test circuit for inductive load switching and diode recovery times) 15.2 - - - 1.6 Unit A V 220 ns 1.4 μC 13 A 270 ns 1.9 μC 14 A 1. Pulse width limited by safe operating area. 2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%. Table 7. Gate-source Zener diode Symbol V(BR)GSO Parameter Gate-source breakdown voltage Test conditions ID = 0 A, IGS = ±1 mA Min. ±30 Typ. Max. - Unit V The built-in back-to-back Zener diodes are specifically designed to enhance the ESD performance of the device. The Zener voltage facilitates efficient and cost-effective device integrity protection, thus eliminating the need for additional external componentry. DS7065 - Rev 4 page 4/20 STD4N62K3 Electrical characteristics curves 2.1 Electrical characteristics curves Figure 2. Thermal impedance Figure 1. Safe operating area AM07173v1 10 10µs on ) 100µs GC20460 K 100 S( O Li p e r m at ite io d ni by n m th is ax a R re a is ID (A) D 1 1ms 10ms Tj=150°C Tc=25°C 0.1 10-1 S ingle puls e 0.01 0.1 10 1 100 10-2 10-5 VDS (V) Figure 3. Output characteristics 8 VGS =10V 10-2 10-1 tp (s) AM07176v1 ID (A) VDS =15V 6 7V 7 10-3 Figure 4. Transfer characteristics AM07175v1 ID (A) 10-4 5 6 4 5 4 3 6V 3 2 2 1 1 0 5V 5 0 10 15 20 25 VDS (V) Figure 5. Gate charge vs gate-source voltage DS (V) VGS (V) VDD=496V ID DS 0 0 2 4 6 8 VGS (V) Figure 6. Static drain-source on resistance AM07178v1 R DS (on) (Ω) VGS =10V 1.9 10 8 1.8 6 1.7 4 1.6 2 0 DS7065 - Rev 4 0 5 10 15 20 Q g (nC) 1.5 0 1 2 3 ID(A) page 5/20 STD4N62K3 Electrical characteristics curves Figure 7. Capacitance variations Figure 8. Output capacitance stored energy AM07179v1 C (pF) AM07180v1 E os s (µJ ) 3.0 1000 Cis s 2.5 2.0 100 1.5 Cos s 10 1 0.1 Crs s 1 100 10 VDS (V) Figure 9. Normalized gate threshold voltage vs temperature AM07181v1 VGS (th) (norm) 1.0 0.5 0 0 400 200 300 100 500 600 VDS (V) Figure 10. Normalized on resistance vs temperature AM07182v1 R DS (on) (norm) 2.5 1.10 ID = 1 mA 1.00 2.0 1.5 VGS = 10 V ID = 1.9 A 0.90 1.0 0.80 0.70 -75 0.5 -25 25 75 125 TJ (°C) Figure 11. Normalized V(BR)DSS vs temperature AM07183v1 V(BR)DSS (norm) 0.0 -75 25 -25 75 125 TJ (°C) Figure 12. Source-drain diode forward characteristics AM08888v1 VS D (V) TJ =25°C 1.10 0.7 1.05 0.6 TJ =150°C 0.5 1.00 0.4 0.3 0.95 0.2 0.90 -75 DS7065 - Rev 4 -25 25 75 125 TJ (°C) 0.1 0 1 2 3 4 5 IS D(A) page 6/20 STD4N62K3 Electrical characteristics curves Figure 13. Maximum avalanche energy vs temperature E AS (mJ ) 120 110 100 90 80 70 60 50 40 30 20 10 0 0 DS7065 - Rev 4 AM07184v1 ID=3.8 A VDD=50 V 20 40 60 80 100 120 140 TJ (°C) page 7/20 STD4N62K3 Test circuits 3 Test circuits Figure 14. Test circuit for resistive load switching times Figure 15. Test circuit for gate charge behavior VDD 12 V 2200 + μF 3.3 μF VDD VD VGS 1 kΩ 100 nF RL IG= CONST VGS RG 47 kΩ + pulse width D.U.T. 2.7 kΩ 2200 μF pulse width D.U.T. 100 Ω VG 47 kΩ 1 kΩ AM01469v1 AM01468v1 Figure 16. Test circuit for inductive load switching and diode recovery times D G A D.U.T. S 25 Ω A L A B B 3.3 µF D G + VD 100 µH fast diode B Figure 17. Unclamped inductive load test circuit RG 1000 + µF 2200 + µF VDD 3.3 µF VDD ID D.U.T. S D.U.T. Vi _ pulse width AM01471v1 AM01470v1 Figure 19. Switching time waveform Figure 18. Unclamped inductive waveform ton V(BR)DSS td(on) VD toff td(off) tr tf 90% 90% IDM VDD 10% 0 ID VDD AM01472v1 VGS 0 VDS 10% 90% 10% AM01473v1 DS7065 - Rev 4 page 8/20 STD4N62K3 Package information 4 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. DS7065 - Rev 4 page 9/20 STD4N62K3 DPAK (TO-252) type A2 package information 4.1 DPAK (TO-252) type A2 package information Figure 20. DPAK (TO-252) type A2 package outline 0068772_type-A2_rev25 DS7065 - Rev 4 page 10/20 STD4N62K3 DPAK (TO-252) type A2 package information Table 8. DPAK (TO-252) type A2 mechanical data Dim. mm Min. Max. A 2.20 2.40 A1 0.90 1.10 A2 0.03 0.23 b 0.64 0.90 b4 5.20 5.40 c 0.45 0.60 c2 0.48 0.60 D 6.00 6.20 D1 4.95 E 6.40 E1 5.10 5.20 5.30 e 2.159 2.286 2.413 e1 4.445 4.572 4.699 H 9.35 10.10 L 1.00 1.50 L1 2.60 2.80 3.00 L2 0.65 0.80 0.95 L4 0.60 R V2 DS7065 - Rev 4 Typ. 5.10 5.25 6.60 1.00 0.20 0° 8° page 11/20 STD4N62K3 DPAK (TO-252) type C2 package information 4.2 DPAK (TO-252) type C2 package information Figure 21. DPAK (TO-252) type C2 package outline 0068772_C2_25 DS7065 - Rev 4 page 12/20 STD4N62K3 DPAK (TO-252) type C2 package information Table 9. DPAK (TO-252) type C2 mechanical data Dim. mm Min. Typ. Max. A 2.20 2.30 2.38 A1 0.90 1.01 1.10 A2 0.00 0.10 b 0.72 0.85 b4 5.13 c 0.47 0.60 c2 0.47 0.60 D 6.00 D1 5.10 E 6.50 E1 5.20 e 2.186 2.286 2.386 H 9.80 10.10 10.40 L 1.40 1.50 1.70 L1 L2 6.20 5.60 6.60 6.70 5.50 0.90 1.25 0.51 BSC 0.60 L6 DS7065 - Rev 4 6.10 5.46 2.90 REF L3 L4 5.33 0.80 1.00 1.80 BSC θ1 5° 7° 9° θ2 5° 7° 9° V2 0° 8° page 13/20 STD4N62K3 DPAK (TO-252) type E package information 4.3 DPAK (TO-252) type E package information Figure 22. DPAK (TO-252) type E package outline 0068772_type-E_rev.25 DS7065 - Rev 4 page 14/20 STD4N62K3 DPAK (TO-252) type E package information Table 10. DPAK (TO-252) type E mechanical data Dim. A mm Min. Typ. Max. 2.18 2.39 A2 0.13 b 0.65 0.884 b4 4.95 5.46 c 0.46 0.61 c2 0.46 0.60 D 5.97 6.22 D1 5.21 E 6.35 E1 4.32 6.73 e 2.286 e1 4.572 H 9.94 10.34 L 1.50 1.78 L1 L2 2.74 0.89 L4 1.27 1.02 Figure 23. DPAK (TO-252) recommended footprint (dimensions are in mm) FP_0068772_25 DS7065 - Rev 4 page 15/20 STD4N62K3 DPAK (TO-252) packing information 4.4 DPAK (TO-252) packing information Figure 24. DPAK (TO-252) tape outline 10 pitches cumulative tolerance on tape +/- 0.2 mm T P0 Top cover tape P2 D E F B1 K0 For machine ref. only including draft and radii concentric around B0 W B0 A0 P1 D1 User direction of feed R Bending radius User direction of feed AM08852v1 DS7065 - Rev 4 page 16/20 STD4N62K3 DPAK (TO-252) packing information Figure 25. DPAK (TO-252) reel outline T 40mm min. access hole at slot location B D C N A G measured at hub Tape slot in core for tape start 2.5mm min.width Full radius AM06038v1 Table 11. DPAK (TO-252) tape and reel mechanical data Tape Dim. mm mm Dim. Min. Max. A0 6.8 7 A B0 10.4 10.6 B 1.5 12.1 C 12.8 1.6 D 20.2 G 16.4 50 B1 DS7065 - Rev 4 Reel Min. Max. 330 13.2 D 1.5 D1 1.5 E 1.65 1.85 N F 7.4 7.6 T K0 2.55 2.75 P0 3.9 4.1 Base qty. 2500 P1 7.9 8.1 Bulk qty. 2500 P2 1.9 2.1 R 40 T 0.25 0.35 W 15.7 16.3 18.4 22.4 page 17/20 STD4N62K3 Revision history Table 12. Document revision history Date Revision 16-Dec-2010 1 Changes First release. Added min and max values for RG in Table 5: Dynamic and 26-Apr-2012 2 Section 5: Packaging mechanical data. Updated Section 4: Package mechanical data. Minor text changes. 09-Sep-2013 3 – Updated: Section 4: Package mechanical data – Minor text changes The part number STB4N62K3 has been moved to a separate datasheet. Removed maturity status indication from cover page. The document status is production data. 03-Aug-2018 4 Updated title and features in cover page. Updated Section 1 Electrical ratings, Section 2 Electrical characteristics and Section 4 Package information. Minor text changes. DS7065 - Rev 4 page 18/20 STD4N62K3 Contents Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 2 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2.1 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 4 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4.1 DPAK (TO-252) type A2 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4.2 DPAK (TO-252) type C2 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4.3 DPAK (TO-252) type E package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.4 DPAK (TO-252) packing information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18 DS7065 - Rev 4 page 19/20 STD4N62K3 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2018 STMicroelectronics – All rights reserved DS7065 - Rev 4 page 20/20