STD6N62K3

STD6N62K3 Datasheet N-channel 620 V, 0.95 Ω typ., 5.5 A MDmesh™ K3 Power MOSFET in DPAK package Features TAB • • • • • 2 3 1 DPAK D(2, TAB) Order codes VDS RDS(on) max. ID PTOT STD6N62K3 620 V 1.2 Ω 5.5 A 90 W 100% avalanche tested Extremely high dv/dt capability Very low intrinsic capacitance Improved diode reverse recovery characteristics Zener-protected Applications • Switching applications G(1) Description S(3) AM01475V1 This MDmesh™ K3 Power MOSFET is the result of improvements applied to STMicroelectronics’ MDmesh™ technology, combined with a new optimized vertical structure. This device boasts an extremely low on-resistance, superior dynamic performance and high avalanche capability, rendering it suitable for the most demanding applications. Product status STD6N62K3 Product summary Order code STD6N62K3 Marking 6N62K3 Package DPAK Packing Tape and reel DS8813 - Rev 2 - April 2018 For further information contact your local STMicroelectronics sales office. www.st.com STD6N62K3 Electrical ratings 1 Electrical ratings Table 1. Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage 620 V VGS Gate- source voltage ± 30 V Drain current (continuous) at TC = 25 °C 5.5 A Drain current (continuous) at TC = 100 °C 3 A Drain current (pulsed) 22 A PTOT Total dissipation at TC = 25 °C 90 W IAR (2) Avalanche current, repetitive or not-repetitive 5.5 A Single pulse avalanche energy 140 mJ Gate-source human body model (R = 1.5 kΩ, C = 100 pF) 2.5 kV Peak diode recovery voltage slope 12 V/ns -55 to 150 °C Value Unit Thermal resistance junction-case 1.39 °C/W Thermal resistance junction-pcb 50 °C/W ID ID IDM EAS (1) (3) ESD dv/dt (4) Tstg Storage temperature range Tj Operating junction temperature range 1. Pulse width limited by safe operating area. 2. Pulse width limited by Tj max. 3. Starting Tj = 25 °C, ID = IAR, VDD = 50 V. 4. ISD ≤ 5.5 A, di/dt ≤ 400 A/µs, VDD = 80% V(BR)DSS. Table 2. Thermal data Symbol Rthj-case Rthj-pcb (1) Parameter 1. When mounted on 1inch² FR-4 board, 2 oz Cu. DS8813 - Rev 2 page 2/19 STD6N62K3 Electrical characteristics 2 Electrical characteristics (TC = 25 °C unless otherwise specified) Table 3. On /off states Symbol V(BR)DSS Parameter Drain-source breakdown voltage Test conditions ID = 1 mA, VGS = 0 V Min. Typ. Max. 620 Unit V VGS = 0 V, VDS = 620 V 0.8 µA VGS = 0 V, VDS = 620 V TC = 125 °C (1) 50 µA ±9 µA 3.75 4.5 V 0.95 1.2 Ω Typ. Max. Unit - pF - pF - Ω - nC IDSS Zero gate voltage drain current IGSS Gate body leakage current VGS = ±20 V, VDS = 0 V VGS(th) Gate threshold voltage VDS = VGS, ID = 50 µA RDS(on) Static drain-source on resistance VGS = 10 V, ID = 2.8 A 3 1. Defined by design, not subject to production test. Table 4. Dynamic Symbol Ciss Parameter Output capacitance Crss Reverse transfer capacitance Co(tr) (2) Min. Input capacitance Coss Co(er)(1) Test conditions 875 VDS = 50 V, f = 1 MHz, VGS = 0 V - 100 17 Equivalent output capacitance energy related VGS = 0 V, Equivalent output capacitance VDS = 0 to 480 V 28 63 time related RG Intrinsic gate resistance f = 1 MHz open drain Qg Total gate charge VDD = 496 V, ID = 5.5 A, Qgs Gate-source charge Qgd Gate-drain charge VGS = 0 to 10 V (see Figure 15. Test circuit for gate charge behavior) - 3.5 34 - 4 22 1. Co(er) is a constant capacitance value that gives the same stored energy as Coss while VDS is rising from 0 to 80% VDSS. 2. Co(tr) is a constant capacitance value that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS. Table 5. Switching times Symbol td(on) tr td(off) tf DS8813 - Rev 2 Parameter Test conditions Turn-on delay time VDD = 310 V, ID = 2.75 A, Rise time RG = 4.7 Ω, VGS = 10 V Turn-off delay time Fall time (see Figure 14. Test circuit for resistive load switching times and Figure 19. Switching time waveform) Min. Typ. Max. Unit - ns 22 12 - 49 20 page 3/19 STD6N62K3 Electrical characteristics Table 6. Source drain diode Symbol ISD Parameter Test conditions Min. Source-drain current Typ. Max. 5.5 - ISDM (1) Source-drain current (pulsed) VSD (2) Forward on voltage ISD = 5.5 A, VGS = 0 V trr Reverse recovery time ISD = 5.5 A, di/dt = 100 A/µs Qrr Reverse recovery charge IRRM Reverse recovery current VDD = 60 V (see Figure 16. Test circuit for inductive load switching and diode recovery times) trr Reverse recovery time ISD = 5.5 A, di/dt = 100 A/µs Qrr Reverse recovery charge VDD = 60 V, Tj = 150 °C IRRM Reverse recovery current (see Figure 16. Test circuit for inductive load switching and diode recovery times) 27 - - - 1.5 Unit A V 290 ns 1.9 μC 13.5 A 335 ns 2.4 μC 14.5 A 1. Pulse width limited by safe operating area. 2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%. Table 7. Gate-source Zener diode Symbol V(BR)GSO Parameter Gate-source breakdown voltage Test conditions ID = 0 A, IGS = ±1 mA Min. ±30 Typ. Max. - Unit V The built-in back-to-back Zener diodes are specifically designed to enhance the ESD performance of the device. The Zener voltage facilitates efficient and cost-effective device integrity protection, thus eliminating the need for additional external componentry. DS8813 - Rev 2 page 4/19 STD6N62K3 Electrical characteristics curves 2.1 Electrical characteristics curves Figure 1. Safe operating area Figure 2. Thermal impedance AM09052v1 ID (A) Tj=150°C Tc=25°C Single pulse 101 Op Li erati mi o ted n in by thi ma s ar x R ea DS is (on ) 10µs 100 10-1 10-1 1ms 102 10-2 10-5 VDS(V) 10-4 10-3 10-2 10-1 tp (s) Figure 4. Transfer characteristics AM09054v1 ID (A) VGS=10V AM09055v1 ID (A) 8 VDS=15V 7 10 6 8 5 6V 4 6 3 4 2 2 0 10-1 10ms Figure 3. Output characteristics 12 100 100µs 101 100 GC20460 K 1 5V 20 10 0 VDS(V) Figure 5. Gate charge vs gate-source voltage AM09057v1 VGS (V) VDS(V) VDD=496V ID=5.5A 12 VDS 500 10 400 8 0 0 2 4 8 6 10 VGS(V) Figure 6. Static drain-source on resistance AM09056v1 RDS(on) (W) VGS=10V 1.15 1.10 1.05 300 1.00 6 200 4 100 2 0 DS8813 - Rev 2 0 10 20 30 0 Qg (nC) 0.95 0.90 0.85 0 1 2 3 4 5 6 ID(A) page 5/19 STD6N62K3 Electrical characteristics curves Figure 7. Capacitance variations Figure 8. Output capacitance stored energy AM09058v1 C (pF) AM09059v1 Eoss (µJ) 5 1000 Ciss 4 100 3 Coss 10 Crss 1 0.1 1 100 10 VDS(V) Figure 9. Normalized gate threshold voltage vs temperature AM09061v1 VGS(th) (norm) ID=50µA 1.10 2 1 0 0 100 200 400 300 500 VDS(V) Figure 10. Normalized on resistance vs temperature AM09062v1 RDS(on) (norm) ID=2.8A 2.5 VGS=10V 2.0 1.00 1.5 0.90 1.0 0.5 0.80 0.70 -75 0.0 -75 -25 25 75 125 Figure 11. Normalized BVDSS vs temperature AM09060v1 BVDSS (norm) 25 -25 75 TJ(°C) 125 TJ(°C) ID=1mA Figure 12. Source-drain diode forward characteristics AM09063v1 VSD (V) TJ=-50°C 1.0 1.10 TJ=25°C 0.8 1.05 0.6 1.00 0.4 0.95 0.90 -75 DS8813 - Rev 2 TJ=150°C 0.2 -25 25 75 125 TJ(°C) 0 0 1 2 3 4 5 6 ISD(A) page 6/19 STD6N62K3 Electrical characteristics curves Figure 13. Maximum avalanche energy vs temperature AM09064v1 EAS (mJ) 160 ID=5.5 A VDD=50 V 140 120 100 80 60 40 20 0 0 DS8813 - Rev 2 20 40 60 80 100 120 140 TJ(°C) page 7/19 STD6N62K3 Test circuits 3 Test circuits Figure 14. Test circuit for resistive load switching times Figure 15. Test circuit for gate charge behavior VDD 12 V 2200 + μF 3.3 μF VDD VD VGS 1 kΩ 100 nF RL IG= CONST VGS RG 47 kΩ + pulse width D.U.T. 2.7 kΩ 2200 μF pulse width D.U.T. 100 Ω VG 47 kΩ 1 kΩ AM01469v1 AM01468v1 Figure 16. Test circuit for inductive load switching and diode recovery times Figure 17. Unclamped inductive load test circuit L D G A D.U.T. S 25 Ω A A 100 µH fast diode B B B VD 3.3 µF D G + RG 1000 + µF 2200 + µF 3.3 µF VDD ID VDD D.U.T. S D.U.T. Vi _ pulse width AM01471v1 AM01470v1 Figure 18. Unclamped inductive waveform Figure 19. Switching time waveform V(BR)DSS ton VD td(on) IDM toff td(off) tr 90% tf 90% 10% ID VDD 10% 0 VDD VGS 0 VDS 90% 10% AM01472v1 AM01473v1 DS8813 - Rev 2 page 8/19 STD6N62K3 Package information 4 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. DS8813 - Rev 2 page 9/19 STD6N62K3 DPAK (TO-252) type A2 package information 4.1 DPAK (TO-252) type A2 package information Figure 20. DPAK (TO-252) type A2 package outline 0068772_type-A2_rev24 DS8813 - Rev 2 page 10/19 STD6N62K3 DPAK (TO-252) type A2 package information Table 8. DPAK (TO-252) type A2 mechanical data Dim. mm Min. Max. A 2.20 2.40 A1 0.90 1.10 A2 0.03 0.23 b 0.64 0.90 b4 5.20 5.40 c 0.45 0.60 c2 0.48 0.60 D 6.00 6.20 D1 4.95 E 6.40 E1 5.10 5.20 5.30 e 2.16 2.28 2.40 e1 4.40 4.60 H 9.35 10.10 L 1.00 1.50 L1 2.60 2.80 3.00 L2 0.65 0.80 0.95 L4 0.60 R V2 DS8813 - Rev 2 Typ. 5.10 5.25 6.60 1.00 0.20 0° 8° page 11/19 STD6N62K3 DPAK (TO-252) type C2 package information 4.2 DPAK (TO-252) type C2 package information Figure 21. DPAK (TO-252) type C2 package outline 0068772_C2_24 DS8813 - Rev 2 page 12/19 STD6N62K3 DPAK (TO-252) type C2 package information Table 9. DPAK (TO-252) type C2 mechanical data Dim. mm Min. Typ. Max. A 2.20 2.30 2.38 A1 0.90 1.01 1.10 A2 0.00 0.10 b 0.72 0.85 b4 5.13 c 0.47 0.60 c2 0.47 0.60 D 6.00 D1 5.10 E 6.50 E1 5.20 e 2.186 2.286 2.386 H 9.80 10.10 10.40 L 1.40 1.50 1.70 L1 L2 6.20 5.60 6.60 6.70 5.50 0.90 1.25 0.51 BSC 0.60 L6 DS8813 - Rev 2 6.10 5.46 2.90 REF L3 L4 5.33 0.80 1.00 1.80 BSC θ1 5° 7° 9° θ2 5° 7° 9° V2 0° 8° page 13/19 STD6N62K3 DPAK (TO-252) type C2 package information Figure 22. DPAK (TO-252) recommended footprint (dimensions are in mm) FP_0068772_24 DS8813 - Rev 2 page 14/19 STD6N62K3 DPAK (TO-252) packing information 4.3 DPAK (TO-252) packing information Figure 23. DPAK (TO-252) tape outline 10 pitches cumulative tolerance on tape +/- 0.2 mm T P0 Top cover tape P2 D E F B1 K0 For machine ref. only including draft and radii concentric around B0 W B0 A0 P1 D1 User direction of feed R Bending radius User direction of feed AM08852v1 DS8813 - Rev 2 page 15/19 STD6N62K3 DPAK (TO-252) packing information Figure 24. DPAK (TO-252) reel outline T 40mm min. access hole at slot location B D C N A G measured at hub Tape slot in core for tape start 2.5mm min.width Full radius AM06038v1 Table 10. DPAK (TO-252) tape and reel mechanical data Tape Dim. mm mm Dim. Min. Max. A0 6.8 7 A B0 10.4 10.6 B 1.5 12.1 C 12.8 1.6 D 20.2 G 16.4 50 B1 DS8813 - Rev 2 Reel Min. Max. 330 13.2 D 1.5 D1 1.5 E 1.65 1.85 N F 7.4 7.6 T K0 2.55 2.75 P0 3.9 4.1 Base qty. 2500 P1 7.9 8.1 Bulk qty. 2500 P2 1.9 2.1 R 40 T 0.25 0.35 W 15.7 16.3 18.4 22.4 page 16/19 STD6N62K3 Revision history Table 11. Document revision history Date 21-Dec-2011 Revision Changes 1 First release. The part number STB6N62K3 has been moved to a separate datasheet. Removed maturity status indication from cover page. The document status is production data. 10-Apr-2018 2 Updated title and features in cover page. Updated Section 1 Electrical ratings, Section 2 Electrical characteristics, Section 2.1 Electrical characteristics curves and Section 4 Package information. Minor text changes. DS8813 - Rev 2 page 17/19 STD6N62K3 Contents Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 2 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2.1 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 4 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4.1 DPAK (TO-252) type A2 package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4.2 DPAK (TO-252) type C2 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4.3 DPAK (TO-252) packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 DS8813 - Rev 2 page 18/19 STD6N62K3 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2018 STMicroelectronics – All rights reserved DS8813 - Rev 2 page 19/19