STD8NF25

STD8NF25 Datasheet Automotive-grade N-channel 250 V, 318 mΩ, 8 A, STripFET™ II Power MOSFET in a DPAK package Features TAB 2 3 1 DPAK • • • D(2, TAB) Order code VDS RDS(on)max. ID STD8NF25 250 V 420 mΩ 8A AEC-Q101 qualified 100% avalanche tested 175 °C maximum junction temperature Applications • G(1) Switching applications Description S(3) AM01475v1_noZen This Power MOSFET series has been developed using STMicroelectronics' unique STripFET™ process, which is specifically designed to minimize input capacitance and gate charge. This renders the device suitable for use as primary switch in advanced high-efficiency isolated DC-DC converters for telecom and computer applications, and applications with low gate charge driving requirements. Product status link STD8NF25 Product summary Order code STD8NF25 Marking 8NF25 Package DPAK Packing Tape and reel DS7152 - Rev 2 - July 2018 For further information contact your local STMicroelectronics sales office. www.st.com STD8NF25 Electrical ratings 1 Electrical ratings Table 1. Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage 250 V VGS Gate-source voltage ±20 V Drain current (continuous) at TC = 25 °C 8 A Drain current (continuous) at TC = 100 °C 6 A Drain current (pulsed) 32 A Total dissipation at TC = 25 °C 72 W -55 to 175 °C Value Unit ID IDM (1) PTOT TJ Tstg Operating junction temperature range Storage temperature range 1. Pulse width is limited by safe operating area. Table 2. Thermal data Symbol Parameter Rthj-case Thermal resistance junction-case 2.08 °C/W Rthj-pcb(1) Thermal resistance junction-pcb 50 °C/W Value Unit 8 A 110 mJ 1. When mounted on an 1-inch² FR-4, 2 Oz copper board Table 3. Avalanche characteristics Symbol DS7152 - Rev 2 Parameter IAR Avalanche current, repetitive or non-repetitive (pulse width limited by Tjmax) EAS Single pulse avalanche energy (starting TJ = 25 °C, ID = IAR, VDD = 50 V) page 2/16 STD8NF25 Electrical characteristics 2 Electrical characteristics (TCASE = 25 °C unless otherwise specified) Table 4. On/off states Symbol V(BR)DSS Parameter Test conditions Drain-source breakdown voltage ID = 1 mA, VGS = 0 V Min. Typ. 250 Zero gate voltage drain current 1 µA 50 µA ±100 nA 4 V 318 420 mΩ Typ. Max. Unit - pF VGS = 0 V, VDS = 250 V, TC = 125 °C (1) IGSS Gate body leakage current VDS = 0 V, VGS = ±20 V VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA RDS(on) Static drain-source on-resistance VGS = 10 V, ID = 8 A Unit V VGS = 0 V, VDS = 250 V IDSS Max. 2 1. Defined by design, not subject to production test. Table 5. Dynamic Symbol Parameter Test conditions Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Qg Total gate charge VDD = 200 V, ID = 8 A, Gate-source charge VGS = 0 to 10 V Gate-drain charge (see Figure 13. Test circuit for gate charge behavior) Qgs Qgd VDS = 25 V, f = 1 MHz, VGS = 0 V Min. 500 - 90 15 16 - - 3.5 8 - nC Table 6. Switching times Symbol td(on) tr td(off) tf Parameter Test conditions Turn-on delay time VDD = 125 V, ID = 4 A, Rise time RG = 4.7 Ω, VGS = 10 V (see Figure 12. Test circuit for resistive load switching times and Figure 17. Switching time waveform) Turn-off delay time Fall time Min. Typ. Max. Unit - ns Max. Unit 13 10 - 26 6 Table 7. Source drain diode Symbol ISD DS7152 - Rev 2 Parameter Test conditions Source-drain current ISDM(1) Source-drain current (pulsed) VSD(2) Forward on voltage Min. - ISD = 8 A, VGS = 0 V - Typ. 8 32 1.5 A V page 3/16 STD8NF25 Electrical characteristics Symbol Parameter Test conditions trr Reverse recovery time ISD = 8 A, di/dt = 100 A/µs, Qrr Reverse recovery charge VDD = 50 V Reverse recovery current (see Figure 14. Test circuit for inductive load switching and diode recovery times) trr Reverse recovery time ISD = 8 A, di/dt = 100 A/µs, Qrr Reverse recovery charge VDD = 50 V, Tj = 150 °C IRRM Reverse recovery current (see Figure 14. Test circuit for inductive load switching and diode recovery times) IRRM Min. - - Typ. Max. Unit 115 ns 0.47 μC 8.5 A 130 ns 0.58 μC 9.5 A 1. Pulse width limited by safe operating area. 2. Pulsed: pulse duration = 300 μs, duty cycle 1.5%. DS7152 - Rev 2 page 4/16 STD8NF25 Electrical characteristics (curves) 2.1 Electrical characteristics (curves) Figure 1. Safe operating area Figure 2. Thermal impedance AM11280v1 101 10µs n) (o 100µs DS Op Li erat mi ion ted i by n thi ma s a x R rea is ID (A) 100 1ms 10ms Tj = 175°C Tc = 25°C Single pulse 10-1 10-1 101 100 VDS(V) 102 Figure 3. Output characteristics Figure 4. Transfer characteristics AM11281v1 ID (A) VGS=10V AM11282v1 ID (A) VDS = 20 V 20 20 6V 15 15 10 10 5 5 4V 0 0 5 10 15 20 25 VDS(V) Figure 5. Normalized V(BR)DSS vs temperature 0 2 0 4 8 6 10 VGS(V) Figure 6. Static drain-source on-resistance AM11283v1 V(BR)DSS AM11284v1 RDS(on) (Ω) (norm) 1.2 VGS=10V 0.35 1.0 ID = 1 mA VGS = 0 V 0.8 0.30 0.6 0.25 0.4 0.20 0.2 0 -100 DS7152 - Rev 2 0.15 -50 0 50 100 150 TJ(°C) 0.10 0 1 2 3 4 5 6 7 8 ID(A) page 5/16 STD8NF25 Electrical characteristics (curves) Figure 7. Gate charge vs gate-source voltage VGS (V) AM11285v1 VDS VDD=200V ID=8A 12 Figure 8. Capacitance variations (V) VDS AM11286v1 C (pF) 200 1000 10 Ciss 150 8 100 6 Coss 100 4 2 0 10 50 0 8 4 1 0.1 0 Qg (nC) 16 12 Figure 9. Normalized gate threshold voltage vs temperature (norm) 1 10 100 VDS(V) Figure 10. Normalized on-resistance vs temperature AM11288v1 RDS(on) AM11287v1 VGS(th) Crss (norm) ID=250µA ID = 8 A VGS = 10 V 2.5 1.0 2.0 1.5 0.8 1.0 0.6 0.4 -100 0.5 -50 0 50 100 0 -100 TJ(°C) 150 -50 0 50 100 150 TJ(°C) Figure 11. Source-drain diode forward characteristics AM11289v1 VSD (V) TJ=-55°C 0.9 TJ=25°C 0.8 0.7 TJ=175°C 0.6 0.5 0.4 DS7152 - Rev 2 0 2 4 6 8 ISD(A) page 6/16 STD8NF25 Test circuits 3 Test circuits Figure 12. Test circuit for resistive load switching times Figure 13. Test circuit for gate charge behavior VDD 12 V 2200 + μF 3.3 μF VDD VD VGS 1 kΩ 100 nF RL IG= CONST VGS RG 47 kΩ + pulse width D.U.T. 2.7 kΩ 2200 μF pulse width D.U.T. 100 Ω VG 47 kΩ 1 kΩ AM01469v1 AM01468v1 Figure 14. Test circuit for inductive load switching and diode recovery times D G A D.U.T. S 25 Ω A L A B B 3.3 µF D G + VD 100 µH fast diode B Figure 15. Unclamped inductive load test circuit RG 1000 + µF 2200 + µF VDD 3.3 µF VDD ID D.U.T. S D.U.T. Vi _ pulse width AM01471v1 AM01470v1 Figure 17. Switching time waveform Figure 16. Unclamped inductive waveform ton V(BR)DSS td(on) VD toff td(off) tr tf 90% 90% IDM VDD 10% 0 ID VDD AM01472v1 VGS 0 VDS 10% 90% 10% AM01473v1 DS7152 - Rev 2 page 7/16 STD8NF25 Package information 4 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. DS7152 - Rev 2 page 8/16 STD8NF25 DPAK (TO-252) type A2 package information 4.1 DPAK (TO-252) type A2 package information Figure 18. DPAK (TO-252) type A2 package outline 0068772_type-A2_rev25 DS7152 - Rev 2 page 9/16 STD8NF25 DPAK (TO-252) type A2 package information Table 8. DPAK (TO-252) type A2 mechanical data Dim. mm Min. Max. A 2.20 2.40 A1 0.90 1.10 A2 0.03 0.23 b 0.64 0.90 b4 5.20 5.40 c 0.45 0.60 c2 0.48 0.60 D 6.00 6.20 D1 4.95 E 6.40 E1 5.10 5.20 5.30 e 2.159 2.286 2.413 e1 4.445 4.572 4.699 H 9.35 10.10 L 1.00 1.50 L1 2.60 2.80 3.00 L2 0.65 0.80 0.95 L4 0.60 R V2 DS7152 - Rev 2 Typ. 5.10 5.25 6.60 1.00 0.20 0° 8° page 10/16 STD8NF25 DPAK (TO-252) type A2 package information Figure 19. DPAK (TO-252) recommended footprint (dimensions are in mm) FP_0068772_25 DS7152 - Rev 2 page 11/16 STD8NF25 DPAK (TO-252) packing information 4.2 DPAK (TO-252) packing information Figure 20. DPAK (TO-252) tape outline 10 pitches cumulative tolerance on tape +/- 0.2 mm T P0 Top cover tape P2 D E F B1 K0 For machine ref. only including draft and radii concentric around B0 W B0 A0 P1 D1 User direction of feed R Bending radius User direction of feed AM08852v1 DS7152 - Rev 2 page 12/16 STD8NF25 DPAK (TO-252) packing information Figure 21. DPAK (TO-252) reel outline T 40mm min. access hole at slot location B D C N A G measured at hub Tape slot in core for tape start 2.5mm min.width Full radius AM06038v1 Table 9. DPAK (TO-252) tape and reel mechanical data Tape Dim. mm mm Dim. Min. Max. A0 6.8 7 A B0 10.4 10.6 B 1.5 12.1 C 12.8 1.6 D 20.2 G 16.4 50 B1 DS7152 - Rev 2 Reel Min. Max. 330 13.2 D 1.5 D1 1.5 E 1.65 1.85 N F 7.4 7.6 T K0 2.55 2.75 P0 3.9 4.1 Base qty. 2500 P1 7.9 8.1 Bulk qty. 2500 P2 1.9 2.1 R 40 T 0.25 0.35 W 15.7 16.3 18.4 22.4 page 13/16 STD8NF25 Revision history Table 10. Document revision history Date Version 26-Apr-2012 1 Changes First release. Removed maturity status indication from cover page. 03-Jul-2018 2 Updated title, features and description on cover page. Updated Section 4.1 DPAK (TO-252) type A2 package information. Minor text changes DS7152 - Rev 2 page 14/16 STD8NF25 Contents Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 2 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 4 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 4.1 DPAK (TO-252) type A2 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4.2 DPAK (TO-252) packing information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 DS7152 - Rev 2 page 15/16 STD8NF25 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2018 STMicroelectronics – All rights reserved DS7152 - Rev 2 page 16/16