STEC01PUR

STEC01 Datasheet Ground path safety switch with programmable timers Features • • Input voltage range from 2.2 to 5 V 12 mΩ typ. N-channel FET RDS(on) • • • • • • • 7 A continuous current capability PWM control signal from 4 Hz to 5 kHz, with 30% to 100% duty cycle 30 µA battery supply current 2 programmable timers: T1, T3 1 fixed timer T2 Input undervoltage lockout VFQFPN 3x3x0.9 16L, 0.5 mm pitch package Applications • • • Electronic cigarettes Timing/reset circuitry Ground path protection circuitry Description Product status link STEC01 Product summary Order code STEC01PUR Package VFQFPN 3x3x0.9 16L The STEC01 is an integrated programmable 12 mΩ power switch managed by the timer based circuitry. The device has 3 timers designed to interrupt the ground path of a power application after a maximum on-time and inhibits the restart of the platform during a cooling window. The maximum on-time can be set from few seconds to hundreds of seconds, while the cooling window can be programmed to 69, 345 and 1380 seconds. 3 multi-level input pins, combined with a programmable oscillator and a fixed oscillator, are used to set the timing. An input continuous or pulsed signal applied to the PWM pin starts the internal logic and counters. In case of a normal operation, as soon as the activity on the PWM pin stops, the device automatically enters idle mode, waiting for a new valid PWM signal to be applied. If the device detects a fault condition, a reset pulse is generated and the safety MOSFET is turned off and managed according to a predefined state machine. The STEC01 has a continuous current capability up to 7 A through the internal power MOSFET. A higher current can be supported by using an external power transistor driven through GDRV pin. A rising edge on the HW_RESET input pin generates a 57 ms pulse on the RESET_FAULT pin. This function can be used to notify the connection of an external power source (e.g. USB). DS13063 - Rev 2 - October 2020 For further information contact your local STMicroelectronics sales office. www.st.com STEC01 Block diagram 1 Block diagram Figure 1. Block diagram PWM HW_RESET/ USB conn. VBAT Thermal shutdown RESET/FAULT HW_Reset PWR T1 LOGIC Safety FET (SF) GDRV T2 TPF T1P1 T1P2 T3P PGND T3 OSC1, OSC2, Timers Decoder AGND DS13063 - Rev 2 page 2/22 STEC01 Pin configuration 2 Pin configuration Figure 2. Pin configuration Table 1. Pin configuration Symbol Pin RESET\FAULT 1 Open drain output, active low. It generates a 57 ms pulse if a fault condition is detected or when HW_RESET\USB is pulled high VBAT 2 Battery supply voltage. Bypass this pin to GND with a 1 µF ceramic capacitor AGND 3 Analog GND. Connect it to a dedicated ground path TPF 4 T1 oscillator programming pin. Connect a resistor to GND, to achieve a frequency ranging from 100 kHz to 400 kHz T1P1 5 T1P2 6 T3P 7 PGND 8, 9, 10 PWR DS13063 - Rev 2 Description T1 timer programming pin. Connect to VBAT, GND or floating to select T1 prescaler (hard wired). See Figure 5. Timer configuration truth table T3 timer programming pin. Connect to VBAT, GND or floating (hard wired). See Figure 5. Timer configuration truth table Power ground (internal N-channel power MOS source terminal) 11, 12, 13 Input power voltage (internal N-channel power MOS drain terminal) GDRV 14 Gate driver output. Leave floating if it is not used HW_RESET\USB 15 Input hardware reset. Do not leave floating. If it is not used, put to GND PWM 16 Input control signal, 4 Hz to 5 kHz, 30%-100% duty cycle GND EXP Exposed pad, connect to thermal ground plane page 3/22 STEC01 Typical application diagram 3 Typical application diagram Figure 3. Typical application diagram, Iload up to 7 A Main control board ACTUATOR PChannel PWM FET (1) B A T T E R Y DC-DC MCU PWM PWR GDRV T1p1 T1p2 T3p VBAT Protection board 1uF STEC01 Up to 30V Reset\Fault 200kΩ TPF HW_reset RTPF 100kΩ 100nF (1) Suggested for high inductive actuator Figure 4. Typical application diagram, Iload > 7 A, external MOSFET ACTUATOR Main control board PChannel PWM FET (1) B A T T E R Y DC-DC MCU PWM PWR GDRV T1p1 T1p2 T3p VBAT 1uF Protection board STEC01 Up to 30V Reset\Fault 200kΩ TPF RTPF HW_reset 100kΩ 100nF (1) Suggested for high inductive actuator DS13063 - Rev 2 page 4/22 STEC01 Maximum ratings 4 Maximum ratings Table 2. Absolute maximum ratings Symbol Parameter Value Unit VBAT Supply voltage pin to AGND -0.3 to 6 V PWM PWM input signal to AGND -0.3 to 11.5 V T1P1,T1P2 ,T3P Timing setting pins to AGND -0.3 to VBAT+0.3 V TPF T1 oscillator programming pin to AGND -0.3 to 1.8 V HW_RESET Hardware reset pin to AGND -0.3 to 11.5 V RESET/FAULT Open drain pin to PGND -0.3 to 6 V GDRV Gate driver pin to PGND -0.3 to VBAT+0.3 V PWR Input power voltage pin to PGND -0.3 to 11.5 V IPWR DC N-channel power MOSFET current 7 A TJ-MAX Maximum junction temperature 150 °C TSTG Storage temperature -55 to 150 °C Table 3. Thermal data Note: DS13063 - Rev 2 Symbol Parameter Value Unit Rthja Thermal resistance, junction-to-ambient 42 °C/W Rthjc Thermal resistance, junction-to-case 5 °C/W thermal test board JESD51-7, 4-layer PCB (2s2p) page 5/22 STEC01 Electrical characteristics 5 Electrical characteristics TA = 25 °C, VBAT = 3.7 V, CBAT = 1 μF, T1P1=T1P2=GND, RTPF = 100 kΩ, T3P = GND, unless otherwise specified. Table 4. Electrical characteristics Symbol Parameter VBAT Supply voltage range VUVLO Undervoltage lockout VHyst UVLO hysteresis VBAT falling 0.05 tBATT_PWM VBAT valid to PWM time VBAT rising above UVLO then PWM rising 1 VPWM PWM input voltage range TA from -40 to 85 °C PWM threshold TA from -40 to 85 °C VIL_MAX VIH_MIN PWM_HysT PWM hysteresis FPWM PWM operating frequency tPWM_HI PWM minimum high time RDS(on) Internal power MOSFET onresistance Test conditions Min. Typ. 2.2 Turn-on, voltage rising, TA from -40 to 85 °C 1.7 1.9 1 4 V V 3.5 ms 10 V 0.05 5000 40 VBAT = 2.5 V, IPWR=1 A 12 VBAT = 3 V, IPWR=1 A 11.3 mΩ TA from -40 to 85 °C, VBAT=>2.5 V IPWR=1 A 20 1.5 PWR=10 V, fault condition IBATT Battery supply current VBAT from 2.2 to 5 V, active mode 30 IC in idle-mode 2 IC in idle-mode, Gate drive high resistance RGDRV_L Gate drive low resistance VHW_RESET Hardware reset threshold TA from -40 to 85 °C IHW_RESET Hardware reset leakage TA from -40 to 85 °C, VHW_RESET=10 V tHW_RESET_dl Hardware reset deglitch time VRESET/FAULT VOL_MAX IRESET/FAULT Reset leakage current tPW_RESET Reset pulse width VPT Programming threshold pins VIL, input logic low 4 µA 30 T1 and T2 not expired Ω IGDRV=-5 mA, 8 IC idle or in fault mode 0.3 0.9 V 1 µA 10 IRESET=2 mA, fault condition, TA from -40 to 85 °C VRESET/FAULT=5 V, TA from -40 to 85 °C 50 Applies to T1P1, T1P2, T3P µA µA 10 IGDRV=5 mA, PWM=high, RGDRV_H Hz µs TA from -40 to 85 °C DS13063 - Rev 2 2.2 V NFET leakage current Idle battery current V 0.9 IL_PWR IBATT_IDLE 5 0.3 0.006 (1) Max. Unit 57 ms 0.2 V 1 µA 66 ms 0.2 V page 6/22 STEC01 Electrical characteristics Symbol Parameter Test conditions Min. VPT Programming threshold pins VIH, input logic high Applies to T1P1, T1P2, T3P 1.9 IPT Programming input pins leakage current Applies to T1P1, T1P2, T3P. VPT=5 V T1P1,T1P2=GND, RTPF =91 kΩ T1 T2 Timer accuracy Typ. Max. Unit V 1 4 5 µA 6 0.250 0.285 0.330 T3 T3P=GND 60 69 OTP Overtemperature protection PWR OFF 160 OTP_HYST OTP hysteresis PWR ON 20 s 80 °C 1. Guaranteed by design. Figure 5. Timer configuration truth table T1p1 0 Floating 1 0 Floating 1 0 Floating 1 T1P2 0 0 0 1 1 1 Floating Floating Floating Prescaler x1 x4 x16 x64 x256 x1024 T1 [s] 5 - 20 20 - 80 80 - 320 320 - 1280 1280 - 5120 5120 - 20480 T2 [ms] 250 T3p 0 Floating 1 T3[s] 60 345 1380 Do not use Connect 100 kΩ 1% tolerance between RTPF and GND to obtain minimum values Connect 400 kΩ 1% tolerance between RTPF and GND to obtain maximum values Note: DS13063 - Rev 2 See Section 6.1 T1 timer settings for more details. page 7/22 STEC01 General description 6 General description The STEC01 is an integrated low-side 12 mΩ N-channel power MOSFET used to protect applications where a big amount of current flows from the battery to an actuator such as the heater inside an e-cigarette. The maximum on-time can be configured for the actuator with a range from 5 s to 20480 s. Once the set time expires, the actuator is disconnected from the GND path. The device monitors the PWM activity and as soon as a rising edge is detected it exits the idle mode, turns the Nchannel power MOSFET on to connect the actuator to the GND path and starts the setting on-time timer (T1). As soon as a falling edge on PWM is detected, a 285 ms timer (T2) is started and, if within such time no further PWM activity is recognized, the N-channel MOSFET is turned off and the device enters idle mode till a new PWM signal is detected (Figure 6. T1 vs RTPF- prescaler x1). Depending on the user's application, the device works with a continuous or pulsed PWM signal. If, for any reason, the PWM duration is longer than the value set for timer T1, a fault event is detected, the Nchannel MOSFET is turned off and a fault signal is generated. In order to exit fault mode, a stable low voltage level on the PWM pin is required. Once the PWM goes low, T2 starts counting about 250 ms to make sure the fault has been removed and as soon as it expires, the T3 timer is started. Timer T3 sets the cooling window during which any new activity on the PWM pin is ignored and the internal N-channel power MOSFET is kept OFF (T3 can be programmed to 69 s, 345 s or 1380 s). Once T3 expires, a new power cycle can be started by a valid PWM signal. The STEC01 is able to manage a continuous current up to 7 A through the internal power MOSFET. A higher current can be supported by using an external N-channel power MOSFET driven through GDRV pin. A rising edge on the HW_RESET input pin generates a 57 ms pulse on the RESET_FAULT pin that can be detected by a dedicated MCU GPIO. This function can be used to notify the connection of an external power source (e.g. USB). 6.1 T1 timer settings Figure 6. T1 vs RTPF- prescaler x1 reports the typical T1 curve vs setting resistor RTPF when the prescaler x1 is selected. It allows the user to set T1 from 5 s to 20 s as reported in Figure 5. Timer configuration truth table. Figure 6. T1 vs RTPF- prescaler x1 25 20 T1 [s] 15 10 5 0 50 100 150 200 250 300 350 400 450 RTPF [kΩ] For a longer setting time, please refer to the example below: DS13063 - Rev 2 page 8/22 STEC01 Timer expiration: normal mode The typical example of RTPF calculation to obtain T1=6 minutes (3600 s): select the x256 pre-scaler (according to the ranges reported in Figure 5. Timer configuration truth table, by keeping T1P1 floating and T1P2=1. Divide 3600 s by selected pre-scaler value (256) and obtain 14.06 s that in the graph above corresponds to RTPF = 280 kΩ. 6.2 Timer expiration: normal mode Figure 7. Normal power cycle shows a typical power cycle not triggering a fault condition. In this example a PWM signal with duty cycle lower than 100% is applied to also show T2 timer functionality but a 100% duty cycle can be used as well. When a rising edge on the PWM input pin is detected (a), T1 is started, the internal power MOSFET is turned on and the external gate drive pin is activated. As soon as a falling edge of the PWM signal is detected, T2 is started. The purpose of T2 is to detect the end of the power cycle. After the power cycle starts, every high level of the PWM signal resets T2. If the PWM signal is in line with requirements (4 Hz < fPWM 30%), its low time is always lower than 285 ms (typ., T2 fixed value) and T2 never expires till the end of the power cycle (b). T2 is started and reset at each PWM period. After the power cycles ends, the voltage at PWM input remains low for more than 285 ms causing the expiration of T2 (c). When T2 expires, the internal N-channel power MOSFET is turned off, the GDRV output is deactivated and the device enters idle mode (low power consumption mode) during which it keeps monitoring the PWM line waiting for a new cycle to start. In this example the time duration of the full power cycle (a to c) is lower than the maximum on-time programmed for T1. Figure 7. Normal power cycle (a) (b) (c) SF ON SF OFF GDRV Status T3 T2 0.285s T1 IC STAND BY PWM T1 & T2 Reset a) Start on first PWM rising edge. Global reset b) 8 s elapsed, PWM stops toggling c) T2 expires, T1/T2 are reset, IC goes to idle mode, ready for next PWM cycle DS13063 - Rev 2 page 9/22 STEC01 T1 timer expiration: fault mode 6.3 T1 timer expiration: fault mode Figure 8. T1 expiration, fault mode shows an example of platform failure triggering the protection function of the IC. In this case, the power control unit keeps generating the power PWM signal for a time longer than expected. As per previous case, the device exits idle mode, starts T1, turns on the internal N-channel power MOSFET and activates the GDRV output as soon as a rising edge on PWM is detected (a). The PWM signal keeps commutating for more than the maximum programmed on-time causing T1 to expire and making the device enter fault mode (b). In fault mode, the internal power MOSFET is turned off, the GDRV output is deactivated, a reset pulse on the RESET/FAULT pin is generated and the device starts waiting for the fault condition to be removed. The condition to exit fault mode is a low voltage level at the PWM pin for more than T2 ((d) to (e), 285 ms typ.). When the fault removal is detected (e), T3 timer is started. During T3 (cooling window), any activity on the PWM line is ignored and the power MOSFETs (both internal or external if used) are kept off to let the application cool down. After T3 expires, the device enters again idle mode and is ready for a new cycle. Figure 8. T1 expiration, fault mode (a) (b) (c) (d) (e) (f) SF ON SF OFF GDRV Status IC IDLE MODE T3 285ms T2 T1 Reset 57ms PWM: 30%up to 100% duty cycle SW FAULT EXAMPLE a) Global reset on first PWM rising edge, T1 starts, SF ON b) T1 expires, SF is turned OFF and 57 ms reset pulse is generated c) 57 ms reset pulse ends d) PWM stops toggling (or goes stable low) and T2 starts 285 ms timer e) T2 expires and T3 starts f) T3 expires, the device goes to idle mode and SF can be turned ON again if needed (by PWM rising edge) DS13063 - Rev 2 page 10/22 STEC01 HW_RESET functionality 6.4 HW_RESET functionality The HW_RESET input can be used to monitor an input power line (e.g. USB) to notify the connection to the platform control unit. When the signal on the HW_REST pin is more than VHW_RESET threshold, after a deglitch time of the 10 ms (typ.), a 57 ms (typ.) pulse is generated on the RESET/FAULT output pin. If several pulses longer than the deglitch time are detected, during the RESET/FAULT low time, the pulse duration is extended (see events (a) and (b) in the example below). Figure 9. HW_RESET input functionality (a) (b) (c) HW_RESET RESET/FAULT 57ms 57ms a) HW_RESET is higher than VHW_RESET threshold for more than the deglitch time of 10 ms (typ.), a 57 ms reset fault pulse is generated b) HW_RESET goes down and rises again above the VHW_RESET threshold for more than the deglitch time, a new 50 ms reset fault signal is generated overlapping the previous one c) HW_RESET is higher than VHW_RESET threshold for more than deglitch time on rising edge and remains high Note: DS13063 - Rev 2 A Schmitt trigger is used in the input stage of HW_RESET. If the HW_RESET is used for USB VBus line monitoring, during USB disconnection, in case of voltage bouncing, a reset might be generated. page 11/22 STEC01 Typical performance characteristics 7 Typical performance characteristics Figure 11. RDS(on) vs VBAT@-40 °C Figure 10. RDS(on) vs VBAT, room temperature 12 14.5 11.5 11 13.5 RDS ON [mΩ] RDS ON [m Ω] 14 13 12.5 12 10.5 10 9.5 9 8.5 8 11.5 7.5 11 2 2.5 3 3.5 4 4.5 5 7 5.5 2 2.5 3 VBAT [V] RDS ON@1A 3.5 4 4.5 5 5.5 VBAT [V] RDS ON@2A RDS ON@5A RDS ON@1A RDS ON@2A RDS ON@5A Figure 13. Reset pulse width: VBAT=3.7 V T1P1=T1P2=T3P=GND, ROSC=100 kΩ Figure 12. RDS(on) vs VBAT@-85 °C 17.5 17 RDS ON [m Ω] 16.5 16 15.5 15 14.5 14 13.5 2 2.5 3 3.5 4 4.5 5 5.5 VBAT [V] RDS ON@1A RDS ON@2A RDS ON@5A Figure 15. PWM VIL_MAX: VBAT=3.7 V 1.05 1.05 0.95 0.95 0.85 0.85 VIL_MAX [V] VIH_MIN [V] Figure 14. PWM VIH_MIN: VBAT=3.7 V 0.75 0.75 0.65 0.65 0.55 0.55 0.45 -45 -25 -5 15 35 Temp [°C] DS13063 - Rev 2 55 75 95 0.45 -45 -25 -5 15 35 Temp [°C] 55 75 95 page 12/22 STEC01 Typical performance characteristics Figure 16. HW_RESET VIH_MIN: VBAT=3.7 V Figure 17. HW_RESET VIL_MAX: VBAT=3.7 V 1.05 0.95 0.95 0.85 0.85 VIL_MAX [V] VIH_MIN [V] 1.05 0.75 0.75 0.65 0.65 0.55 0.55 0.45 -45 -25 -5 15 35 Temp [°C] 55 75 0.45 95 -45 -25 -5 15 35 55 75 95 Temp [°C] Figure 18. IBATT_ACTIVE: VBAT=3.7 V Figure 19. IBATT_IDLE: VBAT=3.7V 6.00 55.00 5.00 IBATT_IDLE [uA] IBATT_ACTIVE [uA] 45.00 35.00 25.00 4.00 3.00 2.00 15.00 1.00 0.00 5.00 -45 -25 -5 15 35 55 75 -45 95 -25 -5 Figure 20. Leakage TxPy pin: VTxPY@5 V 35 55 75 95 Figure 21. Leakage PWR: VPWR@10 V 9 2500 8 2000 7 1500 nA LEAKAGE TxPy pin [nA] 15 Temp [°C] Temp [°C] 6 1000 5 500 4 0 3 -45 -25 -5 15 35 Temp [°C] DS13063 - Rev 2 55 75 95 -45 -25 -5 15 35 Temp [°C] 55 75 95 page 13/22 STEC01 Package information 8 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. DS13063 - Rev 2 page 14/22 STEC01 VFQFPN 3x3x0.9 16L package information 8.1 VFQFPN 3x3x0.9 16L package information Figure 22. VFQFPN 3x3x0.9 package outline DS13063 - Rev 2 page 15/22 STEC01 VFQFPN 3x3x0.9 16L package information Table 5. VFQFPN 3x3x0.9 mechanical data Symbol Milimeters Min Typ Max A 0.80 0.90 1.00 A1 0 0.02 0.05 A3 b 0.20 0.18 D D2 1.55 DS13063 - Rev 2 1.70 1.80 3.00 1.55 e Note: 0.30 3.00 E E2 0.25 1.70 1.80 0.50 L 0.20 K 0.20 0.30 aaa 0.05 bbb 0.10 ccc 0.10 ddd 0.05 eee 0.08 0.40 VFQFPN - standard for thermally enhanced very thin fine pitch quad flat package no leads. The leads size is comprehensive of the thickness of the leads finishing material. Dimensions do not include mold protrusion, not to exceed 0,15 mm. Package outline exclusive of metal burr dimensions. page 16/22 STEC01 VFQFPN 3x3x0.9 16L package information Figure 23. VFQFPN 3x3x0.9 recommended footprint DS13063 - Rev 2 page 17/22 STEC01 Revision history Table 6. Document revision history DS13063 - Rev 2 Date Version Changes 14-Jan-2020 1 Initial release. 20-Oct-2020 2 Updated Section 3 Typical application diagram and Table 2. Absolute maximum ratings. page 18/22 STEC01 Contents Contents 1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 2 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 3 Typical application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 4 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 5 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 6 General description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 6.1 T1 timer settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 6.2 Timer expiration: normal mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 6.3 T1 timer expiration: fault mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 6.4 HW_RESET functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 7 Typical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 8 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 8.1 VFQFPN 3x3x0.9 16L package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18 DS13063 - Rev 2 page 19/22 STEC01 List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Pin configuration . . . . . . . . . . . . . Absolute maximum ratings . . . . . . Thermal data. . . . . . . . . . . . . . . . Electrical characteristics . . . . . . . . VFQFPN 3x3x0.9 mechanical data. Document revision history . . . . . . . DS13063 - Rev 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 . 5 . 5 . 6 16 18 page 20/22 STEC01 List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. DS13063 - Rev 2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Typical application diagram, Iload up to 7 A . . . . . . . . . . . . . . . . . . . . . . Typical application diagram, Iload > 7 A, external MOSFET . . . . . . . . . . . Timer configuration truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T1 vs RTPF- prescaler x1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Normal power cycle. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T1 expiration, fault mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . HW_RESET input functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RDS(on) vs VBAT, room temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . RDS(on) vs VBAT@-40 °C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RDS(on) vs VBAT@-85 °C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Reset pulse width: VBAT=3.7 V T1P1=T1P2=T3P=GND, ROSC=100 kΩ . PWM VIH_MIN: VBAT=3.7 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PWM VIL_MAX: VBAT=3.7 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . HW_RESET VIH_MIN: VBAT=3.7 V . . . . . . . . . . . . . . . . . . . . . . . . . . . HW_RESET VIL_MAX: VBAT=3.7 V . . . . . . . . . . . . . . . . . . . . . . . . . . . IBATT_ACTIVE: VBAT=3.7 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IBATT_IDLE: VBAT=3.7V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Leakage TxPy pin: VTxPY@5 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Leakage PWR: VPWR@10 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VFQFPN 3x3x0.9 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . VFQFPN 3x3x0.9 recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 . 3 . 4 . 4 . 7 . 8 . 9 10 11 12 12 12 12 12 12 13 13 13 13 13 13 15 17 page 21/22 STEC01 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. 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Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2020 STMicroelectronics – All rights reserved DS13063 - Rev 2 page 22/22