STEVAL-CCA013V1
Mono Class-D audio amplifier with power analog switch
demonstration board based on the TS4961T
Data brief
Features
■
Power supply range: 2.4 V to 4.3 V
■
Audio amplifier standby mode active low
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Ultra high-off-isolation on analog switch: -80 dB
typical
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Output power: 1.6 W at 4.2 V into 4 W with 1%
THD+N maximum
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Adjustable gain via external resistors
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Low current consumption 2 mA at 3 V
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Efficiency: 88% typical
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Signal-to-noise ratio: 85 dB typical
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PSRR: 63 dB typical at 217 Hz with 6 dB gain
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Thermal shutdown protection
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Break before make delay switching time
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QFN16 package 3mm x 3mm, 450 µm pitch
Description
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STEVAL-CCA013V1
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This demonstration board is designed to evaluate
the TS4961T1, a mono Class-D speaker driver
with power audio switch, dedicated to high audio
performances and space-constrained
applications.
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The chip has two functions: the first is an audio
Class-D amplifier, and the second is a dual-power
analog switch.
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Both functions can be used separately (for two
different audio channels) or together (to connect
two audio sources to one speaker).
Thanks to the output configuration possibilities,
the power supply pins, the I/O pins and the
standby pins are separated.
It is also possible to control both switches
separately.
The TS4961T device is soldered on the two-layer
PCB. Both functions previously mentioned can be
evaluated separately or together through
connectors on the demonstration board.
June 2009
Doc ID 15790 Rev 1
For further information contact your local STMicroelectronics sales office.
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Circuit schematics and BOM list
STEVAL-CCA013V1
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Circuit schematics and BOM list
Figure 1.
Schematic diagram
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Component list for the demonstration board
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C1, C2
C3, C4
R1, R2
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Quantity
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Pr
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Description
100 nF/50 V X7R, +/-10 %, SMD ceramic capacitors, 0603
1 µF/10 V X5R, +/-10 %, SMD ceramic capacitors 0603
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150 K/1 %, 0.063 W, SMD resistors, 0603
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2-pin header 2.54 mm pitch
J1, J2, JP1, JP2, JP3
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3-pin header 2.54 mm pitch
IC1
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TS4961TIQT
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J3, J4, J5, J6
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Table 1.
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STEVAL-CCA013V1
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Demonstration board layout
Demonstration board layout
The following figures show the layers and the top view of the evaluation board.
Figure 2.
PCB top overlay
Figure 3.
PCB top layer
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Figure 4.
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PCB bottom overlay
Figure 5.
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PCB bottom layer
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Doc ID 15790 Rev 1
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Revision history
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STEVAL-CCA013V1
Revision history
Table 2.
Document revision history
Date
Revision
04-Jun-2009
1
Changes
Initial release.
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Doc ID 15790 Rev 1
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