STCN75
Digital temperature sensor and thermal watchdog
Datasheet − production data
Features
■
Measures temperatures from –55 °C to
+125 °C (–67 °F to +257 °F)
– ±0.5 °C (typ) accuracy
– ±2 °C (max) accuracy from –25 °C to
+100 °C
■
Low operating current:125 µA (typ)
■
No external components required
■
2-wire I2C/SMBus-compatible serial interface
– Selectable bus address allows connection
of up to eight devices on the bus
■
Wide power supply range - operating voltage
range: 2.7 V to 5.5 V
■
Conversion time is 45 ms (typ)
■
Programmable temperature threshold and
hysteresis set points
■
Pin- and software-compatible with TCN75
(drop-in replacement)
■
Power-up defaults permit standalone operation
as a thermostat
■
Shutdown mode to minimize power
consumption
■
Output pin (open drain) can be configured for
interrupt or comparator/thermostat mode (dual
purpose event pin)
■
MSOP8 (TSSOP8) package
March 2012
This is information on a product in full production.
MSOP8
(TSSOP8)
Doc ID 13307 Rev 9
1/36
www.st.com
1
Contents
STCN75
Contents
1
2
3
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.1
Serial communications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.2
Temperature sensor output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1.3
Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
SDA (open drain) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
1.3.2
SCL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
1.3.3
OS/INT (open drain) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
1.3.4
GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
1.3.5
A2, A1, A0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
1.3.6
VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.1
Applications information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.2
Thermal alarm function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.3
Comparator mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.4
Interrupt mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.5
Fault tolerance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.6
Shutdown mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.7
Temperature data format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.1
2/36
1.3.1
Registers and register set formats . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.1.1
Command/pointer register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.1.2
Configuration register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.1.3
Temperature register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.1.4
Overlimit temperature register (TOS) . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.1.5
Hysteresis temperature register (THYS) . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.2
Power-up default conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.3
Serial interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.4
2-wire bus characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.4.1
Bus not busy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.4.2
Start data transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.4.3
Stop data transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Doc ID 13307 Rev 9
STCN75
Contents
3.4.4
Data valid . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.4.5
Acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.5
READ mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.6
WRITE mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
4
Typical operating characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
5
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
6
DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
7
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
8
Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
9
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Doc ID 13307 Rev 9
3/36
List of tables
STCN75
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Table 17.
Table 18.
4/36
Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Fault tolerance setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Relationship between temperature and digital output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Command/pointer register format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Register pointers selection summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Configuration register format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Temperature register format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
TOS and THYS register format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
STCN75 serial bus slave addresses. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Operating and AC measurement conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
DC and AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
MSOP8 (TSSOP8) – 8-lead, thin shrink small outline (3 mm x 3 mm) package
mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Carrier tape dimensions for MSOP8 (TSSOP8) package. . . . . . . . . . . . . . . . . . . . . . . . . . 32
Reel dimensions for 12 mm carrier tape - MSOP8 (TSSOP8) package . . . . . . . . . . . . . . . 33
Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Doc ID 13307 Rev 9
STCN75
List of figures
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Functional block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Typical 2-wire interface connections diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Serial bus data transfer sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Acknowledgement sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Slave address location . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Typical 2-byte READ from preset pointer location (e.g. temp - TOS, THYS) . . . . . . . . . . . . 22
Typical pointer set followed by an immediate READ for 2-byte register (e.g. temp). . . . . . 22
Typical 1-byte READ from the cofiguration register with preset pointer . . . . . . . . . . . . . . . 22
Typical pointer set followed by an immediate READ from the configuration register . . . . . 23
Configuration register WRITE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
TOS and THYS WRITE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Temperature variation vs. voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Bus timing requirements sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
MSOP8 (TSSOP8) – 8-lead, thin shrink small outline (3 mm x 3 mm) package
mechanical drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Carrier tape for MSOP8 (TSSOP8) package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Reel schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Doc ID 13307 Rev 9
5/36
Description
1
STCN75
Description
The STCN75 is a high-precision digital CMOS temperature sensor IC with a sigma-delta
temperature-to-digital converter and an I2C-compatible serial digital interface. It is targeted
for general applications such as personal computers, system thermal management,
electronics equipment, and industrial controllers, and is packaged in the industry-standard
8-lead TSSOP package.
The device contains a bandgap temperature sensor and 9-bit ADC which monitor and
digitize the temperature to a resolution up to 0.5 °C. The STCN75 is typically accurate to
(±3 °C - max) over the full temperature measurement range of –55 °C to 125 °C with ±2 °C
accuracy in the –25 °C to +100 °C range. The STCN75 is pin-for-pin and software
compatible with the TCN75.
The STCN75 is specified for operating at supply voltages from 2.7 V to 5.5 V. Operating at
3.3 V, the supply current is typically (125 µA).
The onboard sigma-delta analog-to-digital converter (ADC) converts the measured
temperature to a digital value that is calibrated in degrees centigrade; for Fahrenheit
applications a lookup table or conversion routine is required.
The STCN75 is factory-calibrated and requires no external components to measure
temperature.
1.1
Serial communications
The STCN75 has a simple 2-wire I2C-compatible digital serial interface which allows the
user to access the data in the temperature register at any time. It communicates via the
serial interface with a master controller which operates at speeds up to 400 kHz. Three pins
(A0, A1, and A2) are available for address selection, and enable the user to connect up to 8
devices on the same bus without address conflict.
In addition, the serial interface gives the user easy access to all STCN75 registers to
customize operation of the device.
6/36
Doc ID 13307 Rev 9
STCN75
1.2
Description
Temperature sensor output
The STCN75 Temperature Sensor has a dedicated open drain overlimit signal/interrupt
(OS/INT) output which features a thermal alarm function. This function provides a userprogrammable trip and turn-off temperature. It can operate in either of two selectable
modes:
●
Section 2.3: Comparator mode
●
Section 2.4: Interrupt mode.
At power-up the STCN75 immediately begins measuring the temperature and converting
the temperature to a digital value.
The measured temperature value is compared with a temperature limit (which is stored in
the 16-bit (TOS) READ/WRITE register), and the hysteresis temperature (which is stored in
the 16-bit (THYS) READ/WRITE register). If the measured value exceeds these limits, the
OS/INT pin is activated (see Figure 3 on page 8).
Note:
See Pin descriptions on page 8 for details.
Figure 1.
Logic diagram
VDD
OS/INT(1)
SDA(1)
SCL
A0
STCN75
A1
A2
GND
AI11899
1. SDA and OS/INT are open drain.
Table 1.
Signal names
Pin
Sym
Type/direction
1
SDA(1)
Input/output
2
SCL
Input
(1)
Output
Description
Serial data input/output
Serial clock input
3
OS/INT
Overlimit signal/interrupt alert output
4
GND
Supply ground
5
A2
Input
Address2 input
6
A1
Input
Address1 input
7
A0
Input
Address0 input
8
VDD
Supply power
Ground
Supply voltage (2.7 V to 5.5 V)
1. SDA and OS/INT are open drain.
Doc ID 13307 Rev 9
7/36
Description
STCN75
Figure 2.
Connections
SDA(1)
SCL
OS/INT(1)
GND
1
2
3
4
8
7
6
5
VDD
A0
A1
A2
AI11841
1. SDA and OS/INT are open drain.
Figure 3.
Functional block diagram
Temperature
Sensor and
Analog-to-Digital
Converter (ADC)
S-D
Pointer Register
Configuration Register
Temperature Register
THYS Set Point Register
VDD
Control and Logic
Comparator
TOS Set Point Register
SDA
A0
A1
2-wire I2C Interface
A2
SCL
GND
1.3
OS/INT
AI11833a
Pin descriptions
See Figure 1 on page 7 and Table 1 on page 7 for a brief overview of the signals
connected to this device.
1.3.1
SDA (open drain)
This is the serial data input/output pin for the 2-wire serial communication port.
1.3.2
SCL
This is the serial clock input pin for the 2-wire serial communication port.
1.3.3
OS/INT (open drain)
This is the overlimit signal/interrupt alert output pin. It is open drain, so it needs a pull-up
resistor. In Interrupt mode, it outputs a pulse whenever the measured temperature exceeds
the programmed threshold (TOS). It behaves as a thermostat, toggling to indicate whether
the measured temperature is above or below the threshold and hysteresis (THYS).
8/36
Doc ID 13307 Rev 9
STCN75
1.3.4
Description
GND
Ground; it is the reference for the power supply. It must be connected to system ground.
1.3.5
A2, A1, A0
A2, A1, and A0 are selectable address pins for the 3 LSBs of the I2C interface address.
They can be set to VDD or GND to provide 8 unique address selections.
1.3.6
VDD
This is the supply voltage pin, and ranges from +2.7 V to +5.5 V.
Doc ID 13307 Rev 9
9/36
Operation
2
STCN75
Operation
After each temperature measurement and analog-to-digital conversion, the STCN75 stores
the temperature as a 16-bit two’s complement number (see Table 5: Register pointers
selection summary on page 16) in the 2-byte temperature register (see Table 7 on page 17).
The most significant bit (S) indicates if the temperature is positive or negative:
●
for positive numbers S = 0, and
●
for negative numbers S = 1.
The most recently converted digital measurement can be read from the temperature register
at any time. Since temperature conversions are performed in the background, reading the
temperature register does not affect the operation in progress.
The temperature data is provided by the 9 MSBs (bits 15 through 7). Bits 6 through 0 are
unused. Table 3 on page 14 gives examples of the digital output data and corresponding
temperatures. The data is compared to the values in the TOS and THYS registers, and then
the OS/INT is updated based on the result of the comparison and the operating mode.
The alarm fault tolerance is controlled by the FT1 and FT0 bits in the configuration register.
They are used to set up a fault queue. This prevents false tripping of the OS/INT pin when
the STCN75 is used in a noisy environment (see Table 2 on page 13).
The active state of the OS/INT output can be changed via the polarity bit (POL) in the
configuration register. The power-up default is active-low.
If the user does not wish to use the thermostat capabilities of the STCN75, the
OS/INToutput should be left floating.
Note:
10/36
If the thermostat is not used, the TOS and THYS registers can be used for general storage of
system data.
Doc ID 13307 Rev 9
STCN75
2.1
Operation
Applications information
STCN75 digital temperature sensors are optimal for thermal management and thermal
protection applications. They require no external components for operations except for pullup resistors on SCL, SDA, and OS/INT outputs. A 0.1 µF bypass capacitor on VDD is
recommended. The sensing device of STCN75 is the chip itself. The typical interface
connection for this type of digital sensor is shown in Figure 4 on page 11.
Intended applications include:
●
System thermal management
●
Computers/disk drivers
●
Electronics/test equipment
●
Power supply modules
●
Consumer products
●
Battery management
●
Fax/printers management
●
Automotive
Figure 4.
Typical 2-wire interface connections diagram
Pull-up
VDD
Pull-up
VDD
VDD
VDD
10kΩ
STCN75
10kΩ
0.1µF
O.S./INT(1) SCL
A0
Master
Device
SDA(1)
I2C Address = 1001000 (1001A2A1A0)
A1
A2
10kΩ
GND
AI12200
1. SDA and OS/INT are open drain.
2.2
Thermal alarm function
The STCN75 thermal alarm function provides user-programmable thermostat capability and
allows the STCN75 to function as a standalone thermostat without using the serial interface.
The OS/INT output is the alarm output. This signal is an open drain output, and at power-up,
this pin is configured with active-low polarity by default.
Doc ID 13307 Rev 9
11/36
Operation
2.3
STCN75
Comparator mode
In comparator mode, each time a temperature-to-digital (T-to-D) conversion occurs, the new
digital temperature is compared to the value stored in the TOS and THYS registers. If a fault
tolerance number of consecutive temperature measurements are greater than the value
stored in the TOS register, the OS/INT output will be asserted.
For example, if the FT1 and FT0 bits are equal to “10” (fault tolerance = 4), four consecutive
temperature measurements must exceed TOS to activate the OS/INT output. Once the
OS/INT output is active, it will remain active until the first time the measured temperature
drops below the temperature stored in the THYS register, whereupon it will reset to its
inactive state.
Putting the device into shutdown mode does not clear OS/INT in comparator mode.
2.4
Interrupt mode
In interrupt mode, the OS/INT output becomes active when the measured temperature
exceeds the TOS value a consecutive number of times as determined by the fault tolerance
bits (FT1, FT0) value in the configuration register. Once activated, the OS/INT can only be
cleared by reading from any register (temperature, configuration, TOS, or THYS) on the
device. Once the OS/INT has been deactivated, it will only be reactivated when the
measured temperature falls below the THYS value a consecutive number of times equal to
the FT value. This mode is better suited for interrupt driven microprocessor based systems.
12/36
Doc ID 13307 Rev 9
STCN75
2.5
Operation
Fault tolerance
For both comparator and interrupt modes, the alarm “fault tolerance” setting plays a role in
determining when the OS/INT output will be activated. Fault tolerance refers to the number
of consecutive times an error condition must be detected before the user is notified. Higher
fault tolerance settings can help eliminate false alarms caused by noise in the system. The
alarm fault tolerance is controlled by the bits (4 and 3) in the configuration register. These
bits can be used to set the fault tolerance to 1, 2, 4, or 6 as shown in Table 2. At power-up,
these bits both default to logic '0'.
Table 2.
Fault tolerance setting
FT1
FT0
STCN75 (consecutive faults)
0
0
1
0
1
2
1
0
4
1
1
6
Comments
Power-up default
Note:
OS output will be asserted one tCONV after fault tolerance is met, provided that the error
condition remains.
2.6
Shutdown mode
For power-sensitive applications, the STCN75 offers a low-power shutdown mode. The SD
bit in the configuration register controls shutdown mode. When SD is changed to logic '1,'
the conversion in progress will be completed and the result stored in the temperature
register, after which the STCN75 will go into a low-power standby state. The OS/INT output
will be cleared if the thermostat is operating in Interrupt mode and the OS/INT will remain
unchanged in comparator mode. The 2-wire interface remains operational in shutdown
mode, and writing a '0' to the SD bit returns the STCN75 to normal operation.
Doc ID 13307 Rev 9
13/36
Operation
2.7
STCN75
Temperature data format
Table 3 shows the relationship between the output digital data and the external temperature.
Temperature data for the temperature, TOS, and THYS registers is represented as a 9-bit,
two’s complement word.
The left-most bit in the output data stream contains temperature polarity information for
each conversion. If the sign bit is '0', the temperature is positive and if the sign bit is '1,' the
temperature is negative.
Table 3.
Relationship between temperature and digital output
Digital output
Temperature
14/36
Binary
HEX
+125 °C
0 1111 1010
0FAh
+25 °C
0 0011 0010
032h
+0.5 °C
0 0000 0001
001h
0 °C
0 0000 0000
000h
–0.5 °C
1 1111 1111
1FFh
–25 °C
1 1100 1110
1CEh
–40 °C
1 1011 0000
1B0h
–55 °C
1 1001 0010
192h
Doc ID 13307 Rev 9
STCN75
3
Functional description
Functional description
The STCN75 registers have unique pointer designations which are defined in Table 5 on
page 16. Whenever any READ/WRITE operation to the STCN75 register is desired, the
user must “point” to the device register to be accessed.
All of these user-accessible registers can be accessed via the digital serial interface at
anytime (see Section 3.3: Serial interface on page 19), and they include:
●
Command register/address pointer register
●
Configuration register
●
Temperature register
●
Overlimit signal temperature register (TOS)
●
Hysteresis temperature register (THYS)
3.1
Registers and register set formats
3.1.1
Command/pointer register
The most significant bits (MSBs) of the command register must always be zero. Writing a '1'
into any of these bits will cause the current operation to be terminated (bit 2 through bit 7
must be kept '0', see Table 4).
Table 4.
Command/pointer register format
MSB
LSB
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
0
0
0
0
0
0
P1
P0
These bits must be ‘O’
Pointer/register
select bits
The command register retains pointer information between operations (see Table 5).
Therefore, this register only needs to be updated once for consecutive READ operations
from the same register. All bits in the command register default to '0' at power-up.
Doc ID 13307 Rev 9
15/36
Functional description
Table 5.
STCN75
Register pointers selection summary
Pointer
P1 P0
value (H)
Name
Width
(bits)
Description
Type Power-on
(R/W)
default
Comments
00
0
0
TEMP
Temperature
register
16
Readonly
N/A
01
0
1
CONF
Configuration
register
8
R/W
00
02
1
0
THYS
Hysteresis register
16
R/W
4B00
Default = 75 °C
03
1
1
TOS
Overtemperature
shutdown
16
R/W
5000
Set point for overtemperature
shutdown (TOS) limit default = 80
°C
3.1.2
To store measured temperature
data
Configuration register
The configuration register is used to store the device settings such as device operation
mode, OS/INT operation mode, OS/INT polarity, and OS/INT fault queue.
The configuration register allows the user to program various options such as thermostat
fault tolerance, thermostat polarity, thermostat operating mode, and shutdown mode. The
user has READ/WRITE access to all of the bits in the configuration register except the MSB
(Bit7), which is reserved as a “Read only” bit (see Table 6). The entire register is volatile and
thus powers-up in its default state only.
Table 6.
Configuration register format
MSB
LSB
Byte
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
STCN75
0
0
0
FT1
FT0
POL
M
SD
Default
0
0
0
0
0
0
0
0
Keys: SD = shutdown control bit
FT1 = fault tolerance1 bit
M = thermostat mode(1)
Bit 5 = must be set to '0'.
(2)
Bit 6 = must be set to '0'.
POL = output polarity
FT0 = fault tolerance0 bit
Bit 7 = must be set to '0'.
1. Indicates operation mode; 0 = comparator mode, and 1 = interrupt mode (see Section 2.3: Comparator mode and
Section 2.4: Interrupt mode).
2. The OS is active-low ('0').
16/36
Doc ID 13307 Rev 9
STCN75
3.1.3
Functional description
Temperature register
The temperature register is a two-byte (16-bit) “Read only” register (see Table 7). Digital
temperatures from the T-to-D converter are stored in the temperature register in two’s
complement format, and the contents of this register are updated each time the T-to-D
conversion is finished.
The user can read data from the temperature register at any time. When a T-to-D
conversion is completed, the new data is loaded into a comparator buffer to evaluate fault
conditions and will update the temperature register if a read cycle is not ongoing. If a READ
is ongoing, the previous temperature will be read. Accessing the STCN75 continuously
without waiting at least one conversion time between communications will prevent the
device from updating the temperature register with a new temperature conversion result.
Consequently, the STCN75 should not be accessed continuously with a wait time of less
than tCONV (max).
All unused bits following the digital temperature will be zero. The MSB position of the
temperature register always contains the sign bit for the digital temperature, and bit 14
contains the temperature MSB. All bits in the temperature register default to zero at powerup.
Table 7.
Temperature register format(1)
Bytes
HS byte
MSB
LS byte
TMSB
TLSB
LSB
Bits
15
STCN75
TD8
(S)
14
13
12
11
10
9
8
7
TD7
TD TD TD TD TD TD TD0
(TMSB) 6
5
4
3
2
1 (TLSB)
6
5
4
3
2
1
0
x
x
x
x
x
x
x
Keys: S = two’s complement sign bit
TMSB = temperature MSB
TLSB = temperature LSB
TDx = temperature data bits
1. These are comparable formats to the LM75.
3.1.4
Overlimit temperature register (TOS)
TOS register is a two-byte (16-bit) READ/WRITE register that stores the user-programmable
upper trip-point temperature for the thermal alarm in two’s complement format (see Table 8
on page 18). This register defaults to 80 °C at power-up (i.e., 0101 0000 0000 0000).
The format of the TOS register is identical to that of the temperature register. The MSB
position contains the sign bit for the digital temperature and Bit14 contains the temperature
MSB.
For 9-bit conversions, the trip-point temperature is defined by the 9 MSBs of the TOS
register, and all remaining bits are “Don’t cares” (x).
Doc ID 13307 Rev 9
17/36
Functional description
3.1.5
STCN75
Hysteresis temperature register (THYS)
THYS register is a two-byte (16-bit) READ/WRITE register that stores the userprogrammable lower trip-point temperature for the thermal alarm in two’s complement
format (see Table 8). This register defaults to 75 °C at power-up
(i.e., 0100 1011 0000 0000).
The format of this register is the same as that of the temperature register. The MSB position
contains the sign bit for the digital temperature and bit 14 contains the temperature MSB.
Table 8.
TOS and THYS register format(1)
Bytes
HS byte
MSB
LS byte
TMSB
TLSB
LSB
Bits
STCN75
15
14
S
TMSB
13
12
11
10
9
8
TD TD TD TD TD TD
7
6
5
4
3
2
1
0
9-bit
TLSB
0
0
0
0
0
0
0
Keys: S = two’s complement sign bit
TMSB = temperature MSB
TLSB = temperature LSB
TD = temperature Data
1. These are comparable formats to the DS75 and LM75.
3.2
Power-up default conditions
The STCN75 always powers up in the following default states:
●
Thermostat mode = comparator mode
●
Polarity = active-low
●
Fault tolerance = 1 fault (i.e., relevant bits set to '0' in the configuration register)
●
TOS = 80 °C
●
THYS = 75 °C
●
Register pointer = 00 (temperature register)
Note:
After power-up these conditions can be reprogrammed via the serial interface.
18/36
Doc ID 13307 Rev 9
STCN75
3.3
Functional description
Serial interface
Writing to and reading from the STCN75 registers is accomplished via the two-wire serial
interface protocol which requires that one device on the bus initiates and controls all READ
and WRITE operations. This device is called the “master” device. The master device also
generates the SCL signal which provides the clock signal for all other devices on the bus.
These other devices on the bus are called “slave” devices. The STCN75 is a slave device
(see Table 9). Both the master and slave devices can send and receive data on the bus.
During operations, one data bit is transmitted per clock cycle. All operations follow a
repeating, nine-clock-cycle pattern that consists of eight bits (one byte) of transmitted data
followed by an acknowledge (ACK) or not acknowledge (NACK) from the receiving device.
Note:
There are no unused clock cycles during any operation, so there must not be any breaks in
the data stream and ACKs/NACKs during data transfers. Consequently, having too few
clock cycles can lead to incorrect operation if an inadvertent 8-bit READ from a 16-bit
register occurs. So, the entire word must be transferred out regardless of the superflous
trailing zeroes.
Table 9.
STCN75 serial bus slave addresses
MSB
3.4
LSB
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
1
0
0
1
A2
A1
A0
R/W
2-wire bus characteristics
The bus is intended for communication between different ICs. It consists of two lines: a bidirectional data signal (SDA) and a clock signal (SCL). Both the SDA and SCL lines must be
connected to a positive supply voltage via a pull-up resistor.
The following protocol has been defined:
●
Data transfer may be initiated only when the bus is not busy.
●
During data transfer, the data line must remain stable whenever the clock line is high.
●
Changes in the data line, while the clock line is high, will be interpreted as control
signals.
Accordingly, the following bus conditions have been defined (see Figure 5 on page 20):
3.4.1
Bus not busy
Both data and clock lines remain high.
3.4.2
Start data transfer
A change in the state of the data line, from high to low, while the clock is high, defines the
START condition.
3.4.3
Stop data transfer
A change in the state of the data line, from low to high, while the clock is high, defines the
STOP condition.
Doc ID 13307 Rev 9
19/36
Functional description
3.4.4
STCN75
Data valid
The state of the data line represents valid data when after a start condition, the data line is
stable for the duration of the high period of the clock signal. The data on the line may be
changed during the low period of the clock signal. There is one clock pulse per bit of data.
Each data transfer is initiated with a start condition and terminated with a stop condition.
The number of data bytes transferred between the start and stop conditions is not limited.
The information is transmitted byte-wide and each receiver acknowledges with a ninth bit.
By definition a device that gives out a message is called “transmitter”, the receiving device
that gets the message is called “receiver”. The device that controls the message is called
“master”. The devices that are controlled by the master are called “slaves”.
Figure 5.
Serial bus data transfer sequence
DATA LINE
STABLE
DATA VALID
CLOCK
DATA
START
CONDITION
CHANGE OF
DATA ALLOWED
STOP
CONDITION
AI00587
3.4.5
Acknowledge
Each byte of eight bits is followed by one acknowledge bit. This acknowledge bit is a low
level put on the bus by the receiver whereas the master generates an extra acknowledge
related clock pulse (see Figure 6 on page 21). A slave receiver which is addressed is
obliged to generate an acknowledge after the reception of each byte that has been clocked
out of the slave transmitter.
The device that acknowledges has to pull down the SDA line during the acknowledge clock
pulse in such a way that the SDA line is a stable low during the high period of the
acknowledge related clock pulse. Of course, setup and hold times must be taken into
account. A master receiver must signal an end of data to the slave transmitter by not
generating an acknowledge on the last byte that has been clocked out of the slave. In this
case the transmitter must leave the data line high to enable the master to generate the
STOP condition.
20/36
Doc ID 13307 Rev 9
STCN75
Functional description
Figure 6.
Acknowledgement sequence
CLOCK PULSE FOR
ACKNOWLEDGEMENT
START
SCL FROM
MASTER
1
DATA OUTPUT
BY TRANSMITTER
2
8
MSB
9
LSB
DATA OUTPUT
BY RECEIVER
AI00601
3.5
READ mode
In this mode the master reads the STCN75 slave after setting the slave address (see
Figure 7). Following the WRITE mode control bit (R/W=0) and the acknowledge bit, the word
address 'An' is written to the on-chip address pointer.
There are two READ modes:
Preset pointer locations (e.g. temperature, TOS and THYS registers), and
●
Pointer setting (the pointer has to be set for the register that is to be read)
The temperature register pointer is usually the default pointer.
These modes are shown in the READ mode typical timing diagrams (see Figure 8, Figure 9,
and Figure 10 on page 22).
Slave address location
R/W
START
A
SLAVE ADDRESS
1
LSB
Figure 7.
MSB
Note:
●
0
0
1
A2 A1 A0
AI12226
Doc ID 13307 Rev 9
21/36
Functional description
Figure 8.
STCN75
Typical 2-byte READ from preset pointer location (e.g. temp - TOS, THYS)
1
9
0
1
0
Start
by
Master
1
1
A2 A1 A0 R/W
9
1
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
Most Significant Data Byte
Address Byte
9
Least Significant Data Byte
ACK
by
STCN75
ACK
by
Master
Stop
Cond.
by
No ACK
Master
by
Master
AI12227
Figure 9.
Typical pointer set followed by an immediate READ for 2-byte register (e.g. temp)
1
1
9
0
Start
by
Master
0
1
A2 A1 A0 R/W
0
9
0
0
0
0
0
D1 D0
Pointer Byte
Address Byte
ACK
by
STCN75
1
1
Repeat
Start
by
Master
1
ACK
by
STCN75
9
0
0
1
1
A2 A1 A0 R/W
9
D7 D6 D5 D4 D3 D2 D1 D0
1
D7 D6 D5 D4 D3 D2 D1 D0
Most Significant Data Byte
Address Byte
ACK
by
STCN75
9
Least Significant Data Byte
ACK
by
Master
Stop
Cond.
by
No ACK
Master
by
Master
AI12228
Figure 10. Typical 1-byte READ from the cofiguration register with preset pointer
1
1
Start
by
Master
22/36
9
0
0
1
A2 A1 A0 R/W
1
9
D7 D6 D5 D4 D3 D2 D1 D0
Data Byte
Address Byte
ACK
by
STCN75
Doc ID 13307 Rev 9
Stop
Cond.
by
No ACK
Master
by
Master
AI12229
STCN75
3.6
Functional description
WRITE mode
In this mode the master transmitter transmits to the STCN75 slave receiver. Bus protocol is
shown in Figure 11. Following the START condition and slave address, a logic '0' (R/W = 0)
is placed on the bus and indicates to the addressed device that word address will follow and
is to be written to the on-chip address pointer.
These modes are shown in the WRITE mode typical timing diagrams (see Figure 11, and
Figure 12, and Figure 13 on page 24).
Figure 11. Typical pointer set followed by an immediate READ from the
configuration register
1
9
1
0
0
Start
by
Master
1
1
A2 A1 A0 R/W
9
0
0
0
0
0
0
D1 D0
Pointer Byte
Address Byte
ACK
by
STCN75
ACK
by
STCN75
1
1
Repeat
Start
by
Master
9
0
0
1
A2 A1 A0 R/W
1
9
D7 D6 D5 D4 D3 D2 D1 D0
Address Byte
Stop
Cond.
No ACK
by
by
Master
STCN75
Data Byte
ACK
by
STCN75
AI12230
Figure 12. Configuration register WRITE
1
1
Start
by
Master
9
0
0
1
A2 A1 A0 R/W
1
0
9
0
0
0
0
0
D1 D0
1
0
Pointer Byte
Address Byte
ACK
by
STCN75
9
0
0
D4 D3 D2 D1 D0
Configuration Byte
ACK
by
STCN75
Stop
Cond.
ACK
by
by
Master
STCN75
AI12231
Doc ID 13307 Rev 9
23/36
Functional description
STCN75
Figure 13. TOS and THYS WRITE
1
9
0
1
Start
by
Master
0
1
1
A2 A1 A0 R/W
9
0
0
0
0
0
D1 D0
Pointer Byte
Address Byte
ACK
by
STCN75
ACK
by
STCN75
1
9
D7 D6 D5 D4 D3 D2 D1 D0
1
9
D7 D6 D5 D4 D3 D2 D1 D0
Most Significant Data Byte
Least Significant Data Byte
ACK
by
STCN75
24/36
0
Doc ID 13307 Rev 9
ACK
by
STCN75
Stop
Cond.
by
Master
AI12232
STCN75
Typical operating characteristics
Figure 14. Temperature variation vs. voltage
140
120
100
Temperature (°C)
4
Typical operating characteristics
80
–20
60
0.5
40
85
20
110
0
125
–20
–40
–60
2
3
4
5
6
Voltage (V)
AI12258
Doc ID 13307 Rev 9
25/36
Maximum ratings
5
STCN75
Maximum ratings
Stressing the device above the ratings listed in the absolute maximum ratings table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the operating sections of
this specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
Table 10.
Absolute maximum ratings
Symbol
Parameter
Value
Unit
TSTG
Storage temperature (VCC off, VBAT off)
–60 to 150
°C
TSLD(1)
Lead solder temperature for 10 seconds
260
°C
VCC +0.5
V
VIO
Input or output voltage
VDD
Supply voltage
7.0
V
VOUT
Output voltage
VDD + 0.5
V
IO
Output current
10
mA
PD
Power dissipation
320
mW
θJA
Thermal resistance
216.3
°C/W
1. Reflow at peak temperature of 260 °C. The time above 255 °C must not exceed 30 seconds.
26/36
Doc ID 13307 Rev 9
STCN75
6
DC and AC parameters
DC and AC parameters
This section summarizes the operating measurement conditions, and the DC and AC
characteristics of the device. The parameters in the DC and AC characteristics tables that
follow, are derived from tests performed under the measurement conditions summarized in
Table 11, Operating and AC measurement conditions. Designers should check that the
operating conditions in their circuit match the operating conditions when relying on the
quoted parameters.
Table 11.
Operating and AC measurement conditions
Parameter
Conditions
Unit
VDD supply voltage
2.7 to 5.5
V
Ambient operating temperature (TA)
–55 to 125
°C
≤ 5
ns
Input pulse voltages
0.2 to 0.8VCC
V
Input and output timing reference voltages
0.3 to 0.7VCC
V
Input rise and fall times
Doc ID 13307 Rev 9
27/36
DC and AC parameters
Table 12.
Sym
VDD
IDD
IDD1
STCN75
DC and AC characteristics
Description
Supply voltage
Test condition(1)
Min
TA = –55 to +125
°C
2.7
Typ(2)
Max
Unit
5.5
V
VDD supply current, active
temperature conversions
VDD = 3.3 V
125
150
µA
VDD supply current,
communication only
TA = 25 °C
70
100
µA
Shutdown mode supply
current, serial port inactive
TA = 25 °C
1.0
µA
Accuracy for
corresponding range 2.7 V
≤ VDD ≤ 5.5 V
–25 °C < TA < 100
±0.5
±2.0
°C
–55 °C < TA < 125
±0.5
±3.0
°C
0.5
°C/LSB
9
bits
85
ms
9-bit
temperature data
Resolution
tCONV Conversion time
9
45
TOS
Overtemperature shutdown
Default value
80
°C
THYS
Hysteresis
Default value
75
°C
VOL1
OS/INT saturation voltage
(VDD = 5 V)
4 mA sink current
Digital pins
0.7 x VDD
(SCL, SDA, A2-A0)
VIH
Input logic high
VIL
Input logic low
Digital pins
VOL2
Output logic low (SDA)
IOL = 3 mA
CIN
Capacitance
IOL
SDA output low current
–0.45
0.5
V
VDD + 0.5
V
0.3 x VDD
V
0.4
V
5
pF
6
mA
1. Valid for ambient operating temperature: TA = –55 to 125 °C; VDD = 2.7 V to 5.5 V (except where noted).
2. Typical numbers taken at VDD= 3.0 V, TA = 25 °C.
28/36
Doc ID 13307 Rev 9
STCN75
DC and AC parameters
Figure 15. Bus timing requirements sequence
SDA
tBUF
tHD:STA
tHD:STA
tR
tF
SCL
tHIGH
P
S
tLOW
tSU:DAT
tHD:DAT
SR
tSU:STA
P
tSU:STO
AI00589
Table 13.
AC characteristics
Parameter(1)(2)
Sym
fSCL
SCL clock frequency
tBUF
Time the bus must be free before a new transmission can start
tF
Min
Max
Unit
0
400
kHz
1.3
SDA and SCL fall time
tHD:DAT(3) Data hold time
µs
300
ns
0
µs
START condition hold time
(after this period the first clock pulse is generated)
600
ns
tHIGH
Clock high period
600
ns
tLOW
Clock low period
1.3
µs
tHD:STA
tR
SDA and SCL rise time
300
ns
tSU:DAT
Data setup time
100
ns
tSU:STA
START condition setup time
(only relevant for a repeated start condition)
600
ns
tSU:STO
STOP condition setup time
600
ns
1. Valid for ambient operating temperature: TA = –55 to 125 °C; VDD = 2.7 V to 5.5 V (except where noted).
2. Devices are tested at maximum clock frequency of 400 kHz.
3. Transmitter must internally provide a hold time to bridge the undefined region (300 ns max) of the falling
edge of SCL
Doc ID 13307 Rev 9
29/36
Package mechanical data
7
STCN75
Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
30/36
Doc ID 13307 Rev 9
STCN75
Package mechanical data
Figure 16. MSOP8 (TSSOP8) – 8-lead, thin shrink small outline (3 mm x 3 mm) package
mechanical drawing
D
8
5
c
E1
1
E
4
k
A1
A
L
L2
A2
L1
ccc
b
e
E3_ME
1. Drawing is not to scale.
Table 14.
MSOP8 (TSSOP8) – 8-lead, thin shrink small outline (3 mm x 3 mm)
package mechanical data
mm
inches
Sym
Typ
Min
A
Max
Min
1.10
A1
0.00
0.15
0.75
0.95
b
0.22
c
A2
Typ
0.85
Max
0.043
0.000
0.006
0.030
0.037
0.40
0.009
0.016
0.08
0.23
0.003
0.009
0.034
D
3.00
2.80
3.20
0.118
0.110
0.126
E
4.90
4.65
5.15
0.193
0.183
0.203
E1
3.00
2.80
3.10
0.118
0.110
0.122
e
0.65
L
0.60
0.016
0.032
L1
0.95
0.037
L2
0.25
0.010
0°
8°
k
ccc
0.026
0.40
0°
0.80
8°
0.10
Doc ID 13307 Rev 9
0.024
0.004
31/36
Package mechanical data
STCN75
Figure 17. Carrier tape for MSOP8 (TSSOP8) package
P0
E
P2
D
T
A0
F
TOP COVER
TAPE
W
B0
P1
CENTER LINES
OF CAVITY
K0
USER DIRECTION OF FEED
AM03073v1
Table 15.
Package
Carrier tape dimensions for MSOP8 (TSSOP8) package
W
MSOP8 12.00
(TSSOP8) ±0.30
32/36
D
1.50
+0.10/
–0.00
E
P0
P2
F
1.75
4.00
2.00
5.50
±0.10 ±0.10 ±0.10 ±0.05
A0
B0
K0
P1
T
5.30
±0.10
3.40
±0.10
1.40
±0.10
8.00
±0.10
0.30
±0.05
Doc ID 13307 Rev 9
Unit
Bulk
Qty
mm 4000
STCN75
Package mechanical data
Figure 18. Reel schematic
T
40mm min.
Access hole
At slot location
B
D
C
N
A
Tape slot
In core for
Full radius
Tape start
2.5mm min.width
G measured
At hub
AM04928v1
Table 16.
Reel dimensions for 12 mm carrier tape - MSOP8 (TSSOP8) package
A
B
(max)
(min)
330 mm
(13 inch)
1.5 mm
C
13 mm
± 0.2 mm
D
N
(min)
(min)
20.2 mm
60 mm
Doc ID 13307 Rev 9
G
12.4 mm
+ 2 / –0 mm
T
(max)
18.4 mm
33/36
Part numbering
8
STCN75
Part numbering
Table 17.
Ordering information scheme
Example:
STCN75
DS
2
F
Device type
STCN75
Package
M = SO8(1)
DS = MSOP8 (TSSOP8)
Temperature range
2 = –55 to 125 °C
Shipping method
F = ECOPACK® package, tape & reel
E = ECOPACK® package, tube(2)
1. Not recommended for new design, contact local ST sales office for availability. Refer to the STTS75M2F
replacement part.
2. Not recommended for new design, contact local ST sales office for availability.
For other options, or for more information on any aspect of this device, please contact the
ST sales office nearest you.
34/36
Doc ID 13307 Rev 9
STCN75
9
Revision history
Revision history
Table 18.
Revision history
Date
Revision
Changes
25-Jul-2006
1
Initial release
17-Nov-2006
2
Changed document to new template; document status
updated from target specification to preliminary data; updated
footnotes in Table 1: Signal names; updated footnotes, VOL1,
VIL, VOL2 and IOL in Table 12: DC and AC characteristics;
deleted tTIME-OUT from Table 13: AC characteristics; updated
package mechanical data for the SO8N package in Section 7.
22-Jan-2007
3
Updated information in features and cover page, DC and AC
characteristics (Table 12), package mechanical information
(Figure 16 and Table 14) and part numbering (Table 17).
02-Mar-2007
4
Updated cover page (package information); Section 2:
Operation; Section 2.3: Comparator mode; Section 2.4:
Interrupt mode; Table 4; Table 12; package mechanical data
(Figure 16, Table 14); and part numbering (Table 17).
06-Jun-2007
5
Updated cover page, document status upgraded to full
datasheet, updated Table 12.
17-Jul-2008
6
Minor text changes; updated Section 3.1.3: Temperature
register; cover page, and Table 17.
09-Apr-2009
7
Updated Features, Table 10, 12, 13, text in Section 7:
Package mechanical data; added tape and reel information
Figure 17, Table 15; minor reformatting.
10-May-2010
8
Updated Section 2.5, Section 5; added reel information
(Figure 18, Table 16); minor textual changes; reformatted
document.
07-Mar-2012
9
Removed SO8 package and references from document;
indicated that shipping method in tubes is not recommended
for new design (Table 17).
Doc ID 13307 Rev 9
35/36
STCN75
Please Read Carefully:
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the
right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any
time, without notice.
All ST products are sold pursuant to ST’s terms and conditions of sale.
Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no
liability whatsoever relating to the choice, selection or use of the ST products and services described herein.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this
document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products
or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such
third party products or services or any intellectual property contained therein.
UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED
WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS
OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.
UNLESS EXPRESSLY APPROVED IN WRITING BY TWO AUTHORIZED ST REPRESENTATIVES, ST PRODUCTS ARE NOT
RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING
APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY,
DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE
GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER’S OWN RISK.
Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void
any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any
liability of ST.
ST and the ST logo are trademarks or registered trademarks of ST in various countries.
Information in this document supersedes and replaces all information previously supplied.
The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.
© 2012 STMicroelectronics - All rights reserved
STMicroelectronics group of companies
Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America
www.st.com
36/36
Doc ID 13307 Rev 9
工商网监
湘ICP备2023018690号
