STEVAL-IHP007V1
Power line communication module for street lighting
Data brief
Description
The STEVAL-IHP007V1 evaluation board is a
power line communication module addition to the
STEVAL-ILH007V1 HID ballast module. It
provides functions for the management of street
lighting network architecture in the CENELEC AB-D bands.
The module is based on an STM32F103CBT7
ARM Cortex-M3 microcontroller and an ST7580
PSK narrow band power line modem with up to
28.8 kbps data rate. The embedded MCU can be
easily replaced with an equivalent 48-pin MCU
from the STM32F0, STM32F2, STM32F3 families
with a few changes.
The module is designed to work with the
STEVAL-ILH007V1 HID module, but can be
associated with other lighting driver boards with a
standard serial communication port.
Features
SM6T15CA: Transil 600 W TVS diode
SMAJ5.0CA-TR: Transil 400 W TVS diode
ST7580: FSK, PSK multi-mode power line
networking system-on-chip
STM32F103CBT7: STM32 ARM-based 32bit MCU
STPS1L30: low drop power Schottky rectifier
1 A, 30 V, 0.3 V
STTH1L06A: Turbo 2 ultrafast high voltage
rectifier
RoHS compliant
September 2016
Note that this board only functions in a network
with an EVALKITST7580-1 board designated as
the master; this is achieved via UART
commands.
DocID027065 Rev 4
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office
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www.st.com
Schematic diagrams
STEVAL-IHP007V1
Schematic diagrams
Figure 1: STEVAL-IHP007V1 circuit schematic (1 of 5)
VDDIO
8
7
6
5
VDDIO
8
7
6
5
VDDIO
R1
RP1
4 x 10K
CAT16-J4
R3
1
2
3
4
1
2
3
4
R2
RP2
10K 4 x 10K
0402 CAT16-J4
0R
0402
0R
0402
LD1
VDDIO VDDIO
GND_A
R6
VDDIO
EP
36
35
34
33
32
31
30
29
28
27
26
25
C2
0402
100n 16V
CL_SEL
GND_A
C7
0402
100n 16V
C8
0805
10u 16V
C12
100n 16V
0402
C11
10u 16V
0805
VDDIO
VDD_REG_1V8
PA_OUT
L1
BLM21PG300SN1
0805
49
GND_A
VCC
C17
100p 25V
0402
GND_A
VDDIO
560R
0603
560R
0603
HS MF- C155
LEDSMD
VDD_PLL
C19
100n 16V
0402
GND_A
R4
PL_TX_ON
U2
ST7580
VFQFPN48
CL_SEL
VSSA
VDDI O
GND
NC
RESERVED
NC
NC
VDDI O
VVD_ REG_1V8
PA_OUT
VSS
Transceiver Module
ZC_IN
RX_IN
TX_OUT
PA_IN+
PA_INCL
C16
4u7 16V
0805
PL_RX_ON
RESERV ED 5
RESERV ED 4
V DD
GN D
RESERV ED 3
RESERV ED 2
E
SE
R
V
ED 1
R
PL_TX _ON
BR0
BR1
T_REQ
PL_RX_ON
48
47
46
45
44
43
42
41
40
39
38
37
PLC_RESETN
VDD
C10
100n 16V
0402
TXD
RXD
VDDIO
TRSTN
TMS
GND
TCK
TDO
TDI
RESETN
VDD
XIN
X OU T
GN D
V SSA
V D D _PLL
V CCA
ZC_I N
RX_IN
TX_OUT
PA_IN+
PA_INCL
V CC
1
2
3
4
5
6
7
8
9
10
11
12
C4
100n 16V
0402
L2
R9
10K
0402
PLC_TXD
PLC_RXD
VDDIO
8MHZ_MCO
R10
10K
0402
R38
10K
0402
BLM21PG331SN1
VDDIO
100n 16V
0402
13
14
15
16
17
18
19
20
21
22
23
24
R8
10K
0402
BR0
BR1
T_REQ
C1
C20
100n 16V
0402
C18
10u 16V
0805
GND_A
VCC_A
G ND_A
C24
100n 16V
0402
C22
100p 25V
0402
GND_A
R15
130R
0402
R16
330R
0402
VDDIO
R17
10K
0402
3
C21
10u 16V
0805
2
1
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DocID027065 Rev 4
Q1
2N7002
CL_SEL
Current Limit Setting
STEVAL-IHP007V1
Schematic diagrams
Figure 2: STEVAL-IHP007V1 circuit schematic (2 of 5)
LD2
R39
R40
VDDIO
560R
0603
560R
0603
VDDIO
R14
10K
0402
Host Controller
PLC_RESE TN
U1
HS MF- C155
LED_RED
LEDSMD
LED_GREEN
BOOT1
JTAG_TDO
JTAG_TRST
R5
PLM_GPIO6
PLM_GPIO7
18
19
20
39
40
41
42
43
PL M_GPIO4
PL M_GPIO5
PL_RX_ON
PL_TX_ON
SPI_NSS
SPI_SCK
SPI_MISO
SPI_MOSI
45
46
21
22
25
26
27
28
FOXSDLF/080-20
5
6
330R
0402
C5
22p 50V
0402
X2
R11
1M
0402
C9
22p 50V
0402
1
BT1
24
36
48
9
VBAT
CR2032/1HF
VDDIO
L3
VDDA
VDDIO
BLM18AG102SN1D
0603
P B0
P B1
P B2/BOOT1
PB3/JTDO
PB4/JNTRST
PB5
PB6
PB7
PB8
PB9
PB10
PB11
PB12
PB13
PB14
PB15
PA0-WKUP
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
PA10
PA11
PA12
PA13/JTMS /SWDIO
PA14/JTCK/SWCLK
PA15/JTDI
OSC_IN/PD0 PC13/TAMPER_RTC
OSC_OUT/PD1
PC14/OSC32_IN
PC15/OSC32_OUT
VBAT
BOOT0
NRST
VDD_1
VDD_2
VDD_3
VDDA
VSS_1
VSS_2
VSS_3
VSSA
10
11
12
13
14
15
16
17
T_REQ
PLC_RXD
PLC_TXD
PLM_GPIO0
PLM_GPIO1
PLM_GPIO2
PLM_GPIO3
29
30
31
32
33
34
37
38
8 MHZ_ MCO
USART_TX
USART_RX
STM32_USB_DM
STM32_USB_DP
JTAG_TMS
JTAG_TCK
JTAG_TDI
2
3
4
OSC32_IN
OSC32_OUT
44
7
BOOT0
RESET_uP
23
35
47
8
(uP Tx)
(uP Rx)
C3
10p 50V
X1 0402
MC-306
C6
R12
10p 50V
0402
VDDIO
10K
0402
R13
10K
0402
C13
100n 16V
0402
IC-STM32F103 CBT7
C14
10u 16V
0805
C15
100n 16V
0402
VDDIO
C23
10u 16V
0805
C37
100n 16V
0402
C38
100n 16V
0402
C39
100n 16V
0402
Figure 3: STEVAL-IHP007V1 circuit schematic (3 of 5)
TP1
ZC_IN
VCC_A
R18
D1
L
1
VCC_A
33K
1206
R19
22K
0402
4
C29
U3
3
ZC_IN
1
2
HCPL-181-000E
R30
33K
0402
100n 16V
0402
R32
10M
0402
Q2
BC847
SOT23
GND_A
R22
100K
0805
STTH1L06A
DO-214AC
R25
R26
33K
1206
33K
1206
N
Isolated Zero Crossing
GND_A
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Schematic diagrams
STEVAL-IHP007V1
Figure 4: STEVAL-IHP007V1 circuit schematic (4 of 5)
C25
100 p 25V
040 2
C26
27p 50V
0402
VCC
C27
VCC
0402
4.7p 50V
R21 33K
040 2
C28
TP2
TX_OUT
1
R24
47K
0402
C31
TX_OUT
R20
100n 16V
0402
R27
1K5
100n 16V
040 2
R33
0402
47K
0402
10K
0402
VCC
R23
24K
0402
D2
STPS1L30A
DO-214AC(S MA)
C3 0
10u 50V
1210
R31
24K
0402
D3
STPS1L30A
DO-214AC(S MA)
PA_INR2 8
5 K1
C33
1n 50 V
0402
R29
040 2
22K
040 2
PA
PA_IN+
PA_OUT
C3 4
100 p 25 V
040 2
TP3
1
1:1 1
C32
L4
L
220nX2 250Va c
18x8x16
D4
SM 6T15 C A
SMB
N
10u 2. 0 A
R3 4
150 R 5
4
0603
T60403-K5024-X044
C35
10n 50V
0603
RX_IN
COMM
ZT1
8
RX_IN
J2
L5
100u 350 mA
SM D
Power Line Coupling Section
C36
18n 50 V
0603
D5
SMAJ5.0 CA
DO214
COMM
L
N
5
4
3
2
1
90121- 076 5
Figure 5: STEVAL-IHP007V1 circuit schematic (5 of 5)
JTAG Interface
8
7
6
5
VDDIO
RP3
4 x 10K
CAT16-J4
1
2
3
4
J1
JTAG_TRST
JTAG_TDI
JTAG_TMS
JTAG_TCK
JTAG_TDO
RESET_uP
R7
10K
0402
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DocID027065 Rev 4
1
2
3
4
5
6
7
8
90120-0768
STEVAL-IHP007V1
STEVAL-IHP007V1 firmware section
STEVAL-IHP007V1 firmware section
Figure 6: Firmware architecture
Figure 7: Data link architecture
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STEVAL-IHP007V1 firmware section
STEVAL-IHP007V1
Figure 8: Application architecture
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DocID027065 Rev 4
STEVAL-IHP007V1
Revision history
Revision history
Table 1: Document revision history
Date
Rev
09-Feb-2015
1
First release.
23-Jul-2015
2
Description has been updated.
07-Jan-2016
3
Updated board photo on the cover page.
4
Text and formatting changes throughout document.
Updated cover page Description.
02-Sep-2016
Changes
Updated Figure 6: "Firmware architecture"
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STEVAL-IHP007V1
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design of Purchasers’ products.
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Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2016 STMicroelectronics – All rights reserved
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DocID027065 Rev 4
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