STEVAL-IME011V2

STEVAL-IME011V2 Evaluation board based on the STHV748S high voltage pulser Data brief Description The STEVAL-IME011V2 evaluation board is designed around the STHV748S 4-channel 5level high voltage pulser, a state-of-the-art device designed for ultrasound imaging applications. This board facilitates evaluation of the ultrasound pulser IC thanks also a new graphical user interface. Once configured, the output waveforms can be displayed directly on an oscilloscope by connecting the probe to the relative BNCs. Features       4-channel outputs: high voltage and low voltage BNC connectors Up to 4 memory locations to store own waveforms designs USB connector to load own waveforms onto the board Dedicated connectors to supply high voltage and low voltage to the STHV748 output stage 4-key button rapid preferred program selection RoHS compliant November 2016 DocID029962 Rev 1 For further information contact your local STMicroelectronics sales office 1/4 www.st.com RL1 56 L1 L2 RL2 56 L2 L3 RL3 56 L3 L4 L5 5 4 UF1 DV D D BAT20J D2 L6 RL6 56 L6 DVDD RE1 56 RE2 RE3 56 56 RE4 56 RE5 56 RE6 RE7 56 56 AUX0 AUX1 AUX2 AUX3 AUX4 AUX5 AUX6 AUX7 RE0 56 USBDM USBDP RF4 107k RF3 62k RF2 62k RF1 107k 1M 8MHz Cosc1 22pF 22pF Cosc2 X1 OSC_IN AVSS CF6 10F AN_SUPPLY CF5 10F AVDD Rosc OSC_OUT 10nF CC2 10nF CC1 +5V 3 2 8 11 USBUF01W6 1 D4 VDD D1 D3 GND D2 3 RL5 56 L5 36 24 1 USB_PWR RL4 56 L4 GND 1734035-1 Shell ID D+ D- VBUS USB -5 V CF4 10F LT3032 50 75 DVDD 100 28 BOOT0 11 22 21 R1_F2 R2_F2_F4 12 OSC_IN 0 0 OSC_OUT 13 14 NRST 94 19 99 49 R1_F1_F4 73 R2_F1 R3_F1 C1 _F2 _ F4 20 C2_F2_F4 0 0 0 74 27 10 2.2F 2.2F L1 -5V R18 330 LVLV+ VSS LV+ LV- VDD SHD INP OUTP 10,12SHD BYPP ADJP ADJN CF3 4,5 GND BYPN 10F INN OUTN 14 6,9 5 2 D1 BAT20J REG2 1 7 +5V CF2 10F ADC_IN0 ADC_IN1 ADC_IN2 CB1 100nF SPI_CLK CF1 10F SPI_CLK SPI1_MISO DVDD VDD1 VDD2 VDD3 VDD4 VDD5 VDDA VREF+ OSC_IN OSC_OUT NRST BOOT VSSA VSS3 VSS1 NC VREFVSS2 VSS4 VSS5 100nF 100nF 100nF SPI3_MISO SPI2_MISO SPI1_MISO CB4 100nF 100nF CB3 CB12 S TM3 2F42 7 U1 VBAT PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 PC8 PC9 PC10 PC11 PC12 PC13 PC14 P C1 5 RTHSD 10k THSD RSHD 330 SHD 6 15 PC0 16 PC1 17 PC2 18 PC3 33 PC4 34 PC5 63 PC6 64 65 66 78PC10 79PC11 80PC12 7 PC13 8 PC14 9 PC15 SPI3 PC12 SPI2 PC10 SPI1 PC11 100nF CB6 DVDD 100nF CB5 AVDD 100nF CB10 AVSS 100nF 100nF 100nF CB11 CB9 CB8 CB7 CB2 SPI_JTAG_1 IN OUT GND L5 L6 REG1 LD1117 SPI_CLK SPI2_MISO +5V USBDP USBDM JTMS JTCK JTDI 23 24 25 26 29 30 31 32 67 68 69 70 71 72 76 77 PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7 PA8 PA9 PA10 PA11 PA12 PA13 PA14 PA15 DocID029962 Rev 1 PE0 PE1 PE2 PE3 PE4 PE5 PE6 PE7 PE8 PE9 PE10 PE11 PE12 PE13 PE14 PE15 JTDO SPI_CLK 97 98 1 2 3 4 5 38 39 40 41 42 43 44 45 46 JRST SPI3_MISO 35 36 37 89 90 91 92 93 95 96 47 48 51 52 53 54 SPI_JTAG_2 PB0 PB1 PB2 PB3 PB4 PB5 PB6 PB7 PB8 PB9 PB10 PB11 PB12 PB13 PB14 PB15 L4 L3 L2 L1 P4 P3 P2 P1 AUX7 AUX6 AUX5 AUX4 AUX3 AUX2 AUX1 AUX0 10 0nF CP1 P1 U2 STHV748 XDCR_A XDCR_B XDCR_C XDCR_D HVOUT_A HVOUT_B HVOUT_C HVOUT_D LVOUT_A LVOUT_B LVOUT_C LVOUT_D GND_PWR_D GND_PWR_C GND_PWR_B GND_PWR_A CR8 ZAD2 1 0 0 nF P2 RP2 10k DVDD 10 0nF PRGCP3 P3 RP3 10k USR_RX POT1 50 % 100nF CAD1 HVM1 HVM0 58 23 26 55 5 12 37 44 57 24 25 56 54 27 22 59 100nF STP CP4 220nF 100nF RST C B 26 220nF 220 nF C B 25 220nF CB22 220nF CB21 CB18 220nF 220nF 220nF CB17 CB14 CB13 NRST HVM1 HVP1 HVM0 HVP0 RRB 100 270pF RRA 100 CRB RLB 100 RLA 100 270pF 270pF 270pF CRA CLB CLA 220nF CB 27 220nF CB23 220nF CB19 220nF CB15 RRC 100 RRD 100 270pF CRD RLD 100 270pF 220nF CB28 220nF CB24 220nF CB20 220nF CB16 270pF CRC RLC 100 270pF CLD HVP0 CLC 0 0 HVP1 RHVP HVM0 RHVM USRCRST DVDD P4 RP4 10k ADC_IN1 RAD4 2.7k CAD2 100nF HVM1 HVP0 HVP1 HVP1 RAD3 100k A D C_ IN2 HVM1 DZ2S033 A DC_IN0 ZAD1 DZ2S033 HVM0 3.9nF 3.9nF 3.9nF 3.9nF CR5 CR6 CR7 STR CP2 RAD2 100k RP1 10k HVP1 22nF 22nF 22nF 22nF IN1_A IN2_A IN3_A IN1_B IN2_B IN3_B IN1_C IN2_C IN3_C IN1_D IN2_D IN3_D IN4 D_CTR THSD RAD1 2.7k HV M1 PC AVDD AVSS THSD 63 PC15 62 PC14 61 PC13 18 PC0 19 PC1 20 PC2 31 PC530 PC429 PC3 50 PC10 51 PC11 52 PC12 17 PC6 16 32 AVDD HVP0 CR1 CR2 CR3 CR4 GND_PWR PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 PD8 PD9 PD10 PD11 PD12 PD13 PD14 PD15 49 21 53 64 10 42 7 39 6 11 38 43 8 9 40 41 DVDD VDDP1 VDDP2 INT_BIAS REF1_HVP0 REF2_HVP0 REF1_HVP1 REF2_HVP1 HVP0_A HVP0_B HVP0_C HVP0_D HVP1_A HVP1_B HVP1_C HVP1_D VDDM1 VDDM2 DGND AGND1 AGND2 REF1_HVM0 REF2_HVM0 REF1_HVM1 REF2_HVM1 HVM0_A HVM0_B HVM0_C HVM0_D HVM1_A HVM1_B HVM1_C HVM1_D 2/4 28 60 48 1 33 15 47 2 34 4,65 13 36 45 3 14 35 46 10F CF10 10F CF 9 10F CF8 10F HV+ HV- HVM1 GN D_PW R HV+ HV- HV P1 HV+ HV - HVM0 JTAG DVDD JTDI JTMS JTCK JTDO JRST NRST LVOUTD LVOUTC LVOUTB LVOUTA GND_PWR XDCRD XDCRC XDCRB XDCRA GND_PWR HV+ HV- HVP0 GND_PW R CF7 0 RGND 1 81 82 83 84 85 86 87 88 55 56 57 58 59 60 61 62 Schematic diagram STEVAL-IME011V2 Schematic diagram GSPG300916 1145SG Figure 1: STEVAL-IME011V2 circuit schematic STEVAL-IME011V2 2 Revision history Revision history Table 1: Document revision history Date Version 04-Nov-2016 1 Changes Initial release. DocID029962 Rev 1 3/4 STEVAL-IME011V2 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2016 STMicroelectronics – All rights reserved 4/4 DocID029962 Rev 1