STEVAL-IPA001V1

STEVAL-IPA001V1 Anti tamper and security kit based on STM1403 - STM1404 + uPSD3422EV Data Brief Features ■ Control of all voltage inputs of the STM140x (PWM) ■ Monitor of all voltage outputs of the STM140x ■ Monitor of all digital outputs of the STM140x ■ Separated daughter board for direct testing of STM140x on breadboard (QFN16 to common header connector interface) Description This evaluation board demonstrates the features of ST’s anti-tampering and supervisory solutions. The board is based on the STM140x family of lowpower intrusion (tamper) detection security supervisors typically used in the high security modules (HSM) of a point of sale (POS) system. It enables manufacturers to meet security standards such as FIPS-140 (NIST, US Dept. of Commerce), EMV Co, ISO, ZKA (Germany) and Visa PED. ) s ( ct c u d ) s t( o r P STEVAL-IPA001V1 e t le o s b O - u d o r P e t e l o s b O November 2007 Rev 1 For further information contact your local STMicroelectronics sales office. 1/4 www.st.com 4 Board schematic 1 STEVAL-IPA001V1 Board schematic Figure 1. Schematic STM1404 Pinout headers uPSD's extension headers H3 H30 GND P4.7 P4.5 P4.3 P4.1 P3.0 P3.2 P3.4 P3.6 GND 1 2 3 4 5 6 7 8 9 10 1 2 3 4 5 6 7 8 9 10 H10 H1 PC2 P4.6 P4.4 P4.2 P4.0 P3.3 P3.1 P3.5 P3.7 GND GND PB1 PB3 PB5 PB7 Ai6 Ai7 Ai4 Ai2 Ai0 CON10 CON10 1 2 3 4 5 6 7 8 9 10 1 2 3 4 5 6 7 8 9 10 VOUT VUSB PB0 PB2 PB4 PB6 RSTn V3.3 Ai5 Ai3 Ai1 PFI 2 SW1 4 1 3 VBAT GND CON10 CON10 R14 U1 VCC JP7 Ai7 R15 27k TP1 TP2 TP3 TP4 JP8 Ai6 JP20 P4.6 JP9 Ai2 JP10 JP11 JP12 JP13 P3.3 P3.1 P3.5 P3.7 13 14 PB3 JP14 VCCSW VOUT 12 Ai4 PFO RST BLD SAL 10 1 16 3 PB5 PC2 PB1 P4.4 VTPU 9 Ai0 27kVOUT JP15 VOUT VOUT VOUT VOUT VOUT VOUT VOUT D1 R3 R6 JP16 PFO R7 JP17 RST RST R5 JP18 BLD 27k JP19 SAL C1 GREEN LED 27k 3u3 27k R4 27k VSS 4 GND VCC VCCSW 15 PFI 2 MR 11 5 6 7 8 VBAT TP1 TP2 TP3 TP4 VOUT 330 STM1404 REV 0.2 GND PWM voltage sources (10kHz) R16 VUSB VOUT TP3 C6 100n GND R1 43k R12 10M GND 270k R8 P4.2 R9 10M 100k C2 100n GND PFIPFI TP1 3 + 2 - JP1 JP3 GND GND 270k R11 TP4 TP4 TP4 TP4 TP4 TP4 100k ro P e let GND u d o r P e t e l o s b O 2/4 1 o s b O - C3 100n ) s t( VBAT VBAT VBAT VBAT VBAT VBAT C4 100n c u d VUSB P4.0 ) s ( ct U2A TS1852_8P_GATE TP2 R13 R2 27k VUSB 4 8 VCC VUSB GND U2B 5 + 6 - 7 VCC TS1852_8P_GATE C5 100n GND STEVAL-IPA001V1 2 Revision history Revision history Table 1. Document revision history Date Revision 26-Nov-2007 1 Changes Initial release c u d e t le ) s ( ct ) s t( o r P o s b O - u d o r P e t e l o s b O 3/4 STEVAL-IPA001V1 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ) s t( Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. c u d No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. 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