STEVAL-IPE009V1

STEVAL-IPE009V1 Mono-phase / multi-tariff energy meter based on the ST72321BR9 and STPM14 Data Brief Features ■ Cost-effective and flexible ■ Meets Class 1 accuracy for IB = 5 A and Imax = 80 A according to IEC 61036:1996 + A1: 2000 - Static meter for active energy (classes 1 and 2) ■ Operating voltage range 220 V ± 20% ■ Continuously detects and displays no-load conditions, reverse direction, fraud and case tamper conditions ■ Configurable number of tariffs (1 to 4) and maximum demand type (day, one month or three month) ■ Accumulated data for whole meter life (total kWh consumption, average MD (maximum demand), total number of tariffs, tariff time slots, consumption under different tariff rates, power failure date/time) ■ ■ ) s ( ct u d o r P e t e l o bs O ) s ( t c ■ Data for last 12 months (consumption under tamper mode for each month, first/last case/fraud tamper date/time, total tamper time and power failure accumulating time for each month) u d o This demonstration board is an integrated system designed to provide the user with a complete, ready-to-use energy meter application. It is a medium-end solution for power metering, using the ST72F321BR9T6 microcontroller, the M41T94 RTC (real-time clock), the M95256 EEPROM and the STPM14 energy meter ASSP device. t e l o Data for absolute maximum demand (absolute MD, date/time) according to type of MD requested s b O SW LCD driver for 24 x 4 segment LCD glass with contrast control ■ RTC with SPI for real date/time ■ EEPROM with SPI for storing 256 Kb of data ■ Case tamper detection even in power-down ■ External switch for viewing all data stored in EEPROM sequentially even when AC power is not available ■ Battery backup to detect tampering and see all parameters stored in EEPROM even during power-down September 2008 Single point and fast calibration of the STPM14 for Class 1 meter. Description r P e ■ STEVAL-IPE009V1 The multi-tariff energy meter demonstration board implements many features that can be used as a starting platform for evaluation and development of meter applications, including multi-tariff management, absolute and average maximum demand calculation, two types of tamper management, and power failure management. Rev 1 For further information contact your local STMicroelectronics sales office. 1/7 www.st.com 7 2/7 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 EMEM PE6 PE7 PB0 PB1 PB2 PB3 PB4 PB5 PB6 PB7 PD0 PD1 PD2 PD3 57 17 PD4 SS/PC7 PA0 PA1 VSS_0 PC0/OCMP2_B/AIN12 PC1/OCMP1_B/AIN13 PC2/ICAP2_B PC3/ICAP1_B PC4/MISO/ICCDATA PC5/MOSI/AIN14 PC6/SCK/ICCCL K PF6 32 PF7 0Ω R7 0Ω COM4 COM3 COM2 +5.0 VB SDO SCL C19 100 nF 4.7 KΩ u d o C31 10 nF SW2 R40 220 2 2 Q3 BC847 1 3 Q2 BC847 IRIN R41 10 kΩ +5.0 V 1 3 D10 RESET R35 16 MHz 1 2 3 X1 OSC2 OSC1 AM00281 MCU oscillator/reset Q1 PHOTO NPN +5.0 VB 2 1 R29 10 KΩ +5.0 V 3 kΩ R30 74HC04 2 U7A 1 R39 39 Ω Multi-tariff single-phase meter Figure 1. Schematic - microcontroller and IrDA section, MCU oscillator/reset +5.0 VB PFD 31 COM1 ICCDATA SDI R5 7 IROUT 1 14 100 nF C33 +5.0 V +5.0 V 1.1 C25 100 nF 10 kΩ R1 30 PF5 33 34 35 36 37 38 39 40 41 C14 10 nF SW1 TMPD 2 r P e R2 10 kΩ 25 26 27 28 29 NLCD PF4 NPD ICCCLK IRQRTC IRQBUTT 1 C13 10 nF JP1 IrDA section Schematic diagram +5.0 VB 23 24 42 43 44 45 46 47 48 100 nF R38 10 kΩ 1 C24 100 nF ei0 PA2 PA3 VDD_0 MCO/AIN8/PF0 ICAP2_A/AIN11/PF5 VAREF VSS_3 BEEP/PF1 OCMP2_A/AIN9/PF3 VDD_3 EXTCLK_A/PF7 PF2 OCMP1_A/AIN10/ PF4 ICAP1_A/PF6 VSSSA 18 19 20 21 22 PD5 PD6 PD7 AIN7/PD7 AIN6/PD6 AIN5/PD5 AIN4/PD4 ei1 I2C VDD_1 VSS_1 PA4 C12 +5.0 VB +5.0 VB t e l o s b O AIN3/PD3 AIN2/PD2 AIN1/PD1 AIN0/PD0 ei3 SPI VPP/ICCSEL RESET 51 ) (s PB7 ARTIC2/PB6 ARTIC1/PB5 ARTCLK/PB4 ST72F321BR9T6 52 PA6/SDAI PA7/S ICL PA5 PA4 50 49 PA5 t c u PWM0/PB3 ei2 VPP d o r PWM1/PB2 PWM2/PB1 PWM3/PB0 SCI RESET 54 53 P e PE7 PE6 PE5 EVD IRQSTPM 56 55 VSS_2 VDD_2 PE3 PE2 OSC1 OSC2 PE1/RDI TLI PE4 PE0 /TDO OSC1 59 58 OSC2 C5 100 nF t e l o NERTC IROUT IRIN 63 62 61 60 +5.0 VB s b O 64 U6 Microcontrollers section Schematic diagram STEVAL-IPE009V1 ) s ( ct s b O 1 M95256 1 2 3 4 EMEM SDO 3 1 MΩ R37 1 7 11 14 BT2 BATTERY 3 V 15 pF 15 pF C29 C28 74HC04 8 U7D VIPER12ADIP 2 Y2 32.768 KHz 1 2 3 4 5 6 7 8 74HC04 10 U7E 14 7 13 74HC04 12 U7F M41T94 VCC 16 XI 15 XO NE 14 NRST NIRQ/FT/OUT 13 WDI THS 12 NRSTIN1 SDI 11 NRSTIN2 SQW 10 VBAT SCL 9 VSS SDO U5 NERTC IRQRTC D11 1N4148 SDI u d o SCL SDO 1 2 3 4 U2 L78L05AC 8 V V 7 IN OUT 6 GND GND GND GND 5 NC NC PFD r P e C27 100 nF VCC S HOLD Q C W D VSS U4 7 9 14 C9 100 nF 25 V D8 STTH1L06 C8 47 µF DZ2 600 V 1A 25 V 10 VZ 1 MH L1 250 mA t e l o SCL SDI 8 7 6 5 +5.0 VB 74HC04 6 U7C C7 1 µF 450 V 10 µF R3 22E 0.25 W C4 25 V 100 nF C3 50 V 600 V 1A STTH1L06 D2 s b O +5.0 VB RTC/memory SPI block 74HC04 7 5 4 3 7 14 U7B RV1 275 V 8.6 J C6 1 µF 450 V 8 7 6 5 C2 22 nF 25 V U1 D S 1 D S 2 D FB 3 D VDD 4 t c u ) (s 14 Not used Mains 230 VAC CON1 D6 1000 V 1000 V 1A 1A D5 L1 BC1 470 µH 100 MA d o r J2 RF1 10R 1 Ω PHASE CON1 1 P e t e l o D3 LL4148 DZ1 9.1 VZ C30+ 100 nF +5.0 VB 4.8 V BT1 3 F 1 2 AM00282 L2 1 µH 150 mA + C11 100 µF R4 5 KΩ +5.0 VB D4 BAT49 + C1 100 µF +5.0 V 1N4148 + C10 100 µF 25 V D13 1N4148 D12 Figure 2. J1 Power management section STEVAL-IPE009V1 Schematic diagram Schematic - power management, RTC/memory SPI block ) s ( ct 3/7 s b O t e l o 4/7 R32 56 KΩ R31 56 KΩ COM1 COM2 R27 56 KΩ R26 56 KΩ F R34 56 KΩ R33 56 KΩ COM4 COM3 R28 56 KΩ C23 COM4 COM3 COM2 COM1 PF4 PD6 PD4 PD2 PD0 PB6 PB4 PB2 PB0 PE6 D9 J7 1 2 3 4 5 6 7 8 9 10 11 12 13 14 270 KΩ R21 270 KΩ R22 R18 2 MΩ U3 200 KΩ R23 Sda Scl Scs Syn CLKout CLKin VIN Vip Iln2 Ilp2 2 STPM14 LED MON MOP VDDD VSS VCC VDDA VOTP Ilp1 Iln1 1 R14 2 MΩ LCD DE7936/V 28 27 26 25 24 23 22 21 20 19 18 17 16 15 LCD block 10 nF R17 R20 1 KΩ 4.4 1% F R15 1 KΩ R25 56 KΩ phase phase C20 4.4 1% 10 nF R10 R13 1 KΩ R8 1 KΩ IRQSTPM 20 MON 1 2 4 5 6 8 7 9 10 s b O t e l o PA4 PA5 PF7 PF6 PF5 PD7 PD5 PD3 PD1 PB7 PB5 PB3 PB1 PE7 r P e +5.0 VB Mains 230 VAC +5.0 V 1 µF C18 ) (s Current transformer 2 1 4.4 1% R16 1 µF t c u J5 Current transformer 4.4 1% R9 1 µF d o r 2 1 VOTP 1 nF C17 R6 750 Ω VOTP u d o TMPD SCS NLCD +5.0 V NPD R24 470 Ω 33 nF C26 150 KΩ R19 2,21 KΩ R11 C21 F 15 pF 1 2 3 4 5 6 7 8 9 10 J6 ) s ( ct ICP connector 10 9 8 7 6 5 4 3 2 1 JA1 4.194304 MHz Y1 15 pF C22 VPP C32 100 nF ICCDATA AM00283 +5.0 VB TP2 MON ICCCL K RESET R36 10 KΩ OSC1 MON IRQSTPM TP1 LED 1 MΩ R12 ICC/STPM01 connectors 19 TMPD 18 NLCD SCS 3 NPD 15 17 16 14 13 12 11 Figure 3. J4 F C15 C16 P e Measurement section Schematic diagram STEVAL-IPE009V1 Schematic - measurement section, LCD block, ICC/STPM01 connectors STEVAL-IPE009V1 1.2 Schematic diagram SCI-interface Figure 4. Schematic - SCI-interface +5.0V J2 1 2 CON2 C3 100 nF 50 V C4 100 nF 50 V C2 100 nF 50 V C1 100 nF 50 V U1 1 2 3 4 5 6 7 8 C5 100 nF 50 V C1+ VDD V+ GND C1– T1OUT C2+ R1IN C2– R1OUT V– T1IN T2OUT T2IN R2IN R2OUT 16 15 14 13 12 11 10 9 P1 1 6 2 7 3 8 4 9 5 J1 IROUT IRIN ) s ( ct 2 1 CON2 u d o ST232C RS232 r P e +5.0 V +5.0 V +5.0 V R5 10 kΩ R4 10 KΩ R2 220 Ω 3 2 2 t(s 1 c u d e t e ol O ) 1 Q2 PHOTO NPN bs IRIN Q3 BC847 t e l o 2 D1 LN01201CAL(U)) 1 3 R1 3 kΩ IROUT R3 39 Ω 2 Q1 BC847 1 AM00284 o r P s b O 5/7 Revision history 2 STEVAL-IPE009V1 Revision history Table 1. Document revision history Date Revision 22-Sep-2008 1 Changes Initial release. ) s ( ct u d o r P e t e l o ) (s t c u d o r P e t e l o s b O 6/7 s b O STEVAL-IPE009V1 ) s ( ct Please Read Carefully: u d o Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. r P e All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. t e l o No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. 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