STEVAL-IPP004V1

STEVAL-IPP004V1 General purpose PRIME power line communication module Data brief Description The STEVAL-IPP004V1 evaluation board is a PLM communication module that is especially suited for metering since it is designed to work in the CENELEC A band. The module is based on the STM32F103RFT6 ARM Cortex-M3 microcontroller and an ST7590 PRIME narrow band power line modem with up to 128 kbps data rate. The assembled MCU can be easily replaced with an equivalent 64-pin MCU from the STM32F2 or STM32F4 families, with just a few assembly modifications. The module can be coupled to both AC and DC power line buses and also includes a USB interface for optional PC connection. Features • Insulation from the high voltage mains • Interfaces included: – USB interface – Dual DC power supply – Digital interface – DC or AC insulated bus interface • OFDM PRIME compliant with 128 kbps bitrate • RoHS compliant May 2014 DocID025672 Rev 1 For further information contact your local STMicroelectronics sales office. 1/7 www.st.com Schematic diagram 1 STEVAL-IPP004V1 Schematic diagram Figure 1. Power supply connector and power indication CN2 MORSV350P-3P-W E2141 VCC 3K9 2 DL1 1 LED-RED R4 470R 2 DL2 1 LED-GREEN 1 2 3 R3 VDDIO J1 VDDIO FB3 BLM21PG331SN1 CON3 1 VCC 2 3 FB4 BLM21PG331SN1 TP13 VSS VCC 5 1 C52 100nF/25V - 0402 R75 100K - 0603 JP9 OPEN 3 U5 IN OUT SHDN BYPASS 2 C55 100nF/25V - 0402 GND LK112SM33TR VDDIO 4 C53 C54 100nF/25V - 0402 10uF/6.3V0603 GSPG06112013DI1345 Figure 2. ST7590 control connections VDDIO PLC_RESETN TXD RXD DATA_INDn 1 2 3 4 5 6 JP7 JP8 1 2 3 4 PLC_RESETN_uC PLC_RXD PLC_TXD PLC_DATA_INDn GSPG06112013DI1350 2/7 DocID025672 Rev 1 STEVAL-IPP004V1 Schematic diagram TP10 GPIO0 TP7 GPIO1 TP5 GPIO2 Figure 3. ST7590 section VDDIO VDDIO TCK R79 10K ACTIVE-TEST_RX C42 100nF/X5R VDDIO 1 2 3 4 5 6 7 TCK 8 9 PLC_RESETN 10 11 VDD_2 12 TXD RXD 47K R24 TEST_TX DFU_FORCE ACTIVE-TEST_RX DFU_FORCE 1 1 EXT_TX 1 EXT_TXn DATA_INDn VDDIO TP9 TP4 TP3 VDD_REG_1V8 PA_OUT C19 GPIO6 GPIO7 GPIO8 100nF/X5R R14 0R VDDIO 49 FB6 VSSA VSS BLM21PG331SN1 NC VCC C14 10uF/25V/X5R C21 100nF/25V/X5R VDD_PLL TP1 CL CL 1 C29 1nF/X5R C33 4.7uF/4V/X5R 0R VCCA C27 100nF/X5R C37 R17 180R C18 100pF/C0G 10uF/10V/X5R GSPG06112013DI1355 Figure 4. Optional isolated zero crossing detection circuit VDDIO R30 10M R16 47K R1 33K L 1 R6 100K 2 C15 100nF 3 ZC_IN R33 NC R2 33K VDDIO 4 TP11 ZC_IN 1 VDD_2 FB1 BLM18AG331SN1D Y2 R43 C38 10nF/X5R 8MHZ_MCO ZC_IN RX_IN TX_OUT PA_IN+ PA_INCL VCC C&K-KSR213G 36 35 34 33 32 31 30 29 28 27 26 25 GPIO5 VDD_12V VDDIO GND GPIO6 GPIO7 GPIO8 GPIO9 VDDIO VDD_REG_1V8 PA_OUT VSS MOSI0_TXD MISO0_RXD VDDIO TRSTN TMS GND TCK TDO TDI RESETN VDD XIN 13 14 15 16 17 18 19 20 21 22 23 24 R44 2 SW 5 U2 ST7590 C41 100nF/X5R NC 1 R45 100k VDDIO R25 C16 10uF/6.3V TXD 10K NC ACTIVE-TEST_RX DL4 1 C9 100nF/X5R 10K 560R LED-RED 2 R51 EP R41 R42 R47 C7 10uF/6.3V GPIO0 RESERVED2 RESERVED1 RESERVED0 VDD_1 C28 100nF/X5R DL3 1 LED-GREEN 2 560R C10 100nF/X5R 8 7 6 5 1 1 1 RN3 10K RX_GAINn TEST_TX GPIO2 RESERVED3 VDDIO RESERVED0 RESERVED1 RESERVED2 GPIO0 RESERVED3 GPIO2 TEST_TX RX_GAINn 1 2 3 4 8 7 6 5 R37 10K 48 47 46 45 44 43 42 41 40 39 38 37 RN2 10K DATA_INDn EXT_TXn EXT_TX SCLK0 SSN0 VDD GND MISO1 MOSI1_SDA SCLK1_SCL GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 1 2 3 4 8 7 6 5 XOUT GND VSSA VDD_PLL VCCA ZC_IN RX_IN TX_OUT PA_IN_P PA_IN_N CL VCC RN1 10K C43 100nF/X5R 1 2 3 4 ISO1 TLP781(GB) R7 33K D4 2 1 N STTH1L06A GSPG06112013DI1400 DocID025672 Rev 1 3/7 7 TX_OUT C22 R26 51K 1% R21 47K 1% R19 4K02 1% 0R R27 C23 1nF/C0G PA_IN+ PA_IN- PA TP2 PA_OUT TP6 RX_IN RX_IN 27K 10K C13 100nF/16V/X7R R13 4.7pF/C0G C6 R18 27pF/C0G C12 CLOSE JP2 C1 VCC L4 (alternative to L2): LQH43CN471K03L NC B82462G4474M000 15nF/25V/X7R C11 D2 STPS1L30A 10uF/25V/X7R C2 D3 STPS1L30A L4 RX_LC 100nF/25V/X5R L3 CLOSE JP3 PA_ADC RX_IN_CAP 10nF/16V/X7R C20 R9 4K7 1% 0R R8 R10 18K7 1% PA_OUT 24K 1% R12 VCC 1 2 1 2 C17 100nF 100nF/16V/X7R JP4 CLOSE TP8 TX_OUT 1 1 1 DocID025672 Rev 1 1 4 T1A 8 5 N PRI NC L2 SEC 4 1 W E 750-510-231 7 10 T1 L N J2 CON2 B82464G4-15uH PRI L1 TDK SRW 13EP-X07S002 / W E 750-510-231 D5 SMAJ5.0CA R5 100R CLOSE JP1 SEC Footprint options 1 2 4/7 J3 CON2 2 1 VCC 470nF X1 NC C5 C4 CN1 MORSV-508-2P 2 1 D1 SM6T15CA NC C3 Footprint options N L Schematic diagram STEVAL-IPP004V1 Figure 5. Power line coupling section GSPG06112013DI1405 VCC_3V3 Y3 32.768 Khz 3 1 C57 10pF SW 6 OSC-32-OUT OSC-32-IN PLC_DATA_INDn PLC_RESETN_uC PLC_TXD PLC_RXD 2 R32 R31 R11 Y1 8MHz VBAT PC0 4K7 4K7 3K9 STM32_NRST C8 10pF VBAT PC13/TAMP/RTC PC14/OSC32-IN PC15/OSC32-OUT PD0/OSC-IN PD1/OSC-OUT NRST PC0 STM32F103RGT7 PC1 PC2 PC3 VSSA VDDA PA0-WKUP PA1 PA2 R58 TP12 BOOT0 VDD2 VSS2 PA13 PA12 PA11 PA10 PA9 PA8 PC9 PC8 PC7 PC6 PB15 PB14 PB13 PB12 PB2 C45 100nF 10K 1 3 5 7 9 VDDIO 8MHZ_MCO CON10A J7 2 4 6 8 10 STM32 JTAG CONNECTOR SW 3 C&K-KSR213G 10K R68 R69 VDDIO VDDIO C46 10uF/6.3V VDDIO 48 47 VSS2 46 45 STM32_USB+ 44 STM32_USB43 PA10 42 PA9 41 R62 0R 40 PC9 39 PC8 38 PC7 37 PC6 36 PB15 35 PB14 34 PB13 33 PB12 BOOT0 C26 100nF C51 10nF/25V - 0402 VSS2 C&K-KSR213G SW 2 0 - 0603 R60 C44 10pF PA_ADC remove R? and R? for STM32F4 or STM32F2 C49 10nF/25V - 0402 VSS1 PA_ADC PA4 PA5 PA6 PA7 PB0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 VDDIO 0 - 0603 CL_ADC VBAT 100nF/X5R U3 1 LED-GREEN 2 DL5 470R R55 C34 1 LED-YELLOW 2 DL6 VDDIO 1 LED-RED 2 DL7 470R 470R OSC-32-IN OSC-32-OUT V1 BATTERY HOLDER RS: 430-653 PLUS CR1220 lithium coin cell C56 10pF 20pF C24 ACTIVE-TEST_RX TEST_TX CL DFU_FORCE 20pF SW 4 10k R74 C25 C&K-KSR213G VDDIO 1 2 R59 PC4 PC5 R71 C50 100nF/X5R R66 1 2 VDDIO PC11 PC10 1 2 C48 100nF/X5R 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 VDD3 VSS3 PB9 PB8 BOOT0 PB7 PB6 PB5 PB4 PB3 PD2 PC12 PC11 PC10 PA15 PA14 PA3 VSS4 VDD4 PA4 PA5 PA6 PA7 PC4 PC5 PB0 PB1 PB2 PB10 PB11 VSS1 VDD1 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 100K - 0402 DocID025672 Rev 1 2 PB8 PB9 PA4 PA5 PA6 PA7 PA9 PA10 J_TMS J_TCK J_TDO J_TDI STM32_NRST R76 R77 R78 4.7k - 04024.7k - 04024.7k - 0402 2 Male Connector 2x5 Pitch 1.27 mm SAMTEC FTSH-105-01-F-D-K 1 J_TDO J_TRSTN VSS1 2 J_TCK J_TDI 1 J_TMS 1 PB0 PC6 PB2 PC0 PC4 PC5 1 2 3 4 5 6 7 8 9 10 11 12 R49 1 2 3 4 5 6 7 8 9 10 11 12 VDDIO DIGITAL_B J6 1.5K - 0402 R52 22R - 0402 R50 22R - 0402 Strip-Line DIGITAL_A J5 STM32_USB+ STM32_USB- 1 2 3 U4 VBUS I/O1#6 PC7 PC8 PC9 PB8 PB9 PC10 PC11 PB12 PB13 PB14 PB15 100nF/25V - 0603 C47 6 5 4 STM32_USB_PW R I/O2#4 USBLC6-2P6 I/O1#1 GND I/O2#3 SH2 SH1 CN3 MINI-USB BLM21PG600SN1D FB5 1 2 3 4 5 STEVAL-IPP004V1 Schematic diagram Figure 6. STM32 section GSPG06112013DI1410 5/7 7 Revision history 2 STEVAL-IPP004V1 Revision history Table 1. Document revision history 6/7 Date Revision 30-May-2014 1 Changes Initial release. DocID025672 Rev 1 STEVAL-IPP004V1 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. 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