STEVAL-ISQ003V1

STIL ® AC INRUSH CURRENT LIMITER ASD APPLICATIONS TAB ■ ■ High power density switching power supply Server and Telecom power supplies Game station power supplies High end TV displays Portable equipment adaptators ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O ■ ■ ■ 5 23 ■ ■ ■ ■ Replaces two diodes of the bridge in steady state Dual unidirectional switches in a single package Inrush current limitation circuit for off-line power supply Designed for instantaneous response after AC line drop out or browning Surge current capability as per IEC61000-4-5 Low consumption (IPt= 20mA) ■ High noise immunity: dV/dt> 1000V/µs @ Tj=125°C Low reverse current losses Integrated pilot driver of the power switches Suitable where efficiency and space are critical ■ 4 5 PENTAWATT STIL06-T5 TAB ■ ■ 2 3 TAB 1 4 5 1 2 3 4 5 PENTAWATT STIL08-T5 Table 1: Order Codes Part Number Marking STIL04-P5 STIL04P5 STIL04-T5 STIL04T5 STIL06-T5 STIL06T5 STIL08-T5 STIL08T5 Table 2: Pin Out Description Pin out designation L Pt1 OUT Pt2 N Figure 1: Block diagram 2 3 PENTAWATT STIL04-T5 BENEFITS ■ 1 PENTAWATT HV2 STIL04-P5 FEATURES ■ 4 1 Description Position AC Line (switch1) 1 Drive of power switch 1 2 Output 3 Drive of power switch 2 4 AC Neutral (switch 2) 5 Figure 2: Basic connection Inrush resistor L L DRIVER Pt1 + OUT Pt2 + AC in Auxil. Supply Pt1 + OUT Pt2 Main Converter VOUT N N ASD: Application Specific Devices. December 2005 REV. 5 1/11 STIL FUNCTIONAL DESCRIPTION IN A PFC BOOST PRE-REGULATOR The STIL is connected in parallel with the diode bridge and the inrush power resistor. During start up, the two unidirectional ASD power switches of the STIL are open (Figure 3). The inrush current flows through the diodes of the bridge and external inrush power resistor. When the PFC reaches steady state, the auxiliary power supply coupled with the main transformer, supplies the energy required to feed the driver of the two power switches of the STIL (Figure 4). In steady state, the two DC ground connected diodes of the bridge rectifier and the two unidirectional switches of the STIL connected to DC+ rectify the AC line current. Figure 3: Function description at turn-on ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O pt1 DRIVER I I + pt2 Auxiliary Power I + - AC in OUT Bridge Inrush resistor Figure 4: Function description in steady state pt1 DRIVER I I + pt2 Auxiliary Power AC in I + - OUT Bridge Inrush resistor POWERFAIL FEATURE When the STIL is used with a PFC boost converter, the inrush current circuit is active after an AC line dropout. In that configuration, since the AC line disappears, the PFC controller and the auxiliary power supply of the STIL (Figure 8) turns OFF. The two switches of the STIL are open. The output bulk capacitor Cb is discharging and it is providing the energy to the main converter. When the AC line recovers, the two switches remain opened and recharging inrush current of the capacitor Cb is deviated and limited through the resistor Ri. When the capacitor had finished charging, the PFC turns ON again and the two switches of the STIL switch ON. More details on the design and operation of the driver circuit of figure 5 can be found in the application note “AN1600 - STIL: Inrush Current Limitation Device for Off-Line Power Converter”. 2/11 STIL Table 3: Absolute Maximum Ratings (limiting value) Symbol Value Parameter STIL04 STIL06 STIL08 VDOUT Repetitive forward off-state voltage, between terminals L or N and OUT terminal Tj = 0 to 150°C VROUT Repetitive reverse off-state voltage, between OUT terminals and terminals L or N Tj = 0 to 150°C Iout(AV) Average on state current at the OUT terTj = 150°C minal (180° conduction angle for the internal power switches) 700 700 800 Unit V 800 V ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O Iout(RMS) ITSM I2t dIout/dt 4 6 8 A 4.4 6.7 8.9 A Non repetitive surge peak on-state curt = 10ms rent for each AC input terminals L and N p sinusoidal (Tj initial = 25°C) 65 70 100 A I2t value - rating for fusing tp = 10ms 21 24 50 A 2s Critical rate of rise of on state current IPt1 + IPt2 = 20mA Tj = 0 to 150°C RMS on state current at the OUT terminal (180° conduction angle for the internal power switches) Tj = 150°C 100 A/µs Tstg Storage temperature range -40 to +150 °C Tj Junction temperature range 0 to +150 °C Table 4: Thermal Parameters Symbol Parameter Value Rth(j-c) Junction to case 2 Rth(j-a) Junction to ambient 60 Unit °C/W 3/11 STIL Table 5: Electrical Characteristics Values Symbol Parameter Test conditions STIL04 STIL06 STIL08 Unit Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. IPt1 + IPt2 VD(Pt1) VD(Pt2) Driver trigger current T = 0°C VDout = 12V(DC) j RL = 30Ω Tj = 25°C Direct driver trigger voltage Tj = 0°C 0.6 VDout = 12V(DC) Tj = 25°C RL = 30Ω Tj = 150°C 0.2 12 20 12 20 12 20 mA 10 10 10 0.85 1 0.85 1 0.8 1 0.8 0.95 0.8 0.95 0.75 0.9 V ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O VR(Pt1) VR(Pt2) Maximum repetitive reverse driver T = 25°C j voltage 500 500 Tj = 125°C 1000 1000 1000 Tj = 25°C VRout = 800V IPt1 = IPt2 = open T = 150°C j Max reverse IRout (on)* current with driver current VRout = 400V T = 150°C IPt1 = IPt2 = 10mA j Rd VF ** Dynamic resistance for one power switch Pulse test: * tp = 300 ms, δ < 2% ** tp = 380 µs, δ < 2% 4/11 5 5 5 300 300 300 300 300 300 0.75 0.9 0.75 55 V 0.9 80 Tj = 150°C 45 50 mΩ 30 0.95 µA 0.9 Tj = 150°C Tj = 150°C V µA Iout(AV) = 8A Iin = 4A Forward voltage Iin = 6A drop for one power switch Iin = 8A 0.4 V/µs 0.75 Iout(AV) = 4A Iout(AV) = 6A 0.2 Tj = 150°C 500 Max reverse IRout (off)* current without driver current 8 0.45 8 Linear slope up to VDout = 470V Vt0 0.2 8 dVDout/dt Dynamic voltage rising Iout(AV) = 4A Threshold direct voltage for one Iout(AV) = 6A power switch Iout(AV) = 8A 0.45 40 1.4 1.05 1.35 0.97 1.2 V STIL POWER LOSSES CALCULATION When the input current is sinusoidal (case of PFC), the conducted power losses can be calculated by using the following formula: 2 ( I out ( AV ) × π ) P tot = V t0 ⋅ I out ( AV ) + R d ⋅ ------------------------------------8 If the output average current is 8Amps, Vt0 and Rd of the electrical characteristics table can be used. For different output current please refer to the application note AN1600 that provides guidelines to estimate the correct values of Vt0 and Rd. LIGHTNING SURGE IMMUNITY (IEC61000-4-5) ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O During lightning surge transient voltage across the AC line, over current and over voltage stress are applied on all the components of the power supply. The STIL can sustain a maximum peak surge current up to IPEAK (IPEAK = 500A for STIL04/STIL06 and IPEAK = 1000A for STIL08) as defined by the combine waveform generator (8/20µs waveform as shown in figures 5, 6 and 7). Special recommendations for the lightning surge immunity: 1 - Check that the IPEAK in the STIL stays below the limit specified above. 2 - Check that no over voltages are applied on the STIL and the bridge diode. 3 - In order to reduce the dynamic current stress (dIout/dt) through the structure of the STIL, it is recommended to connect a differential mode choke coil in front of the STIL and the bridge diode. More details and design guidelines are provided in the application note “AN1600 - STIL: Inrush Current Limitation Device for Off-Line Power Converter”. Figure 5: Surge test condition IEC61000-4-5 L + OUT DRIVER STIL Pt 1 5Vdc Pt 2 Coupling network + surge generator N 0 VOUT (level 1, 2, 3 or 4) IOUT Figure 6: Surge test characterisation for STIL04/06 Figure 7: Surge test characterisation for STIL08 IEC61000-4-5 1 IEC61000-4-5 1 5 µs 80A/Div IOUT Ipeak=500A 5 µs 160A/Div IOUT Ipeak=1000A Ipeak 1 0 Amps Ipeak 1 0 Amps 8 µs 8 µs 20 µs 20 µs 5/11 STIL L Figure 8: Basic connection with a PFC boost preregulator R1 DRIVER Pt1 Pt2 + OUT N R2 C2 C0 R + - AC in C1 Inrush resistor Vout ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O Cb Auxiliary windows (see application note AN1692) Figure 9: Non repetitive surge peak on-state current (sinusoidal pulse) and corresponding value of I2t (Tj initial = 25°C) PFC Control Figure 10: Non repetitive surge peak on-state current (sinusoidal pulse) and corresponding value of I2t (Tj initial = 150°C) ITSM(A), I²t(A²s) ITSM(A), I²t(A²s) 1000 1000 Tj initial=25°C ITSM Tj initial=150°C ITSM STIL08 STIL08 STIL04/STIL06 100 100 STIL08 STIL04/STIL06 I²t I²t STIL08 10 10 STIL04/STIL06 STIL04/STIL06 tp(ms) tp(ms) 1 1 0.01 0.10 1.00 0.01 10.00 Figure 11: Relative variation of driver trigger current versus junction temperature (typical values) IPt1 or IPt2 [Tj] / IPt1 or IPt2 [Tj = 25°C] 1.3 1.00 10.00 Figure 12: Relative variation of direct pilot trigger voltage versus junction temperature (typical values) 1.2 1.4 0.10 VDPt1 or VDPt2 [Tj] / VDPt1 or VDPt2 [Tj = 25°C] 1.1 1.2 1.0 1.1 1.0 0.9 0.9 0.8 0.8 0.7 0.7 0.6 0.6 0.5 0.4 0.5 0.3 Tj(°C) Tj(°C) 0.4 0.2 0 6/11 25 50 75 100 125 150 0 25 50 75 100 125 150 STIL Figure 13: Relative variation of thermal impedance junction to case versus pulse duration Figure 14: Reverse current versus junction temperature without driver current (typical values) K = [Zth(j-c)/Rth(j-c)] IR(OUT)OFF(µA) 1.0 1.E+02 Pt1 & Pt2 open 0.9 STIL04 0.8 STIL06/STIL08 VR(OUT)=800V 1.E+01 0.7 STIL06/STIL08 0.6 1.E+00 STIL04 VR(OUT)=400V 0.5 1.E-01 0.4 ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O 0.3 1.E-02 0.2 0.1 Tj(°C) tp(s) 0.0 1.E-04 1.E-03 1.E-02 1.E-03 1.E-01 1.E+00 0 1.E+01 Figure 15: Reverse current versus junction temperature with driver current (typical values) (STIL04) 25 50 75 100 125 150 Figure 16: Reverse current versus junction temperature with driver current (typical values) (STIL06) IR(OUT)ON(µA) IR(OUT)ON(µA) 100.0 200 STIL04 IPt1=Ipt2=10mA VR(OUT)=400V STIL06 IPt1=Ipt2=10mA VR(OUT)=400V 190 180 170 10.0 160 150 140 130 Tj(°C) 1.0 Tj(°C) 120 0 25 50 75 100 125 150 Figure 17: Reverse current versus junction temperature with driver current (typical values) (STIL08) 0 25 50 75 100 125 150 Figure 18: Forward voltage drop for one power switch versus junction temperature (typical values) VF(V) IR(OUT)ON(µA) 1.16 220 STIL08 IPt1=Ipt2=10mA VR(OUT)=400V 1.14 1.12 STIL06 Iout=6A 1.10 200 1.08 STIL08 Iout=8A 1.06 1.04 180 1.02 1.00 STIL04 Iout=4A 0.98 160 0.96 Tj(°C) Tj(°C) 0.94 140 0.92 0 25 50 75 100 125 150 0 25 50 75 100 125 150 7/11 STIL Figure 19: Peak forward voltage drop versus peak forward output current for one power switch (typical values) (STIL04) Figure 20: Peak forward voltage drop versus peak forward output current for one power switch (typical values) (STIL06) IOUT(A) IOUT(A) 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 12 11 STIL04 10 9 8 Tj=150°C 7 Tj=25°C 6 5 4 STIL06 Tj=150°C Tj=25°C ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O 3 2 1 VF(V) 0 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 Figure 21: Peak forward voltage drop versus peak forward output current for one power switch (typical values) (STIL08) VF(V) 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 Figure 22: Relative variation of dV/dt immunity versus junction temperature (typical values) IOUT(A) {dVD(OUT) [Tj] / dt} / {dVD(OUT) [Tj=150°C] / dt} 20 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 STIL08 18 VDout=470V 16 Tj=150°C 14 12 Tj=25°C 10 8 6 4 2 VF(V) Tj(°C) 0 0.0 8/11 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 25 50 75 100 125 150 STIL Figure 23: PENTAWATT HV2 Package Mechanical Data DIMENSIONS A REF. C Millimeters Min. Max. Min. Max. A 4.19 7.70 0.165 0.185 C 1.14 1.40 0.044 0.055 D 2.5 2.72 0.098 0.107 E 0.38 0.51 0.015 0.020 H2 L7 L6 Inches ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O D F L3 E 0.66 0.82 0.026 0.032 G 2.54 Typ. 0.10 Typ. G2 7.62 Typ. 0.30 Typ. H2 10.04 L3 10.29 23.5 Typ. L6 9.90 10.16 0.395 0.405 0.925 Typ. 0.389 0.400 F G L7 G2 1.52 Typ. 0.059 Typ. Figure 24: PENTAWATT Terminals Package Mechanical Data DIMENSIONS REF. H2 A L8 L7 L6 L3 Max. Min. Max. A 4.19 7.70 0.165 0.303 C 1.14 1.40 0.045 0.055 D 2.5 2.72 0.098 0.107 E 0.38 0.51 0.015 0.020 F 0.66 0.82 0.026 0.032 G 2.54 Typ. 0.100 Typ. G2 7.62 Typ. 0.300 Typ. H2 D L3 E G G2 9/11 F Inches Min. Diam C Millimeters 10.03 10.29 28.68 Typ. 0.394 0405 1.129 Typ. L6 8.23 8.49 0.324 0.334 L7 6.15 6.25 0.242 0.246 L8 Diam. 2.74 Typ. 3.71 3.96 0.108 Typ. 0.146 0.156 STIL In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. Table 6: Ordering Information Part Number Marking Package Weight Base qty Delivery mode STIL04-P5 STIL04P5 PENTAWATT HV2 1.9 g 50 Tube STIL04-T5 STIL04T5 PENTAWATT 3g 50 Tube STIL06-T5 STIL06T5 PENTAWATT 3g 50 Tube STIL08-T5 STIL08T5 PENTAWATT 3g 50 Tube ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O ■ ■ ■ Epoxy meets UL94, V0 Cooling method: by conduction (C) Recommended torque value: 0.8 Nm. Table 7: Revision History Date Revision October-2002 3A Description of Changes 23-Nov-2004 4 STIL08-T5 added 06-Dec-2005 5 STIL04-T5 and STIL06-T5 added. ECOPAK statement added Last update. 10/11 STIL ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. 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