STEVAL-OET001V1

STEVAL-OET001V1 LCP154DJF board to validate lightning protection for SLIC transceivers Data brief Description The STEVAL-OET001V1 board is designed to validate lightning protection for SLIC transceivers. The maximum peak pulse current for different waveform is given in the LCP154DJF datasheet. The STEVAL-OET001V1 is able to protect 4 lines; several boards can be used if the number of lines is higher. Features     4 line protection for SLIC transceivers Compliant with ITU-T K20/21/45 and GR1089-Core Programmable transient suppressor RoHS compliant August 2016 The STEVAL-OET001V1 board specifications comply with ITU-T K20/21/45 and GR1089-Core associated with Cooper Bussmann Telecom Circuit Protector fuse TCP 1.25 A. DocID029614 Rev 1 For further information contact your local STMicroelectronics sales office 1/6 www.st.com Schematic diagrams 1 STEVAL-OET001V1 Schematic diagrams The following figure shows the board schematic. Each line has 1 x LCP154DJF, 1 x 220 nF capacitor connected between GND and GATE, 1 female RJ11 to be connected to the line (written on demo board: LINE1, LINE2, LINE3 and LINE4) and 1 female RJ11 to be connected to the SLIC (written on board SLIC1, SLIC 2, SLIC3 and SLIC4). 2/6 DocID029614 Rev 1 220n C1 220n C2 PLUG 4 mm 1 GND2 U2 F3 FUSE LINE2 SLIC1 SLIC2 F4 FUSE PLUG 4 mm 1 GATE2 LCP154DJF J4 PLUG 4 mm 1 GATE1 LCP154DJF F2 FUSE J3 J2 PLUG 4 mm 1 GND1 U1 F1 FUSE LINE1 1 2 3 4 5 6 1 2 3 4 5 6 LINE3 220n C3 PLUG 4 mm 1 GND3 U3 F5 FUSE J5 PLUG 4 mm J6 SLIC3 1 GATE3 LCP154DJF F6 FUSE LINE4 220n C4 PLUG 4 mm 1 GND4 U4 F7 FUSE J7 J8 SLIC4 F8 FUSE PLUG 4 mm 1 GATE4 LCP154DJF 1 2 3 4 5 6 J1 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 DocID029614 Rev 1 1 2 3 4 5 6 STEVAL-OET001V1 Figure 1: STEVAL-OET001V1 circuit schematic Schematic diagrams GSPG1507160920SG The figure below shows the connection of LCP154DJF associated with a SLIC. 3/6 Schematic diagrams STEVAL-OET001V1 Figure 2: LCP154DJF connections Application note AN4876 available on www.st.com provides further LCP154DJF implementation and performance details. 4/6 DocID029614 Rev 1 STEVAL-OET001V1 2 Revision history Revision history Date Version 05-Aug-2016 1 Table 1: Document revision history Changes Initial release. DocID029614 Rev 1 5/6 STEVAL-OET001V1 IMPOR TA N T NOTIC E – PLEASE READ CAREFU LL Y STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications , and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2016 STMicroelectronics – All rights reserved 6/6 DocID029614 Rev 1