STEVAL-PCC009V4
Opto-isolated universal USB to serial bridge demonstration board
for motor control applications
Data brief
Features
■
STM32-based demonstration board used as
the interface between the PC and motor control
systems
■
8-pin interface for SPI/I2C/UART
■
6 GPIOs available
■
Opto-isolation on SPI, USART and GPIOs
■
Magnetic isolation for I2C
■
RoHS compliant
STEVAL-PCC009V4
Description
The STEVAL-PCC009V4 demonstration board
implements a universal USB on the serial isolated
interface communication. It is useful in all
applications which need safe connection from PC
to the application boards.
The STEVAL-PCC009V4 has a 16-pin
communication interface which allows connecting
a device that uses I2C, SPI or UART protocols.
Thus, the board functions as a bridge between a
serial communication based device and a PC.
July 2012
Doc ID 022310 Rev 2
For further information contact your local STMicroelectronics sales office.
1/8
www.st.com
8
Doc ID 022310 Rev 2
AGND
C4
10uF
C8
100nF
VDDA
C5
10nF
C9
100nF
3V3
PC8
D1
STATUS
R10
360
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
C7
100nF
10uH
L1
AGND
VDDA
PA0_USART2_CTS
PA1_USART2_RTS
PA2_USART2_TX
STM32F103RBT6
VDD_1
VSS_1
PB11
PB10
PB2
PB1
PB0
PC5
PC4
PA7
PA6
PA5
PA4
VDD-4
VSS_4
PA3
C6
100nF
R9
0
C3
100nF
3V3
VSS_2
PA13
PA12
PA11
PA10
PA9
PA8
PC9
PC8
PC7
PC6
PB15
PB14
PB13
PB12
PA14
PA15
PC10
PC11
PC12
PD2
PB3
PB4
PB5
PB6
PB7
BOOT0
PB8
PB9
VSS_3
VDD_3
VBAT
PC13-TAMPER-RTC
PC14-OSC32_IN
PC15-OSC32_OUT
PD0 OSC_IN
PD1 OSC_OUT
NRST
PC0
PC1
PC2
PC3
VSSA
VDDA
PA0-WKUP
PA1
PA2
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
PC8
3V3
GND
PA13_TMS
USBDP
USBDM
Microcontroller section
R8
10k
OSC_IN
OSC_OUT
RESET#
PC0_GPIO_IN10
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Figure 1.
RESET#
OSC_OUT
3V3
PD2
PB3_TDO
PB4_NTRST
PB5_I2C1_SMBAI
PB6_I2C1_SCL
PB7_I2C1_SDA
BOOT0
PB8_TIM4_CH3
PB9_TIM4_CH4
GND
3V3
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
R7
1M
Schematics
SW1
SW _PB
Y1
8MHz
U1
1
3V3
3V3
OSC_IN
3V3
BOOT1_PB2
PA14_TCK
PA15_TDI
C2
22pF
C1
22pF
R6
0
R4
0
3V3
R3
0
R5
0
R2
100k
BOOT0
VDD_2
2/8
R1
100k
Schematics
STEVAL-PCC009V4
3V3
GND
BOOT1_PB2
PC5
PC4
PA7_SPI1_MOSI
PA6_SPI1_MISO
PA5_SPI1_SCK
PA4_USART2_CLK
3V3
GND
PA3_USART2_RX
AM10181V1
STEVAL-PCC009V4
JTAG interface
3V3
3V3
3V3
R16
10k
R36
4k7
PB3_TDO
RESET#
R19
10k
R20
10k
JTAG_20PIN
R37
4k7
R38
4k7
R39
4k7
PA14_TCK
PB4_NTRST
PA15_TDI
PA13_TMS
PA14_TCK
R18
10k
PA15_TDI
1
3
5
7
9
11
13
15
17
19
PA13_TMS
J1
2
4
6
8
10
12
14
16
18
20
PB4_NTRST
Figure 2.
Schematics
AM10182V1
Figure 3.
Mode selection switch
SW2
R15
100
2
PC5
1
3
C25
100nF
MODE SELECTION SWITCH
3V3
R17
10k
TP1
TP2
3V3
1
TEST POINT
1
TEST POINT
TP3
GND_T
1
TP4
VDD_T
TEST POINT
1
TEST POINT
AM10183v1
Doc ID 022310 Rev 2
3/8
R22
1M
4/8
1
2
3
4
5
PC4
USB_VCC
USBDM
USBDP
ID
USB_GND
USB_MINIB TYPE
SHELL
SHELL
SHELL
SHELL
Doc ID 022310 Rev 2
POWER
D2
5V0
USBDM
USBDP
C40
4.7uF
R23
360
1
2
3
I/O1
VBUS
I/O2
USBLC6-2P6
I/O1
GND
I/O2
U2
6
5
4
USBDM
3V3
USBDP
5V0
GND
3V3
R21
1k5
C44
100nF
PD2
C41
100nF
1
2
3
4
U3
NC
VOUT
VOUT
NC
LD1117D33TR
GND
VOUT
VOUT
VIN
8
7
6
5
3V3
3V3
C43
10uF
GND
Figure 4.
C42
4.7nF
6
7
8
9
J2
Schematics
STEVAL-PCC009V4
Power supply
AM10184v1
STEVAL-PCC009V4
Figure 5.
Schematics
Opto-isolator section
U4
3V3
PB9_TIM4_CH4
GND
1
2
3
4
VDD1
Vi
NC
GND1
VDD2
NC
Vo
GND2
8
7
6
5
VDD_T
U10
PB9_TIM4_CH4_DB
R24
47E
GND_T
3V3
PA0_USART2_CTS
GND
ACPL-072L
1
2
3
4
3V3
GND
1
2
3
4
VDD1
Vi
NC
GND1
VDD2
NC
Vo
GND2
8
7
6
5
1
2
3
4
VDD_T
PA1_USART2_RTS_DB
R31
47E
GND_T
1
2
3
4
VDD2
NC
Vo
GND2
8
7
6
5
VDD_T
GND_T
1
2
3
4
VDD_T
PA6_SPI1_MISO_DB
R32
47E
GND_T
1
2
3
4
GND
1
2
3
4
VDD1
Vi
NC
GND1
VDD2
NC
Vo
GND2
8
7
6
5
VDD2
NC
Vo
GND2
8
7
6
5
VDD2
NC
Vo
GND2
8
7
6
5
3V3
PA1_USART2_RTS
GND
VDD1
Vi
NC
GND1
3V3
PA6_SPI1_MISO
GND
ACPL-072L
VDD1
Vi
NC
GND1
VDD2
NC
Vo
GND2
8
7
6
5
3V3
PA3_USART2_RX
GND
U13
PC0_GPIO_IN10_DB
VDD_T 1
2
3
GND_T
4
R33
47E
VDD1
Vi
NC
GND1
3V3
PC0_GPIO_IN10
GND
ACPL-072L
U8
3V3
8
7
6
5
PA0_USART2_CTS_DB
U12
PA2_USART2_TX_DB
R26
47E
GND_T
ACPL-072L
PA4_USART2_CLK
VDD2
NC
Vo
GND2
R30
47E
VDD_T
U7
R27
47E
8
7
6
5
GND_T
ACPL-072L
VDD1
Vi
NC
GND1
ACPL-072L
PA3_USART2_RX_DB
VDD2
NC
Vo
GND2
VDD_T
U11
PB8_TIM4_CH3_DB
R25
47E
GND_T
U6
GND
8
7
6
5
VDD_T
ACPL-072L
3V3
PA2_USART2_TX
VDD2
NC
Vo
GND2
ACPL-072L
U5
PB8_TIM4_CH3
VDD1
Vi
NC
GND1
VDD1
Vi
NC
GND1
VDD2
NC
Vo
GND2
8
7
6
5
VDD_T
PA4_USART2_CLK_DB
R28
47E
GND_T
U14
3V3
PA7_SPI1_MOSI
1
2
3
4
ACPL-072L
GND
VDD1
Vi
NC
GND1
VDD_T
GND_T
R34
47E
PA7_SPI1_MOSI_DB
ACPL-072L
U9
3V3
PA5_SPI1_SCK
GND
1
2
3
4
VDD1
Vi
NC
GND1
VDD2
NC
Vo
GND2
8
7
6
5
VDD_T
PA5_SPI1_SCK_DB
R29
47E
GND_T
U15
VDD_T
PB5_I2C1_SMBAI_DB
R35
47E
ACPL-072L
GND_T
1
2
3
4
VDD1
Vi
NC
GND1
3V3
PB5_I2C1_SMBAI
GND
ACPL-072L
3V3
R11
10k
VDD_T
R12
10k
C46
100nF
C45
100nF
R13
10k
R14
10k
U16
3V3
1
2
3
4
PB7_I2C1_SDA
PB6_I2C1_SCL
GND
C10
DNM
VDD1
Vi
NC
GND1
VDD2
NC
Vo
GND2
8
7
6
5
VDD_T
PB7_I2C1_SDA_DB
PB6_I2C1_SCL_DB
GND_T
ADUM1250SRZ
C11
DNM
C12
DNM
GND
C13
DNM
GND_T
3V3
GND
C14
100nF
C15
100nF
C16
100nF
C17
100nF
C18
100nF
C19
100nF
C20
100nF
C21
100nF
C22
100nF
C23
100nF
C24
100nF
C26
100nF
C27
100nF
C28
100nF
C29
100nF
C30
100nF
C31
100nF
C32
100nF
C33
100nF
C34
100nF
C35
100nF
C36
100nF
C37
100nF
C38
100nF
VDD_T
GND_T
AM10185v1
Doc ID 022310 Rev 2
5/8
Schematics
STEVAL-PCC009V4
Figure 6.
16-pin communication interface
J3
PA0_USART2_CTS_DB
PA2_USART2_TX_DB
PA4_USART2_CLK_DB
PA6_SPI1_MISO_DB
PB7_I2C1_SDA_DB
PB5_I2C1_SMBAI_DB
PB8_TIM4_CH3_DB
VDD_T
1
3
5
7
9
11
13
15
2
4
6
8
10
12
14
16
PA1_USART2_RTS_DB
PA3_USART2_RX_DB
PA5_SPI1_SCK_DB
PA7_SPI1_MOSI_DB
PB6_I2C1_SCL_DB
PB9_TIM4_CH4_DB
PC0_GPIO_IN10_DB
GND_T
CON16A
C39
100nF
AM10186V1
6/8
Doc ID 022310 Rev 2
STEVAL-PCC009V4
2
Revision history
Revision history
Table 1.
Document revision history
Date
Revision
Changes
04-Oct-2011
1
Initial release.
16-Jul-2012
2
Updated cover page.
Minor text changes.
Doc ID 022310 Rev 2
7/8
STEVAL-PCC009V4
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