STF10N60DM2

STF10N60DM2 N-channel 600 V, 0.440 Ω typ., 8 A MDmesh™ DM2 Power MOSFET in a TO-220FP package Datasheet - production data Features VDS @ TJmax. RDS(on) max. ID PTOT STF10N60DM2 650 V 0.530 Ω 8A 25 W   3 1 Order code 2     TO-220FP Fast-recovery body diode Extremely low gate charge and input capacitance Low on-resistance 100% avalanche tested Extremely high dv/dt ruggedness Zener-protected Figure 1: Internal schematic diagram Applications  Switching applications Description This high voltage N-channel Power MOSFET is part of the MDmesh™ DM2 fast recovery diode series. It offers very low recovery charge (Qrr) and time (trr) combined with low RDS(on), rendering it suitable for the most demanding high efficiency converters and ideal for bridge topologies and ZVS phase-shift converters. Table 1: Device summary Order code Marking Package Packing STF10N60DM2 10N60DM2 TO-220FP Tube June 2016 DocID029381 Rev 1 This is information on a product in full production. 1/12 www.st.com Contents STF10N60DM2 Contents 1 Electrical ratings ............................................................................. 3 2 Electrical characteristics ................................................................ 4 2.1 Electrical characteristics (curves) ...................................................... 6 3 Test circuits ..................................................................................... 8 4 Package information ....................................................................... 9 4.1 5 2/12 TO-220FP package information ........................................................ 9 Revision history ............................................................................ 11 DocID029381 Rev 1 STF10N60DM2 1 Electrical ratings Electrical ratings Table 2: Absolute maximum ratings Symbol VGS Parameter Gate-source voltage Value Unit ±25 V Drain current (continuous) at Tcase = 25 °C 8 Drain current (continuous) at Tcase = 100 °C 5 IDM(1) Drain current (pulsed) 32 A PTOT W ID A Total dissipation at Tcase = 25 °C 25 dv/dt(2) Peak diode recovery voltage slope 40 dv/dt(3) MOSFET dv/dt ruggedness 50 VISO(4) Insulation withstand voltage (RMS) from all three leads to external heat sink 2.5 kV -55 to 150 °C Value Unit Tstg Tj Storage temperature range Operating junction temperature range V/ns Notes: (1) Pulse width is limited by safe operating area. (2) ISD ≤ 8 A, di/dt=900 A/μs; VDS peak < V(BR)DSS,VDD = 400 V (3) VDS ≤ 480 V. (4)t = 1 s; TC = 25 °C Table 3: Thermal data Symbol Parameter Rthj-case Thermal resistance junction-case Rthj-amb Thermal resistance junction-ambient 5 62.5 °C/W Table 4: Avalanche characteristics Symbol Parameter IAR(1) Avalanche current, repetitive or not repetitive EAS(2) Single pulse avalanche energy Value Unit 2 A 300 mJ Notes: (1) pulse width limited by Tjmax (2) starting Tj = 25 °C, ID = IAR, VDD = 50 V. DocID029381 Rev 1 3/12 Electrical characteristics 2 STF10N60DM2 Electrical characteristics (Tcase = 25 °C unless otherwise specified) Table 5: Static Symbol V(BR)DSS Parameter Test conditions Drain-source breakdown voltage VGS = 0 V, ID = 1 mA Min. Typ. Max. 600 Unit V VGS = 0 V, VDS = 600 V 1.5 VGS = 0 V, VDS = 600 V, Tcase = 125 °C(1) 100 Gate-body leakage current VDS = 0 V, VGS = ±25 V ±10 µA VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA 4 5 V RDS(on) Static drain-source onresistance VGS = 10 V, ID = 4 A 0.440 0.530 Ω Min. Typ. Max. Unit - 529 - - 28 - - 0.72 - IDSS Zero gate voltage drain current IGSS 3 µA Notes: (1)Defined by design, not subject to production test. Table 6: Dynamic Symbol Parameter Test conditions Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Coss eq.(1) Equivalent output capacitance VDS = 0 to 480 V, VGS = 0 V - 47 - pF RG Intrinsic gate resistance f = 1 MHz, ID = 0 A - 6.5 - Ω Qg Total gate charge - 15 - Qgs Gate-source charge - 3.7 - Qgd Gate-drain charge VDD = 480 V, ID = 8 A, VGS = 10 V (see Figure 15: "Test circuit for gate charge behavior") - 8 - VDS = 100 V, f = 1 MHz, VGS = 0 V pF nC Notes: (1) Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS. Table 7: Switching times Symbol td(on) tr td(off) tf 4/12 Parameter Turn-on delay time Rise time Turn-off delay time Fall time Test conditions Min. Typ. Max. VDD = 300 V, ID = 4 A RG = 4.7 Ω, VGS = 10 V (see Figure 14: "Test circuit for resistive load switching times" and Figure 19: "Switching time waveform") - 11 - - 5 - - 28 - - 11.5 - DocID029381 Rev 1 Unit ns STF10N60DM2 Electrical characteristics Table 8: Source-drain diode Symbol Parameter Test conditions ISD(1) Source-drain current ISDM(2) Source-drain current (pulsed) VSD(3) Forward on voltage trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current VGS = 0 V, ISD = 8 A ISD = 8 A, di/dt = 100 A/µs, VDD = 60 V (see Figure 16: "Test circuit for inductive load switching and diode recovery times") ISD = 8 A, di/dt = 100 A/µs, VDD = 60 V, Tj = 150 °C (see Figure 16: "Test circuit for inductive load switching and diode recovery times") Min. Typ. Max. Unit - 8 A - 32 A - 1.6 V - 90 ns - 225 µC - 5 A - 190 ns - 684 nC - 7.2 A Notes: (1) Limited by maximum junction temperature. (2) Pulse width is limited by safe operating area. (3) Pulse test: pulse duration = 300 µs, duty cycle 1.5%. Table 9: Gate-source Zener diode Symbol V(BR)GSO Parameter Test conditions Gate-source breakdown voltage IGS = ±250 µA, ID = 0 A Min. Typ. Max. Unit ±30 - - V The built-in back-to-back Zener diodes are specifically designed to enhance the ESD performance of the device. The Zener voltage facilitates efficient and cost-effective device integrity protection, thus eliminating the need for additional external componentry. DocID029381 Rev 1 5/12 Electrical characteristics 2.1 6/12 STF10N60DM2 Electrical characteristics (curves) Figure 2: Safe operating area Figure 3: Thermal impedance Figure 4: Output characteristics Figure 5: Transfer characteristics Figure 6: Gate charge vs gate-source voltage Figure 7: Static drain-source on-resistance DocID029381 Rev 1 STF10N60DM2 Electrical characteristics Figure 8: Capacitance variations Figure 9: Normalized gate threshold voltage vs temperature Figure 10: Normalized on-resistance vs temperature Figure 11: Normalized V(BR)DSS vs temperature Figure 12: Output capacitance stored energy Figure 13: Source-drain diode forward characteristics DocID029381 Rev 1 7/12 Test circuits 3 8/12 STF10N60DM2 Test circuits Figure 14: Test circuit for resistive load switching times Figure 15: Test circuit for gate charge behavior Figure 16: Test circuit for inductive load switching and diode recovery times Figure 17: Unclamped inductive load test circuit Figure 18: Unclamped inductive waveform Figure 19: Switching time waveform DocID029381 Rev 1 STF10N60DM2 4 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 4.1 TO-220FP package information Figure 20: TO-220FP package outline 7012510_Rev_K_B DocID029381 Rev 1 9/12 Package information STF10N60DM2 Table 10: TO-220FP package mechanical data mm Dim. Min. Max. A 4.4 4.6 B 2.5 2.7 D 2.5 2.75 E 0.45 0.7 F 0.75 1 F1 1.15 1.70 F2 1.15 1.70 G 4.95 5.2 G1 2.4 2.7 H 10 10.4 L2 10/12 Typ. 16 L3 28.6 30.6 L4 9.8 10.6 L5 2.9 3.6 L6 15.9 16.4 L7 9 9.3 Dia 3 3.2 DocID029381 Rev 1 STF10N60DM2 5 Revision history Revision history Table 11: Document revision history Date Revision 17-Jun-2016 1 DocID029381 Rev 1 Changes First release. 11/12 STF10N60DM2 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2016 STMicroelectronics – All rights reserved 12/12 DocID029381 Rev 1