STF11N60M2-EP
Datasheet
N-channel 600 V, 0.550 Ω typ., 7.5 A MDmesh™ M2 EP
Power MOSFET in a TO-220FP package
Features
1
2
3
TO-220FP
D(2)
Order code
VDS
RDS(on) max.
ID
STF11N60M2-EP
600 V
0.595 Ω
7.5 A
•
•
Extremely low gate charge
Excellent output capacitance (COSS) profile
•
•
•
Very low turn-off switching losses
100% avalanche tested
Zener-protected
Applications
•
Switching applications
G(1)
Description
S(3)
AM15572v1_no_tab
This device is an N-channel Power MOSFET developed using MDmesh™
M2 enhanced performance (EP) technology. Thanks to its strip layout and an
improved vertical structure, the device exhibits low on-resistance, optimized switching
characteristics with very low turn-off switching losses, rendering it suitable for the
most demanding very high frequency converters.
Product status
STF11N60M2-EP
Product summary
Order code
STF11N60M2-EP
Marking
11N60M2EP
Package
TO-220FP
Packing
Tube
DS11598 - Rev 4 - April 2018
For further information contact your local STMicroelectronics sales office.
www.st.com
STF11N60M2-EP
Electrical ratings
1
Electrical ratings
Table 1. Absolute maximum ratings
Symbol
Value
Unit
Gate-source voltage
±25
V
Drain current (continuous) at TC = 25 °C
7.5
A
Drain current (continuous) at TC = 100 °C
4.7
A
IDM(1)
Drain current (pulsed)
30
A
PTOT
Total dissipation at TC = 25 °C
25
W
dv/dt(2)
Peak diode recovery voltage slope
15
V/ns
dv/dt(3)
MOSFET dv/dt ruggedness
50
V/ns
VISO
Insulation withstand voltage (RMS) from all three leads to external
heat sink (t = 1 s, TC = 25 °C)
2.5
kV
Tstg
Storage temperature range
-55 to 150
°C
Value
Unit
5
°C/W
62.5
°C/W
Value
Unit
2.4
A
115
mJ
VGS
ID
Tj
Parameter
Operating junction temperature range
1. Pulse width limited by safe operating area.
2. ISD ≤ 7.5 A, di/dt ≤ 400 A/µs, VDS peak < V(BR)DSS, VDD = 400 V
3. VDS ≤ 480 V
Table 2. Thermal data
Symbol
Parameter
Rthj-case
Thermal resistance junction-case
Rthj-amb
Thermal resistance junction-ambient
Table 3. Avalanche characteristics
Symbol
IAR
EAS
DS11598 - Rev 4
Parameter
Avalanche current, repetitive or not repetitive
(pulse width limited by Tjmax)
Single pulse avalanche energy
(starting Tj = 25 °C, ID = IAR, VDD = 50 V)
page 2/14
STF11N60M2-EP
Electrical characteristics
2
Electrical characteristics
TC = 25 °C unless otherwise specified
Table 4. On/off states
Symbol
V(BR)DSS
Parameter
Test conditions
Drain-source breakdown voltage
VGS = 0 V, ID = 1 mA
Min.
Typ.
600
Zero gate voltage drain current
1
µA
100
µA
±10
µA
4
4.75
V
0.550
0.595
Ω
Min.
Typ.
Max.
Unit
-
390
-
pF
-
22
-
pF
-
0.7
-
pF
VGS = 0 V, VDS = 600 V,
TC = 125 °C (1)
IGSS
Gate-body leakage current
VDS = 0 V, VGS = ±25 V
VGS(th)
Gate threshold voltage
VDS = VGS, ID = 250 µA
RDS(on)
Static drain-source on-resistance
VGS = 10 V, ID = 3.75 A
Unit
V
VGS = 0 V, VDS = 600 V
IDSS
Max.
3.25
1. Defined by design, not subject to production test.
Table 5. Dynamic
Symbol
Parameter
Test conditions
Ciss
Input capacitance
Coss
Output capacitance
Crss
Reverse transfer capacitance
Coss eq. (1)
Equivalent output capacitance
VDS = 0 to 480 V, VGS = 0 V
-
49
-
pF
RG
Intrinsic gate resistance
f = 1 MHz, ID = 0 A
-
9
-
Ω
Qg
Total gate charge
VDD = 480 V, ID = 7.5 A,
-
12.4
-
nC
Qgs
Gate-source charge
VGS = 0 to 10 V
-
2.1
-
nC
Qgd
Gate-drain charge
(see Figure 15. Test circuit for gate
charge behavior)
-
6
-
nC
VDS= 100 V, f = 1 MHz,
VGS = 0 V
1. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0
to 80% VDSS
Table 6. Switching energy
Symbol
Parameter
Test conditions
VDD = 400 V, ID = 1 A,
E(off)
Turn-off energy
(from 90% VGS to 0% ID)
RG = 4.7 Ω, VGS = 10 V
VDD = 400 V, ID = 3 A,
RG = 4.7 Ω, VGS = 10 V
DS11598 - Rev 4
Min.
Typ.
Max.
Unit
-
2.5
-
µJ
-
9
-
µJ
page 3/14
STF11N60M2-EP
Electrical characteristics
Table 7. Switching times
Symbol
td(on)
tr
td(off)
tf
Parameter
Test conditions
Min.
Typ.
Max.
Unit
Turn-on delay time
VDD = 300 V, ID = 3.75 A,
-
9
-
ns
Rise time
RG = 4.7 Ω, VGS = 10 V
-
5.5
-
ns
Turn-off-delay time
(see Figure 14. Test circuit for
resistive load switching times and
Figure 19. Switching time
waveform)
-
26
-
ns
-
8
-
ns
Min.
Typ.
Max.
Unit
Fall time
Table 8. Source drain diode
Symbol
ISD
ISDM
(1)
VSD (2)
Parameter
Test conditions
Source-drain current
-
7.5
A
Source-drain current (pulsed)
-
30
A
1.6
V
Forward on voltage
VGS = 0 V, ISD = 7.5 A
-
trr
Reverse recovery time
ISD = 7.5 A, di/dt = 100 A/µs,
-
192
ns
Qrr
Reverse recovery charge
VDD = 60 V
-
1.32
µC
Reverse recovery current
(see Figure 16. Test circuit for
inductive load switching and diode
recovery times)
-
13.8
A
trr
Reverse recovery time
ISD = 7.5 A, di/dt = 100 A/µs,
-
262
ns
Qrr
Reverse recovery charge
VDD = 60 V, Tj = 150 °C
-
1.74
µC
Reverse recovery current
(see Figure 16. Test circuit for
inductive load switching and diode
recovery times)
-
13.3
A
IRRM
IRRM
1. Pulse width is limited by safe operating area
2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%
DS11598 - Rev 4
page 4/14
STF11N60M2-EP
Electrical characteristics curves
2.1
Electrical characteristics curves
Figure 1. Safe operating area
Figure 2. Thermal impedance
K
GC20940
10 -1
10 -2
10 -3
10 -4
Figure 3. Output characteristics
ID
(A)
GIPG150320161228TCH
12
10
VDS = 17 V
10
8
VGS = 6 V
6
6
4
4
VGS = 5 V
2
0
0
4
8
12
16
2
VDS (V)
Figure 5. Gate charge vs gate-source voltage
VGS
(V)
600
0.59
VDS
VDD = 480 V
ID = 7.5 A
500
400
4
4.5
5
5.5
6
6.5
VGS (V)
Figure 6. Static drain-source on-resistance
R DS(on)
(Ω)
(V)
8
0
3.5
GIPG150320161229QVG VDS
12
10
t p (s)
10 0
14
VGS = 7 V
8
10 -1
ID
(A)
GIPG150320161228OCH
12
10 -2
Figure 4. Transfer characteristics
VGS = 8, 9, 10 V
14
10 -3
GIPG150320161226RID
V GS =10 V
0.58
0.57
0.56
6
300
4
200
2
100
0.53
0
Qg (nC)
0.52
0
0
0
DS11598 - Rev 4
2
4
6
8
10 12 14 16
0.55
0.54
1
2
3
4
5
6
7
I D (A)
page 5/14
STF11N60M2-EP
Electrical characteristics curves
Figure 7. Capacitance variations
C
(pF)
Figure 8. Turn-off switching energy vs drain current
E off
[μJ]
GIPG150320161227CVR
10 3
C ISS
10
GIPG160320160901ALS
V DD = 400 V
R G = 4.7 Ω
V GS = 10 V
15
2
10
C OSS
10 1
10 0
10 -1
10 -1
C RSS
f = 1 MHz
10 0
10 1
V DS (V)
10 2
Figure 9. Normalized gate threshold voltage vs
temperature
VGS(th)
(norm)
GIPG181120141615ALS
5
0
0
2
3
4
5
I d [A]
Figure 10. Normalized on-resistance vs temperature
RDS(on)
(norm)
GIPG181120141628ALS
2.2
1.1
ID = 250 µA
1.8
1.0
VGS = 10 V
1.4
0.9
1.0
0.8
0.6
0.7
0.6
-75
1
-25
25
75
125
Figure 11. Normalized V(BR)DSS vs temperature
V(BR)DSS
GIPG191120141457ALS
(norm)
0.2
-75
TJ(°C)
-25
25
75
125
TJ(°C)
Figure 12. Output capacitance stored energy
E OSS
(µJ)
GIPG150320161230EOS
3.0
1.08
2.5
1.04
2.0
1.00
ID = 1mA
1.5
0.96
1.0
0.92
0.88
-75
DS11598 - Rev 4
0.5
-25
25
75
125
TJ(°C)
0.0
0
100
200
300
400
500
600
V DS (V)
page 6/14
STF11N60M2-EP
Electrical characteristics curves
Figure 13. Source-drain diode forward characteristics
V SD
(V)
GIPG150320161227SDF
1.1
T j = -50 °C
1.0
0.9
T j = 25 °C
0.8
T j = 150 °C
0.7
0.6
0.5
0
DS11598 - Rev 4
1
2
3
4
5
6
7
I SD (A)
page 7/14
STF11N60M2-EP
Test circuits
3
Test circuits
Figure 14. Test circuit for resistive load switching times
Figure 15. Test circuit for gate charge behavior
VDD
12 V
2200
+ μF
3.3
μF
VDD
VD
VGS
1 kΩ
100 nF
RL
IG= CONST
VGS
RG
47 kΩ
+
pulse width
D.U.T.
2.7 kΩ
2200
μF
pulse width
D.U.T.
100 Ω
VG
47 kΩ
1 kΩ
AM01469v1
AM01468v1
Figure 16. Test circuit for inductive load switching and
diode recovery times
D
G
A
D.U.T.
S
25 Ω
A
L
A
B
B
3.3
µF
D
G
+
VD
100 µH
fast
diode
B
Figure 17. Unclamped inductive load test circuit
RG
1000
+ µF
2200
+ µF
VDD
3.3
µF
VDD
ID
D.U.T.
S
D.U.T.
Vi
_
pulse width
AM01471v1
AM01470v1
Figure 18. Unclamped inductive waveform
Figure 19. Switching time waveform
V(BR)DSS
ton
VD
td(on)
90%
IDM
tf
90%
10%
10%
0
ID
VDD
toff
td(off)
tr
VDD
VGS
0
VDS
90%
10%
AM01472v1
AM01473v1
DS11598 - Rev 4
page 8/14
STF11N60M2-EP
Package information
4
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK®
packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions
and product status are available at: www.st.com. ECOPACK® is an ST trademark.
DS11598 - Rev 4
page 9/14
STF11N60M2-EP
TO-220FP package information
4.1
TO-220FP package information
Figure 20. TO-220FP package outline
7012510_Rev_12_B
DS11598 - Rev 4
page 10/14
STF11N60M2-EP
TO-220FP package information
Table 9. TO-220FP package mechanical data
Dim.
mm
Min.
Max.
A
4.4
4.6
B
2.5
2.7
D
2.5
2.75
E
0.45
0.7
F
0.75
1
F1
1.15
1.70
F2
1.15
1.70
G
4.95
5.2
G1
2.4
2.7
H
10
10.4
L2
DS11598 - Rev 4
Typ.
16
L3
28.6
30.6
L4
9.8
10.6
L5
2.9
3.6
L6
15.9
16.4
L7
9
9.3
Dia
3
3.2
page 11/14
STF11N60M2-EP
Revision history
Table 10. Document revision history
Date
Revision
Changes
11-Apr-2016
1
First release.
07-Oct-2016
2
Document status changed from preliminary to production data.
Removed document maturity status from cover page.
02-Mar-2018
3
Updated Table 1. Absolute maximum ratings, Table 4. On/off states, Table 5. Dynamic and
Table 8. Source drain diode.
Updated Figure 1. Safe operating area, Figure 3. Output characteristics, Figure 4. Transfer
characteristics and Figure 5. Gate charge vs gate-source voltage.
Minor text changes
Modified Table 1. Absolute maximum ratings, Table 5. Dynamic and Table 8. Source drain
diode.
23-Apr-2018
4
Modified Figure 1. Safe operating area.
Minor text changes.
DS11598 - Rev 4
page 12/14
STF11N60M2-EP
Contents
Contents
1
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
2
Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.1
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3
Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
4
Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4.1
TO-220FP package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
DS11598 - Rev 4
page 13/14
STF11N60M2-EP
IMPORTANT NOTICE – PLEASE READ CAREFULLY
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© 2018 STMicroelectronics – All rights reserved
DS11598 - Rev 4
page 14/14