STF11N65K3

STF11N65K3 N-channel 650 V, 0.765 Ω, 11 A, TO-220FP SuperMESH3™ Power MOSFET Features Type VDSS RDS(on) max ID Ptot STF11N65K3 650 V < 0.85 Ω 11 A 35 W ■ 100% avalanche tested ■ Extremely high dv/dt capability u d o 3 1 ■ Gate charge minimized ■ Very low intrinsic capacitances ■ Improved diode reverse recovery characteristics ■ Zener-protected 2 r P e TO-220FP t e l o Applications ■ ) s ( ct ) (s Switching applications s b O Figure 1. Internal schematic diagram D(2) t c u Description d o r This device is an N-channel Zener-protected SuperMESH3™ Power MOSFET developed using STMicroelectronics' SuperMESH™ technology, achieved through optimization of ST's well established strip-based PowerMESH™ layout. In addition to a significant reduction in onresistance, this device is designed to ensure a high level of dv/dt capability for the most demanding applications. G(1) P e t e l o s b O Table 1. S(3) AM01476v1 Device summary Order codes Marking Package Packaging STF11N65K3 11N65K3 TO-220FP Tube October 2011 Doc ID 17931 Rev 2 1/13 www.st.com 13 Contents STF11N65K3 Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) ......................... 6 3 Test circuits .............................................. 9 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O 2/13 Doc ID 17931 Rev 2 STF11N65K3 1 Electrical ratings Electrical ratings Table 2. Absolute maximum ratings Symbol Parameter Value Unit VDSS Drain source voltage (VGS=0) 650 V VGS Gate-source voltage ± 30 V ID Drain current (continuous) at TC = 25 °C 11 A ID Drain current (continuous) at TC = 100 °C 6.3 A Drain current (pulsed) 40 Total dissipation at TC = 25 °C 35 IAR Max current during repetitive or single pulse avalanche (pulse width limited by TJMAX) EAS Single pulse avalanche energy (2) u d o IDM (1) PTOT Derating factor dv/dt (3) e t e ol Peak diode recovery voltage slope VESD(G-S) G-S ESD (HBM C=100 pF, R=1.5 kΩ) s b O VISO Insulation withstand voltage (RMS) from all three leads to external heat sink (t=1 s;TC=25 °C) Tj Tstg Operating junction temperature Storage temperature ) (s 7.2 Pr (s) A ct W A 212 mJ 0.28 W/°C 12 V/ns 2500 V 2500 V -55 to 150 °C Value Unit t c u 1. Pulse width limited by safe operating area. 2. Starting Tj = 25 °C, ID = IAR, VDD = 50 V d o r 3. ISD ≤11 A, di/dt ≤400 A/µs, VDD = 80% V(BR)DSS, VDS peak < V(BR)DSS P e let Table 3. O o s b Symbol Thermal data Parameter Rthj-case Thermal resistance junction-case max 3.57 °C/W Rthj-amb Thermal resistance junction-ambient max 62.5 °C/W Maximum lead temperature for soldering purpose 300 °C Tl Doc ID 17931 Rev 2 3/13 Electrical characteristics 2 STF11N65K3 Electrical characteristics (Tcase = 25 °C unless otherwise specified). Table 4. Symbol On /off states Parameter Drain-source breakdown voltage ( VGS = 0) V(BR)DSS VDS = 650 V Zero gate voltage drain current (VGS = 0) VDS = 650 V, TC=125 °C IGSS Gate-body leakage current (VDS = 0) RDS(on) Static drain-source on resistance 3 Unit V 1 50 µA µA 10 µA 4.5 V 0.765 0.85 Ω Max. Unit u d o r P e VGS = 10 V, ID = 3.6 A t e l o Min. Typ. Input capacitance Output capacitance Reverse transfer capacitance s b O VDS = 50 V, f = 1 MHz, VGS = 0 - 1180 125 14 - pF pF pF VDS = 0 to 520 V, VGS = 0 - 77 - pF RG d o r Intrinsic gate resistnce f=1 MHz open drain - 3 - Ω Qg Qgs Qgd Total gate charge Gate-source charge Gate-drain charge VDD = 520 V, ID = 7.2 A, VGS = 10 V (see Figure 16) - 42 7.4 23 - nC nC nC Min. Typ. Max Unit - 14.5 14 44 35 - ns ns ns ns Dynamic Parameter ) (s Ciss Coss Crss Coss eq. P e Table 6. Symbol td(on) tr td(off) tf 4/13 Max. ) s ( ct VGS = ± 20 V Gate threshold voltage VDS = VGS, ID = 100 µA Symbol O Typ. 650 VGS(th) let Min. ID = 1 mA IDSS Table 5. o s b Test conditions t c u Equivalent output capacitance Test conditions Switching times Parameter Turn-on delay time Rise time Turn-off-delay time Fall time Test conditions VDD = 310 V, ID = 3.5 A, RG = 4.7 Ω, VGS = 10 V (see Figure 15) Doc ID 17931 Rev 2 STF11N65K3 Electrical characteristics Table 7. Source drain diode Symbol Parameter ISD ISDM (1) Source-drain current Source-drain current (pulsed) VSD (2) Forward on voltage trr Qrr IRRM trr Qrr IRRM Test conditions Min. 7.2 28.8 A A ISD = 7 A, VGS = 0 - 1.5 V Reverse recovery time Reverse recovery charge Reverse recovery current ISD = 7 A, di/dt = 100A/µs VDD = 60 V (see Figure 20) - 320 2 13 ns µC A Reverse recovery time Reverse recovery charge Reverse recovery current ISD = 7 A, di/dt = 100 A/µs VDD = 60 V, Tj = 150 °C (see Figure 20) - 410 2.9 14 ns µC A r P e Gate-source Zener diode Symbol Parameter t e l o Test conditions Gate-source breakdown voltage ) s ( ct u d o 2. Pulsed: Pulse duration = 300 µs, duty cycle 1.5% BVGSO Max. Unit - 1. Pulse width limited by safe operating area Table 8. Typ. bs Igs=± 1 mA (open drain) Min. Typ. 30 - Max. Unit - V O ) The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the usage of external components. s ( t c u d o r P e t e l o s b O Doc ID 17931 Rev 2 5/13 Electrical characteristics STF11N65K3 2.1 Electrical characteristics (curves) Figure 2. Safe operating area Figure 3. Thermal impedance AM03922v1 ID (A) 100 D S( on ) O Li per m at ite io d ni by n m this ax a R rea is 10µs 10 100µs 1ms Tj=150°C Tc=25°C 1 Figure 4. u d o Sinlge pulse 0.1 0.1 10 1 100 Output characteristics Figure 5. AM03923v1 18 16 7V ) (s VGS=10V 14 12 t c u 10 8 od 6 r P e 4 2 t e l o 0 0 bs Figure 6. 10 6V VDS(V) Normalized BVDSS vs temperature AM03925v1 BVDSS (norm) Transfer characteristics t e l o AM03924v1 ID (A) s b O 5V 20 r P e VDS(V) ID (A) O ) s ( ct 10ms 12 11 10 9 8 7 6 5 4 3 2 1 0 1 Figure 7. 2 VDS=25V 3 4 5 6 7 8 9 VGS(V) Static drain-source on resistance AM03926v1 RDS(on) (Ω) 0.95 1.10 VGS = 10V 0.90 ID = 1mA 0.85 1.05 0.80 1.00 0.75 0.70 0.95 0.65 0.90 -75 -50 -25 0 6/13 25 50 75 100 125 150 TJ(°C) 0.60 0 Doc ID 17931 Rev 2 1 2 3 4 5 6 7 ID(A) STF11N65K3 Figure 8. Electrical characteristics Output capacitance stored energy Figure 9. AM03929v1 Eoss (µJ) Capacitance variations AM03928v1 C (pF) 8 1000 Ciss 7 6 100 5 Coss 4 3 Crss ) s ( ct 10 2 1 0 0 Figure 10. 100 200 300 400 500 1 0.1 600 VDS(V) Gate charge vs gate-source voltage VDS 10 400 ) (s 8 300 6 ct u d o 4 2 r P e 0 t e l o 10 20 30 40 2.5 b O 1.0 100 0.5 O AM03930v1 VGS(th) (norm) 1.10 o r P VDS(V) 0.0 -50 -25 0 25 50 75 100 125 150 TJ(°C) Figure 13. Maximum avalanche energy vs temperature AM03933v1 EAS (mJ) ID=7.2 A VDD=50 V 220 ID = 100µA AM03931v1 1.5 0 50 Qg(nC) bs 100 VDS = 10V ID = 3.6A 2.0 200 Figure 12. Normalized gate threshold voltage vs temperature ete l o s 500 ID=7A 0 RDS(on) (norm) VDD=520V 12 du 10 Figure 11. Normalized on resistance vs temperature AM03927v1 VGS VGS (V) 1 200 180 1.00 160 140 0.90 120 100 80 0.80 60 40 0.70 -50 -25 0 25 50 75 100 125 150 TJ(°C) Doc ID 17931 Rev 2 20 0 0 20 40 60 80 100 120 140 TJ(°C) 7/13 Electrical characteristics STF11N65K3 Figure 14. Source-drain diode forward characteristics AM03932v1 VSD (V) TJ=-50°C 0.9 0.8 TJ=25°C 0.7 TJ=150°C 0.6 0.5 ) s ( ct 0.4 0.3 0 1 2 3 4 5 6 8 7 u d o ISD(A) r P e t e l o ) (s s b O t c u d o r P e t e l o s b O 8/13 Doc ID 17931 Rev 2 STF11N65K3 3 Test circuits Test circuits Figure 15. Switching times test circuit for resistive load Figure 16. Gate charge test circuit VDD 12V 47kΩ 1kΩ 100nF 3.3 µF 2200 RL µF IG=CONST VDD VGS 100Ω Vi=20V=VGMAX VD RG 2200 µF D.U.T. ) s ( t VG 2.7kΩ c u d PW 47kΩ 1kΩ PW D.U.T. AM01468v1 e t e ol o r P AM01469v1 Figure 17. Test circuit for inductive load Figure 18. Unclamped inductive load test switching and diode recovery times circuit A A D.U.T. FAST DIODE B B A D G S s ( t c 3.3 µF B 25 Ω D 1000 µF RG S r P e 2200 µF 3.3 µF VDD ID Vi D.U.T. Pw let AM01470v1 Figure 19. Unclamped inductive waveform b O L VD VDD u d o G so )- L=100µH s b O AM01471v1 Figure 20. Switching time waveform ton V(BR)DSS tdon VD toff tr tdoff tf 90% 90% IDM 10% ID VDD 10% 0 VDD VDS 90% VGS AM01472v1 0 Doc ID 17931 Rev 2 10% AM01473v1 9/13 Package mechanical data 4 STF11N65K3 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O 10/13 Doc ID 17931 Rev 2 STF11N65K3 Package mechanical data Table 9. TO-220FP mechanical data mm Dim. Min. Typ. Max. A 4.4 4.6 B 2.5 2.7 D 2.5 2.75 E 0.45 0.7 F 0.75 1 F1 1.15 1.70 F2 1.15 1.70 G 4.95 G1 2.4 H 10 ) s ( ct du 5.2 e t e ol L2 16 L3 28.6 L4 9.8 L5 2.9 L6 15.9 L7 9 )- o r P 2.7 10.4 30.6 s b O 10.6 3.6 16.4 9.3 s ( t c Dia 3 u d o 3.2 Figure 21. TO-220FP drawing s b O e t e ol Pr L7 E A B D Dia L5 L6 F1 F2 F G H G1 L4 L2 L3 7012510_Rev_K Doc ID 17931 Rev 2 11/13 Revision history 5 STF11N65K3 Revision history Table 10. Document revision history Date Revision 10-Sep-2010 1 First release 2 Updated Figure 6: Normalized BVDSS vs temperature, Figure 7: Static drain-source on resistance, Figure 10: Gate charge vs gatesource voltage, Figure 11: Normalized on resistance vs temperature, Figure 12: Normalized gate threshold voltage vs temperature. Minor text changes. 03-Oct-2011 Changes ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O 12/13 Doc ID 17931 Rev 2 STF11N65K3 ) s ( ct Please Read Carefully: u d o Information in this document is provided solely in connection with ST products. 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