STF16N60M6

STF16N60M6 N-channel 600 V, 0.26 Ω typ., 12 A MDmesh™ M6 Power MOSFET in a TO-220FP package Datasheet - production data Features      TO-220FP Order code VDS RDS(on) max. ID STF16N60M6 600 V 0.32 Ω 12 A Reduced switching losses Lower RDS(on) x area vs previous generation Low gate input resistance 100% avalanche tested Zener-protected Applications Figure 1: Internal schematic diagram D(2)    Switching applications LLC converters Boost PFC converters Description G(1) S(3) AM15572v1_no_tab The new MDmesh™ M6 technology incorporates the most recent advancements to the well-known and consolidated MDmesh family of SJ MOSFETs. STMicroelectronics builds on the previous generation of MDmesh devices through its new M6 technology, which combines excellent RDS(on) * area improvement with one of the most effective switching behaviors available, as well as a user-friendly experience for maximum endapplication efficiency. Table 1: Device summary Order code Marking Package Packing STF16N60M6 16N60M6 TO-220FP Tube March 2017 DocID030461 Rev 1 This is information on a product in full production. 1/13 www.st.com Contents STF16N60M6 Contents 1 Electrical ratings ............................................................................. 3 2 Electrical characteristics ................................................................ 4 2.1 Electrical characteristics (curves) ...................................................... 6 3 Test circuits ..................................................................................... 8 4 Package information ....................................................................... 9 4.1 5 2/13 TO-220FP package information ...................................................... 10 Revision history ............................................................................ 12 DocID030461 Rev 1 STF16N60M6 1 Electrical ratings Electrical ratings Table 2: Absolute maximum ratings Symbol Value Unit Gate-source voltage ±25 V Drain current (continuous) at Tc = 25 °C 12(1) A Drain current (continuous) at Tc = 100 °C 7.6(1) A Drain current (pulsed) 32(1)(2) A Total dissipation at Tc = 25 °C 25 W Peak diode recovery voltage slope 15 MOSFET dv/dt ruggedness 50 VISO Insulation withstand voltage (RMS) from all three leads to external heat sink (t = 1 s; TC = 25 °C) 2.5 kV Tstg Storage temperature range -55 to 150 °C VGS ID ID IDM PTOT dv/dt(3) dv/dt (4) Tj Parameter Operating junction temperature range V/ns Notes: (1) Limited by maximum junction temperature. (2)Pulse (3)I (4) SD width limited by safe operating area. ≤ 12 A, di/dt ≤ 400 A/μs; VDS(peak) < V(BR)DSS, VDD = 400 V VDS ≤ 480 V Table 3: Thermal data Symbol Parameter Rthj-case Thermal resistance junction-case Rthj-amb Thermal resistance junction-ambient Value Unit 5 °C/W 62.5 Table 4: Avalanche characteristics Symbol Parameter Value Unit IAR Avalanche current, repetitive or not repetitive (pulse width limited by T jmax) 2.5 A EAS Single pulse avalanche energy (starting Tj = 25 °C, ID = IAR; VDD = 50 V) 110 mJ DocID030461 Rev 1 3/13 Electrical characteristics 2 STF16N60M6 Electrical characteristics (TC = 25 °C unless otherwise specified) Table 5: On /off states Symbol V(BR)DSS Parameter Test conditions Drain-source breakdown voltage VGS = 0 V, ID = 1 mA Min. Typ. Max. 600 Unit V VGS = 0 V, VDS = 600 V 1 VGS = 0 V, VDS = 600 V, TC = 125 °C (1) 100 Gate-body leakage current VDS = 0 V, VGS = ± 25 V ±5 µA VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA 4 4.75 V RDS(on) Static drain-source onresistance VGS = 10 V, ID = 6 A 0.26 0.32 Ω Min. Typ. Max. Unit - 575 - - 33 - - 3 - IDSS Zero gate voltage drain current IGSS 3.25 µA Notes: (1)Defined by design, not subject to production test. Table 6: Dynamic Symbol Parameter Test conditions Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Coss eq.(1) Equivalent output capacitance VDS = 0 to 480 V, VGS = 0 V - 104 - pF RG Intrinsic gate resistance f = 1 MHz open drain - 5.2 - Ω Qg Total gate charge - 16.7 - Qgs Gate-source charge - 3.5 - Qgd Gate-drain charge VDD = 480 V, ID = 12 A, VGS = 0 to 10 V (see Figure 15: "Test circuit for gate charge behavior") - 9.4 - VGS = 100 V, f = 1 MHz, VGS = 0 V pF nC Notes: (1) Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS. Table 7: Switching times Symbol td(on) tr td(off) tf 4/13 Parameter Turn-on delay time Rise time Turn-off delay time Fall time Test conditions Min. Typ. Max. VDD = 300 V, ID = 6 A RG = 4.7 Ω, VGS = 10 V (see Figure 14: "Test circuit for resistive load switching times" and Figure 19: "Switching time waveform") - 13 - - 7.6 - - 19.8 - - 6.8 - DocID030461 Rev 1 Unit ns STF16N60M6 Electrical characteristics Table 8: Source drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit ISD Source-drain current - 12 A ISDM(1) Source-drain current (pulsed) - 32 A VSD(2) Forward on voltage VGS = 0 V, ISD = 12 A - 1.6 V trr Reverse recovery time - 210 ns Qrr Reverse recovery charge - 1.7 µC IRRM Reverse recovery current ISD = 12 A, di/dt = 100 A/µs, VDD = 60 V (see Figure 16: "Test circuit for inductive load switching and diode recovery times") - 13.8 A ISD = 12 A, di/dt = 100 A/µs, VDD = 60 V, Tj = 150 °C (see Figure 16: "Test circuit for inductive load switching and diode recovery times") - 310 ns - 3.2 µC - 15.4 A trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current Notes: (1) Pulse width is limited by safe operating area. (2) Pulse test: pulse duration = 300 µs, duty cycle 1.5%. DocID030461 Rev 1 5/13 Electrical characteristics 2.1 STF16N60M6 Electrical characteristics (curves) Figure 2: Safe operating area Figure 3: Thermal impedance Figure 4: Output characteristics Figure 5: Transfer characteristics Figure 6: Gate charge vs gate-source voltage Figure 7: Static drain-source on-resistance 6/13 DocID030461 Rev 1 STF16N60M6 Electrical characteristics Figure 8: Capacitance variations Figure 9: Normalized gate threshold voltage vs temperature Figure 10: Normalized on-resistance vs temperature Figure 11: Normalized V(BR)DSS vs temperature Figure 12: Output capacitance stored energy Figure 13: Source-drain diode forward characteristics DocID030461 Rev 1 7/13 Test circuits 3 8/13 STF16N60M6 Test circuits Figure 14: Test circuit for resistive load switching times Figure 15: Test circuit for gate charge behavior Figure 16: Test circuit for inductive load switching and diode recovery times Figure 17: Unclamped inductive load test circuit Figure 18: Unclamped inductive waveform Figure 19: Switching time waveform DocID030461 Rev 1 STF16N60M6 4 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. DocID030461 Rev 1 9/13 Package information 4.1 STF16N60M6 TO-220FP package information Figure 20: TO-220FP package outline 10/13 DocID030461 Rev 1 STF16N60M6 Package information Table 9: TO-220FP package mechanical data mm Dim. Min. Typ. Max. A 4.4 4.6 B 2.5 2.7 D 2.5 2.75 E 0.45 0.7 F 0.75 1 F1 1.15 1.70 F2 1.15 1.70 G 4.95 5.2 G1 2.4 2.7 H 10 10.4 L2 16 L3 28.6 30.6 L4 9.8 10.6 L5 2.9 3.6 L6 15.9 16.4 L7 9 9.3 Dia 3 3.2 DocID030461 Rev 1 11/13 Revision history 5 STF16N60M6 Revision history Table 10: Document revision history 12/13 Date Revision 23-Mar-2017 1 DocID030461 Rev 1 Changes First release. STF16N60M6 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2017 STMicroelectronics – All rights reserved DocID030461 Rev 1 13/13