STF16N65M2
N-channel 650 V, 0.32 Ω typ., 11 A MDmesh M2
Power MOSFET in a TO-220FP package
Datasheet − production data
Features
Order code
VDS @ TJmax
RDS(on) max
ID
STF16N65M2
710 V
0.36 Ω
11 A
• Extremely low gate charge
• Excellent output capacitance (Coss) profile
• 100% avalanche tested
• Zener-protected
Applications
72)3
• Switching applications
Figure 1. Internal schematic diagram
, TAB
Description
This device is an N-channel Power MOSFET
developed using MDmesh™ M2 technology.
Thanks to its strip layout and an improved vertical
structure, the device exhibits low on-resistance
and optimized switching characteristics, rendering
it suitable for the most demanding high efficiency
converters.
AM15572v1
Table 1. Device summary
Order codes
Marking
Package
Packaging
STF16N65M2
16N65M2
TO-220FP
Tube
October 2014
This is information on a product in full production.
DocID027084 Rev 1
1/13
www.st.com
Contents
STF16N65M2
Contents
1
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3
Test circuits
4
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
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STF16N65M2
1
Electrical ratings
Electrical ratings
Table 2. Absolute maximum ratings
Symbol
Parameter
Value
Unit
± 25
V
VGS
Gate-source voltage
ID(1)
Drain current (continuous) at TC = 25 °C
11
A
ID
Drain current (continuous) at TC = 100 °C
6.9
A
IDM (2)
Drain current (pulsed)
44
A
PTOT
Total dissipation at TC = 25 °C
25
W
dv/dt
(3)
Peak diode recovery voltage slope
15
V/ns
dv/dt
(4)
MOSFET dv/dt ruggedness
50
V/ns
2500
V
- 55 to 150
°C
Value
Unit
5
°C/W
62.50
°C/W
Value
Unit
VISO
Insulation withstand voltage (RMS) from
all three leads to external heat sink
(t=1 s;TC=25 °C)
Tstg
Storage temperature
Tj
Max. operating junction temperature
1. Limited only by maximum temperature allowed.
2. Pulse width limited by safe operating area.
3. ISD ≤ 11 A, di/dt ≤ 400 A/µs; VDS peak < V (BR)DSS, VDD=400 V.
4. VDS ≤ 520 V
Table 3. Thermal data
Symbol
Parameter
Rthj-case
Thermal resistance junction-case max
Rthj-amb
Thermal resistance junction-ambient max
Table 4. Avalanche characteristics
Symbol
Parameter
IAR
Avalanche current, repetitive or not
repetitive (pulse width limited by Tjmax)
1.9
A
EAS
Single pulse avalanche energy (starting
Tj=25°C, ID= IAR; VDD=50)
360
mJ
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Electrical characteristics
2
STF16N65M2
Electrical characteristics
(TC = 25 °C unless otherwise specified)
Table 5. On /off states
Symbol
V(BR)DSS
Parameter
Drain-source
breakdown voltage
IDSS
Zero gate voltage
drain current
IGSS
Gate-body leakage
current
Test conditions
VGS = 0, ID = 1 mA
Min.
Typ.
Max.
Unit
650
V
VGS = 0, VDS = 650 V
1
µA
VGS = 0, VDS = 650 V,
TC=125 °C
100
µA
VDS = 0, VGS = ± 25 V
±10
µA
3
4
V
0.32
0.36
Ω
Min.
Typ.
Max.
Unit
-
718
-
pF
-
32
-
pF
-
1.1
-
pF
VGS(th)
Gate threshold voltage VDS = VGS, ID = 250 µA
RDS(on)
Static drain-source
on-resistance
2
VGS = 10 V, ID = 5.5 A
Table 6. Dynamic
Symbol
Parameter
Test conditions
Ciss
Input capacitance
Coss
Output capacitance
Crss
Reverse transfer
capacitance
Coss eq.(1)
Equivalent output
capacitance
VGS = 0, VDS = 0 to 520 V
-
189
-
pF
RG
Intrinsic gate
resistance
f = 1 MHz open drain
-
5.2
-
Ω
Qg
Total gate charge
-
19.5
-
nC
-
4
-
nC
-
8.3
-
nC
Qgs
Gate-source charge
Qgd
Gate-drain charge
VGS = 0, VDS = 100 V,
f = 1 MHz
VDD = 520 V, ID = 11 A,
VGS = 10 V (see Figure 15)
1. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS
increases from 0 to 80% VDSS
4/13
DocID027084 Rev 1
STF16N65M2
Electrical characteristics
Table 7. Switching times
Symbol
td(on)
Parameter
Test conditions
td(off)
tf
Typ.
Max.
Unit
-
11.3
-
ns
-
8.2
-
ns
-
36
-
ns
-
11.3
-
ns
Turn-on delay time
VDD = 325 V, ID = 5.5 A,
RG = 4.7 Ω, VGS = 10 V
(see Figure 14 and 19)
Rise time
tr
Min.
Turn-off delay time
Fall time
Table 8. Source drain diode
Symbol
Parameter
Test conditions
Min.
Typ.
Max. Unit
Source-drain current
-
11
A
ISDM
(1)
Source-drain current (pulsed)
-
44
A
VSD
(2)
Forward on voltage
-
1.6
V
ISD
trr
VGS = 0, ISD = 11 A
Reverse recovery time
Qrr
Reverse recovery charge
IRRM
Reverse recovery current
trr
Reverse recovery time
Qrr
Reverse recovery charge
IRRM
Reverse recovery current
ISD = 11 A, di/dt = 100 A/µs
VDD = 60 V (see Figure 16)
ISD = 11 A, di/dt = 100 A/µs
VDD = 60 V, Tj=150 °C
(see Figure 16)
-
342
ns
-
3.5
µC
-
20.4
A
-
458
ns
-
4.6
µC
-
20.5
A
1. Pulse width limited by safe operating area
2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%
DocID027084 Rev 1
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Electrical characteristics
2.1
STF16N65M2
Electrical characteristics (curves)
Figure 2. Safe operating area
Figure 3. Thermal impedance
*,3')65
,'
$
LV
HD
DU RQ
V '6
L
WK 5
LQ D[
Q P
WLR E\
D
U
G
SH WH
2 LPL
/
V
V
PV
PV
7M &
7F &
6LQJOHSXOVH
9'69
Figure 4. Output characteristics
*,3')65
,'
$
9*6 9
9
9
9'69
Figure 6. Normalized gate threshold voltage vs.
temperature
GIPD180920141442FSR
VGS(th)
(norm)
ID = 250 µA
1.1
1.08
0.9
1.00
0.8
0.96
0.7
0.92
25
75
125
Tj(°C)
9*69
GIPD180920141448FSR
V(BR)DSS
(norm)
1.04
-25
Figure 7. Normalized V(BR)DSS vs. temperature
1.0
0.6
-75
9'6 9
*,3')65
,'
$
9
6/13
Figure 5. Transfer characteristics
0.88
-75
DocID027084 Rev 1
ID= 1mA
-25
25
75
125
Tj(°C)
STF16N65M2
Electrical characteristics
Figure 8. Static drain-source on-resistance
*,3')65
5'6RQ
ȍ
9*6 9
Figure 9. Normalized on-resistance vs.
temperature
GIPD180920141459FSR
RDS(on)
(norm)
2.2
VGS= 10V
1.8
1.4
1
0.6
,'$
Figure 10. Gate charge vs. gate-source voltage
*,3')65
9'6 9
9*6
9
9'6
9'' 9
,' $
0.2
-75
-25
75
25
125
Tj(°C)
Figure 11. Capacitance variations
*,3')65
&
S)
&LVV
&RVV
&UVV
4JQ&
Figure 12. Output capacitance stored energy
*,3')65
(
-
Figure 13. Source-drain diode forward
characteristics
*,3')65
96'
9
9'69
7M &
7M &
7M &
9'69
DocID027084 Rev 1
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13
Test circuits
3
STF16N65M2
Test circuits
Figure 14. Switching times test circuit for
resistive load
Figure 15. Gate charge test circuit
VDD
12V
47kΩ
1kΩ
100nF
3.3
μF
2200
RL
μF
IG=CONST
VDD
VGS
100Ω
Vi=20V=VGMAX
VD
RG
2200
μF
D.U.T.
D.U.T.
VG
2.7kΩ
PW
47kΩ
1kΩ
PW
AM01468v1
Figure 16. Test circuit for inductive load
switching and diode recovery times
A
A
AM01469v1
Figure 17. Unclamped inductive load test circuit
L
A
D
G
D.U.T.
FAST
DIODE
B
B
VD
L=100μH
S
3.3
μF
B
25 Ω
1000
μF
D
VDD
2200
μF
3.3
μF
VDD
ID
G
RG
S
Vi
D.U.T.
Pw
AM01470v1
AM01471v1
Figure 18. Unclamped inductive waveform
Figure 19. Switching time waveform
ton
9%5'66
tdon
9'
toff
tr
tdoff
tf
90%
90%
,'0
10%
,'
9''
10%
0
9''
VDS
90%
VGS
$0Y
8/13
0
DocID027084 Rev 1
10%
AM01473v1
STF16N65M2
4
Package mechanical data
Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
DocID027084 Rev 1
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Package mechanical data
STF16N65M2
Figure 20. TO-220FP drawing
7012510_Rev_K_B
10/13
DocID027084 Rev 1
STF16N65M2
Package mechanical data
Table 9. TO-220FP mechanical data
mm
Dim.
Min.
Typ.
Max.
A
4.4
4.6
B
2.5
2.7
D
2.5
2.75
E
0.45
0.7
F
0.75
1
F1
1.15
1.70
F2
1.15
1.70
G
4.95
5.2
G1
2.4
2.7
H
10
10.4
L2
16
L3
28.6
30.6
L4
9.8
10.6
L5
2.9
3.6
L6
15.9
16.4
L7
9
9.3
Ø
3
3.2
DocID027084 Rev 1
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Revision history
5
STF16N65M2
Revision history
Table 10. Document revision history
12/13
Date
Revision
24-Oct-2014
1
Changes
First release.
DocID027084 Rev 1
STF16N65M2
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