STF18N60M6

STF18N60M6 Datasheet N-channel 600 V, 230 mΩ typ., 13 A, MDmesh™ M6 Power MOSFET in a TO-220FP package Features 1 2 3 TO-220FP D(2) Order code VDS RDS(on) max. ID STF18N60M6 600 V 280 mΩ 13 A • • Reduced switching losses Lower RDS(on) per area vs previous generation • • • Low gate input resistance 100% avalanche tested Zener-protected Applications • • • G(1) Switching applications LLC converters Boost PFC converters Description S(3) AM15572v1_no_tab The new MDmesh™ M6 technology incorporates the most recent advancements to the well-known and consolidated MDmesh family of SJ MOSFETs. STMicroelectronics builds on the previous generation of MDmesh devices through its new M6 technology, which combines excellent RDS(on) per area improvement with one of the most effective switching behaviors available, as well as a user-friendly experience for maximum end-application efficiency. Product status link STF18N60M6 Product summary Order code STF18N60M6 Marking 18N60M6 Package TO-220FP Packing Tube DS12841 - Rev 1 - November 2018 For further information contact your local STMicroelectronics sales office. www.st.com STF18N60M6 Electrical ratings 1 Electrical ratings Table 1. Absolute maximum ratings Symbol Value Unit Gate-source voltage ±25 V Drain current (continuous) at Tcase = 25 °C 13 Drain current (continuous) at Tcase = 100 °C 8.2 IDM(1) Drain current (pulsed) 38 A PTOT Total power dissipation at Tcase = 25 °C 25 W dv/dt(2) Peak diode recovery voltage slope 15 dv/dt(3) MOSFET dv/dt ruggedness 100 VISO Insulation withstand voltage (RMS) from all three leads to external heat sink (t = 1 s; Tcase = 25 °C) 2.5 kV Tstg Storage temperature range -55 to 150 °C Value Unit 5 °C/W 62.5 °C/W Value Unit 2.7 A 210 mJ VGS ID Tj Parameter Operating junction temperature range A V/ns 1. Pulse width is limited by safe operating area. 2. ISD ≤ 13 A, di/dt ≤ 400 A/μs, VDS(peak) < V(BR)DSS, VDD = 400 V 3. VDS ≤ 480 V Table 2. Thermal data Symbol Parameter Rthj-case Thermal resistance junction-case Rthj-amb Thermal resistance junction-ambient Table 3. Avalanche characteristics Symbol IAR EAS DS12841 - Rev 1 Parameter Avalanche current, repetitive or non-repetitive (pulse width limited by TJmax) Single pulse avalanche energy (starting Tj = 25 °C, ID = IAR, VDD = 50 V) page 2/13 STF18N60M6 Electrical characteristics 2 Electrical characteristics (Tcase = 25 °C unless otherwise specified). Table 4. On/off states Symbol V(BR)DSS Parameter Test conditions Drain-source breakdown voltage VGS = 0 V, ID = 1 mA Min. Typ. 600 Zero gate voltage drain current IGSS 1 VGS = 0 V, VDS = 600 V, Tcase = 125 100 °C(1) Gate-body leakage current VDS = 0 V, VGS = ±25 V VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA RDS(on) Static drain-source on-resistance ID = 6.5 A, VGS = 10 V Unit V VGS = 0 V, VDS = 600 V IDSS Max. µA ±5 µA 4 4.75 V 230 280 mΩ Min. Typ. Max. Unit - 650 - - 45 - - 2 - 3.25 1. Defined by design, not subject to production test. Table 5. Dynamic Symbol Parameter Test conditions Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Coss eq.(1) Equivalent output capacitance VDS = 0 to 480 V, VGS = 0 V - 123 - pF RG Intrinsic gate resistance f = 1 MHz, ID = 0 A - 4.6 - Ω Qg Total gate charge VDD = 480 V, ID = 13 A, - 16.8 - Qgs Gate-source charge VGS = 0 to 10 V - 4.5 - Gate-drain charge (see Figure 14. Test circuit for gate charge behavior) - 8.4 - Qgd VDS = 100 V, f = 1 MHz, VGS = 0 V pF nC 1. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS. Table 6. Switching times Symbol td(on) tr td(off) tf DS12841 - Rev 1 Parameter Test conditions Min. Typ. Max. Turn-on delay time VDD = 300 V, ID = 6.5 A, - 16 - Rise time RG = 4.7 Ω, VGS = 10 V - 7 - Turn-off delay time (see Figure 13. Test circuit for resistive load switching times and Figure 18. Switching time waveform) - 28 - - 9 - Fall time Unit ns page 3/13 STF18N60M6 Electrical characteristics Table 7. Source-drain diode Symbol ISD ISDM(1) (2) Parameter Test conditions Min. Typ. Max. Unit Source-drain current - 13 A Source-drain current (pulsed) - 38 A 1.6 V Forward on voltage ISD = 13 A, VGS = 0 V - trr Reverse recovery time ISD = 13 A, di/dt = 100 A/µs, - 208 ns Qrr Reverse recovery charge VDD = 60 V - 1.9 µC Reverse recovery current (see Figure 15. Test circuit for inductive load switching and diode recovery times) - 18 A - 290 ns - 2.9 µC - 20 A VSD IRRM trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current ISD = 13 A, di/dt = 100 A/µs, VDD = 60 V, Tj = 150 °C (see Figure 15. Test circuit for inductive load switching and diode recovery times) 1. Pulse width is limited by safe operating area. 2. Pulsed: pulse duration = 300 µs, duty cycle 1.5% DS12841 - Rev 1 page 4/13 STF18N60M6 Electrical characteristics (curves) 2.1 Electrical characteristics (curves) Figure 1. Safe operating area ID (A) Figure 2. Thermal impedance K GIPG151120181018SOA Operation in this area is limited by R DS(on) 10 1 tp =1 µs GC20940 10 -1 tp =10 µs tp =100 µs 10 0 TJ≤150 °C TC=25 °C VGS=10 V single pulse 10 -1 10 -1 10 10 0 10 -2 tp =1 ms tp =10 ms 10 1 VDS (V) 2 10 -3 10 -4 VGS =9 V VGS = 10 V VGS =8 V 25 VGS =7 V 10 ID (A) GIPG311020181052TCH 30 VDS = 14 V 15 10 5 VGS =6 V 2 4 6 8 10 12 VDS (V) Figure 5. Gate charge vs gate-source voltage VDS (V) GIPG311020181053QVG VGS (V) VDD = 480 V ID = 13 A 600 500 12 Qg VDS Qgd Qgs 8 6 200 4 100 2 4 5 0 4 8 12 16 0 Qg (nC) 5 6 7 8 9 VGS (V) Figure 6. Static drain-source on-resistance RDS(on) (mΩ) 250 10 300 DS12841 - Rev 1 t p (s) 20 15 0 0 10 0 25 20 400 10 -1 GIPG311020181052OCH 30 0 0 10 -2 Figure 4. Transfer characteristics Figure 3. Output characteristics ID (A) 10 -3 GIPG311020181050RID VGS =10 V 240 230 220 210 0 2 4 6 8 10 12 ID (A) page 5/13 STF18N60M6 Electrical characteristics (curves) Figure 7. Capacitance variations C (pF) Figure 8. Output capacitance stored energy EOSS (µJ) GIPG311020181051CVR GADG311020181207EOS 6 10 3 CISS 5 4 10 2 3 10 1 10 10 -1 COSS f = 1 MHz CRSS 1 VDS (V) 0 0 0 10 0 10 1 10 2 Figure 9. Normalized gate threshold voltage vs temperature VGS(th) (norm.) 1.1 GIPG311020181049VTH ID =250 A 200 300 400 500 600 VDS (V) Figure 10. Normalized on-resistance vs temperature RDS(on) (norm.) GIPG311020181049RON VGS = 10 V 2.0 1.5 0.9 1.0 0.8 0.5 0.7 -25 25 75 125 TJ (°C) Figure 11. Normalized V(BR)DSS vs temperature V(BR)DSS (norm.) 1.10 100 2.5 1.0 0.6 -75 2 GIPG311020181050BDV 0.0 -75 -25 25 75 125 TJ (°C) Figure 12. Source-drain diode forward characteristics VSD (V) GIPG311020181051SDF 1.1 Tj = -50 °C ID = 1 mA 1.0 1.05 0.9 Tj = 25 °C 1.00 0.8 0.95 0.7 0.90 0.85 -75 DS12841 - Rev 1 Tj = 150 °C 0.6 -25 25 75 125 TJ (°C) 0.5 0 2 4 6 8 10 12 ISD (A) page 6/13 STF18N60M6 Test circuits 3 Test circuits Figure 13. Test circuit for resistive load switching times Figure 14. Test circuit for gate charge behavior VDD RL RL 2200 + μF 3.3 μF VDD VD RG VGS IG= CONST VGS + pulse width D.U.T. 2.7 kΩ 2200 μF pulse width D.U.T. 100 Ω VG 47 kΩ 1 kΩ AM01469v10 AM01468v1 Figure 15. Test circuit for inductive load switching and diode recovery times D G A D.U.T. S 25 Ω A L A VD 100 µH fast diode B B B 3.3 µF D G + Figure 16. Unclamped inductive load test circuit RG 1000 + µF 2200 + µF VDD 3.3 µF VDD ID D.U.T. S D.U.T. Vi _ pulse width AM01471v1 AM01470v1 Figure 18. Switching time waveform Figure 17. Unclamped inductive waveform ton V(BR)DSS td(on) toff td(off) tr tf VD 90% 90% IDM VDD 10% 0 ID VDD AM01472v1 VGS 0 VDS 10% 90% 10% AM01473v1 DS12841 - Rev 1 page 7/13 STF18N60M6 Package information 4 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. DS12841 - Rev 1 page 8/13 STF18N60M6 TO-220FP package information 4.1 TO-220FP package information Figure 19. TO-220FP package outline 7012510_Rev_12_B DS12841 - Rev 1 page 9/13 STF18N60M6 TO-220FP package information Table 8. TO-220FP package mechanical data Dim. mm Min. Max. A 4.4 4.6 B 2.5 2.7 D 2.5 2.75 E 0.45 0.7 F 0.75 1 F1 1.15 1.70 F2 1.15 1.70 G 4.95 5.2 G1 2.4 2.7 H 10 10.4 L2 DS12841 - Rev 1 Typ. 16 L3 28.6 30.6 L4 9.8 10.6 L5 2.9 3.6 L6 15.9 16.4 L7 9 9.3 Dia 3 3.2 page 10/13 STF18N60M6 Revision history Table 9. Document revision history DS12841 - Rev 1 Date Version 15-Nov-2018 1 Changes First release. page 11/13 STF18N60M6 Contents Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 2 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 4 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 4.1 TO-220FP package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 DS12841 - Rev 1 page 12/13 STF18N60M6 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2018 STMicroelectronics – All rights reserved DS12841 - Rev 1 page 13/13