STF25N60M2-EP
N-channel 600 V, 0.175 Ω typ., 18 A MDmesh™ M2 EP
Power MOSFET in a TO-220FP package
Datasheet - production data
Features
1
2
Order code
VDS @
TJmax
RDS(on)
max.
ID
STF25N60M2-EP
650 V
0.188 Ω
18 A
•
•
•
•
•
3
TO-220FP
Extremely low gate charge
Excellent output capacitance (COSS) profile
Very low turn-off switching losses
100% avalanche tested
Zener-protected
Applications
Figure 1: Internal schematic diagram
•
•
Switching applications
Tailored for Very High Frequency
Converters (f > 150 kHz)
Description
This device is an N-channel Power MOSFET
developed using MDmesh™ M2 EP enhanced
performance technology. Thanks to its strip
layout and an improved vertical structure, the
device exhibits low on-resistance, optimized
switching characteristics with very low turn-off
switching losses, rendering it suitable for the
most demanding very high frequency converters.
Table 1: Device summary
Order code
Marking
Package
Packaging
STF25N60M2-EP
25N60M2EP
TO-220FP
Tube
January 2015
DocID027251 Rev 2
This is information on a product in full production.
1/14
www.st.com
Contents
STF25N60M2-EP
Contents
1
Electrical ratings ............................................................................. 3
2
Electrical characteristics ................................................................ 4
2.1
Electrical characteristics (curves) ...................................................... 6
3
Test circuits ..................................................................................... 9
4
Package mechanical data ............................................................. 10
4.1
5
2/14
TO-220FP package information ...................................................... 11
Revision history ............................................................................ 13
DocID027251 Rev 2
STF25N60M2-EP
1
Electrical ratings
Electrical ratings
Table 2: Absolute maximum ratings
Symbol
VGS
ID
Parameter
Gate-source voltage
Drain current (continuous) at TC = 25 °C
ID
Drain current (continuous) at TC = 100 °C
(2)
IDM
Drain current (pulsed)
PTOT
Value
Unit
± 25
V
(1)
A
18
11.3
72
(1)
(1)
A
A
Total dissipation at TC = 25 °C
30
W
dv/dt
(3)
Peak diode recovery voltage slope
15
V/ns
dv/dt
(4)
MOSFET dv/dt ruggedness
50
V/ns
2500
V
- 55 to 150
°C
Value
Unit
VISO
Insulation withstand voltage (RMS) from all three leads to
external heat sink (t = 1 s, TC = 25 °C)
Tstg
Storage temperature
Tj
Max. operating junction temperature
Notes:
(1)
(2)
Limited Limited by maximum junction temperature.
Pulse width limited by safe operating area.
(3)
ISD ≤ 18 A, di/dt ≤ 400 A/µs; VDS peak < V(BR)DSS, VDD = 400 V.
(4)
VDS ≤ 480 V
Table 3: Thermal data
Symbol
Parameter
Rthj-case
Thermal resistance junction-case max
4.2
°C/W
Rthj-amb
Thermal resistance junction-ambient max
62.5
°C/W
Value
Unit
Table 4: Avalanche characteristics
Symbol
Parameter
IAR
Avalanche current, repetitive or not repetitive
(pulse width limited by Tjmax)
3.5
A
EAS
Single pulse avalanche energy (starting Tj = 25 °C, ID = IAR;
VDD = 50 V)
200
mJ
DocID027251 Rev 2
3/14
Electrical characteristics
2
STF25N60M2-EP
Electrical characteristics
TC = 25 °C unless otherwise specified
Table 5: On/off states
Symbol
Parameter
Test conditions
V(BR)DSS
Drain-source breakdown
voltage
IDSS
Zero gate voltage Drain
current
IGSS
Min.
VGS = 0 V, ID = 1 mA
Typ.
Max.
600
Unit
V
VGS = 0 V, VDS = 600 V
1
µA
VGS = 0 V, VDS = 600 V,
TC = 125 °C
100
µA
Gate-body leakage
current
VDS = 0 V, VGS = ±25 V
±10
µA
VGS(th)
Gate threshold voltage
VDS = VGS, ID = 250 µA
3
4
V
RDS(on)
Static drain-source onresistance
VGS = 10 V, ID = 9 A
0.175
0.188
Ω
Min.
Typ.
Max.
Unit
-
1090
-
pF
-
56
-
pF
-
1.6
-
pF
2
Table 6: Dynamic
Symbol
Parameter
Ciss
Input capacitance
Coss
Output capacitance
Crss
Reverse transfer
capacitance
Test conditions
VDS= 100 V, f = 1 MHz,
VGS = 0 V
Equivalent output
capacitance
VDS = 0 to 480 V, VGS = 0 V
-
255
-
pF
RG
Intrinsic gate resistance
f = 1 MHz, ID = 0 A
-
7
-
Ω
Qg
Total gate charge
-
29
-
nC
Qgs
Gate-source charge
-
6
-
nC
Qgd
Gate-drain charge
-
12
-
nC
Coss eq.
(1)
VDD = 480 V, ID = 18 A,
VGS = 10 V (see Figure 16:
"Gate charge test circuit")
Notes:
(1)
Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS
increases from 0 to 80% VDSS
Table 7: Switching Energy
Symbol
E(off)
4/14
Parameter
Test conditions
Turn-off energy
(from 90% VGS to 0% ID)
Min.
Typ.
Max.
Unit
VDD = 400 V, ID = 2 A
RG = 4.7 Ω, VGS = 10 V
-
7
-
µJ
VDD = 400 V, ID = 4 A
RG = 4.7 Ω, VGS = 10 V
-
8
-
µJ
DocID027251 Rev 2
STF25N60M2-EP
Electrical characteristics
Table 8: Switching times
Symbol
td(on)
tr
Parameter
Turn-on delay time
Rise time
td(off)
tf
Turn-off-delay time
Fall time
Test conditions
Min.
Typ.
Max.
Unit
VDD = 300 V, ID = 9 A
RG = 4.7 Ω, VGS = 10 V
(see Figure 15: "Switching
times test circuit for
resistive load" and Figure
20: "Switching time
waveform")
-
15
-
ns
-
10
-
ns
-
61
-
ns
-
16
-
ns
Min.
Typ.
Max.
Unit
Table 9: Source drain diode
Symbol
ISD
Parameter
Test conditions
Source-drain current
-
18
A
(1)
Source-drain current
(pulsed)
-
72
A
(2)
Forward on voltage
VGS = 0 V, ISD = 18 A
-
1.6
V
trr
Reverse recovery time
-
360
ns
Qrr
Reverse recovery charge
-
5
µC
IRRM
Reverse recovery current
ISD = 18 A,
di/dt = 100 A/µs,
VDD = 100 V (see Figure
17: " Test circuit for
inductive load switching
and diode recovery times")
-
28
A
-
445
ns
-
6.5
µC
-
29
A
ISDM
VSD
trr
Reverse recovery time
Qrr
Reverse recovery charge
IRRM
Reverse recovery current
ISD = 18 A,
di/dt = 100 A/µs,
VDD = 100 V, Tj = 150 °C
(see Figure 17: " Test
circuit for inductive load
switching and diode
recovery times")
Notes:
(1)
(2)
Pulse width is limited by safe operating area
Pulsed: pulse duration = 300 µs, duty cycle 1.5%
DocID027251 Rev 2
5/14
Electrical characteristics
2.2
STF25N60M2-EP
Electrical characteristics (curves)
Figure 3: Thermal impedance
Figure 2: Safe operating area
ID (A)
n)
D
S(
o
O
p
lim era
ite tion
d
by in t
m his
ax a
R rea
GIPG021220141118ALS
10µs
100µs
1ms
is
10
10ms
1
Tj=150°C
TC=25°C
Single pulse
0.1
0.1
10
1
VDS(V)
100
Figure 5: Transfer characteristics
Figure 4: Output characteristics
ID(A)
ID(A)
40
40
35
VGS = 6,7,8,9,10 V
30
VGS = 5 V
25
25
20
20
15
15
10
10
VGS = 4 V
5
5
0
0
8
4
16
12
VGS
(V)
12
GIPG011220140958ALS
VDS
10
0
VDS(V)
Figure 6: Gate charge vs gate-source
voltage
6/14
VDS = 16 V
35
30
VDS
(V)
600
RDS(on) (Ω)
6
300
0.177
4
200
0.174
2
100
0.171
0
30 Qg(nC)
0.168
10
15
20
25
VGS(V)
DocID027251 Rev 2
GIPG011220141210ALS
0.183
0.180
5
8
0.186
400
0
6
4
Figure 7: Static drain-source on-resistance
500
VDD = 480 V
2
0
8
0
GIPG281120141611ALS
GIPG011220141438ALS
VGS = 10 V
0
4
8
12
16
ID(A)
STF25N60M2-EP
Electrical characteristics
Figure 9: Output capacitance stored energy
Figure 8: Capacitance variations
C
(pF)
GIPG181120141549ALS
1000
CISS
EOSS
(μJ)
GIPG181120141603ALS
8
6
100
4
COSS
10
2
CRSS
1
1
0.1
100
10
Figure 10: Turn-off switching loss vs drain
current
EOSS
(μJ)
0
VDS(V)
0
100
200
300
400 500 600 VDS(V)
Figure 11: Normalized gate threshold voltage vs
temperature
GIPG261120141106ALS
VGS(th)
(norm)
GIPG181120141615ALS
1.1
ID = 250 µA
12
1.0
10
0.9
8
0.8
6
0.7
4
0
1
2
3
4
5
6
ID(A)
Figure 12: Normalized on-resistance vs
temperature
RDS(on)
(norm)
GIPG181120141628ALS
0.6
-75
-25
25
75
TJ(°C)
Figure 13: Source-drain diode forward
characteristics
VSD
(V)
GIPG191120141427ALS
TJ=-50°C
1.1
2.2
125
1.0
1.8
VGS = 10 V
0.9
TJ=-50°C
1.4
0.8
1.0
TJ=-50°C
0.7
0.6
0.6
0.2
-75
-25
25
75
125
TJ(°C)
DocID027251 Rev 2
0
0
4
8
12
16
ISD(A)
7/14
Electrical characteristics
STF25N60M2-EP
Figure 14: Normalized V(BR)DSS vs temperature
V(BR)DSS
GIPG191120141457ALS
(norm)
1.08
1.04
1.00
ID = 1mA
0.96
0.92
0.88
-75
8/14
-25
25
DocID027251 Rev 2
75
125
TJ(°C)
STF25N60M2-EP
3
Test circuits
Test circuits
Figure 15: Switching times test circuit for resistive
load
Figure 16: Gate charge test circuit
VDD
47 k Ω
12 V
1 kΩ
100 nF
I G = CONST
Vi ≤ V GS
100 Ω
D.U.T.
2.7 k Ω
2200 μ F
VG
47 k Ω
PW
1 kΩ
AM01469v 1
Figure 17: Test circuit for inductive load
switching and diode recovery times
Figure 18: Unclamped inductive load test circuit
Figure 19: Unclamped inductive waveform
Figure 20: Switching time waveform
t on
V(BR)DSS
t d(on)
toff
tr
t d(off)
tf
VD
90%
90%
I DM
10%
0
ID
VDD
10%
VDD
AM01472v 1
DocID027251 Rev 2
VGS
0
10%
VDS
90%
AM01473v 1
9/14
Package mechanical data
4
STF25N60M2-EP
Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
®
®
ECOPACK packages, depending on their level of environmental compliance. ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
®
ECOPACK is an ST trademark.
10/14
DocID027251 Rev 2
STF25N60M2-EP
4.1
Package mechanical data
TO-220FP package information
Figure 21: TO-220FP package outline
7012510_Rev_K_B
DocID027251 Rev 2
11/14
Package mechanical data
STF25N60M2-EP
Table 10: TO-220FP mechanical data
mm
Dim.
Min.
Max.
A
4.4
4.6
B
2.5
2.7
D
2.5
2.75
E
0.45
0.7
F
0.75
1
F1
1.15
1.70
F2
1.15
1.70
G
4.95
5.2
G1
2.4
2.7
H
10
10.4
L2
12/14
Typ.
16
L3
28.6
30.6
L4
9.8
10.6
L5
2.9
3.6
L6
15.9
16.4
L7
9
9.3
Dia
3
3.2
DocID027251 Rev 2
STF25N60M2-EP
5
Revision history
Revision history
Table 11: Document revision history
Date
Revision
Changes
02-Dec-2014
1
First release.
12-Jan-2015
2
Updated product status from “preliminary data” to “production data”.
14-Jan-2015
3
Corrected product status information on cover page.
DocID027251 Rev 2
13/14
STF25N60M2-EP
IMPORTANT NOTICE – PLEASE READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and
improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST
products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order
acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the
design of Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2015 STMicroelectronics – All rights reserved
14/14
DocID027251 Rev 2