STF27N60M2-EP

STF27N60M2-EP N-channel 600 V, 0.150 Ω typ., 20 A MDmesh™ M2 EP Power MOSFET in TO-220FP package Datasheet - production data Features Order code V STF27N60M2-EP      TO-220FP DS 600 V RDS(on) max ID 0.163 Ω 20 A Extremely low gate charge Excellent output capacitance (COSS) profile Very low turn-off switching losses 100% avalanche tested Zener-protected Applications   Figure 1: Internal schematic diagram D(2) Switching applications Tailored for very high frequency converters (f > 150 kHz) Description These devices are N-channel Power MOSFETs developed using MDmesh™ M2 EP enhanced performance technology. Thanks to their strip layout and an improved vertical structure, these devices exhibit low on-resistance, optimized switching characteristics with very low turn-off switching losses, rendering them suitable for the most demanding very high frequency converters. G(1) S(3) AM15572v1_no_tab Table 1: Device summary Order code Marking Package Packing STF27N60M2-EP 27N60M2EP TO-220FP Tube January 2016 DocID028863 Rev 1 This is information on a product in full production. 1/13 www.st.com Contents STF27N60M2-EP Contents 1 Electrical ratings ............................................................................... 3 2 Electrical characteristics ................................................................. 4 2.1 Electrical characteristics (curves) ...................................................... 6 3 Test circuits ...................................................................................... 8 4 Package information ........................................................................ 9 4.1 5 2/13 TO-220FP package information ...................................................... 10 Revision history .............................................................................. 12 DocID028863 Rev 1 STF27N60M2-EP 1 Electrical ratings Electrical ratings Table 2: Absolute maximum ratings Symbol Parameter Value Unit VGS Gate-source voltage ± 25 V ID(1) Drain current (continuous) at TC = 25 °C 20 A ID(1) Drain current (continuous) at TC = 100 °C 13 A IDM(2) Drain current (pulsed) 80 A PTOT Total dissipation at TC = 25 °C 30 W dv/dt (3) Peak diode recovery voltage slope 15 V/ns dv/dt (4) MOSFET dv/dt ruggedness 50 V/ns VISO Insulation withstand voltage (RMS) from all three leads to external heat sink (t = 1 s; Tc = 25 °C) 2.5 kV Tstg Storage temperature - 55 to 150 °C Tj Operating junction temperature Notes: (1) Limited by maximum junction temperature (2) Pulse width limited by safe operating area. (3) ISD ≤ 20 A, di/dt ≤ 400 A/µs; VDS(peak) < V(BR)DSS, VDD = 400 V. (4) VDS ≤ 480 V Table 3: Thermal data Symbol Parameter Value Unit Rthj-case Thermal resistance junction-case max 4.2 °C/W Rthj-amb Thermal resistance junction-ambient max 62.5 °C/W Table 4: Avalanche characteristics Symbol Parameter Value Unit IAR Avalanche current, repetetive or not repetetive (pulse width limited by Tjmax) 3.6 A EAS Single pulse avalanche energy (starting Tj = 25 °C, ID = IAR; VDD = 50 V) 260 mJ DocID028863 Rev 1 3/13 Electrical characteristics 2 STF27N60M2-EP Electrical characteristics TC = 25 °C unless otherwise specified Table 5: On/off states Symbol V(BR)DSS Parameter Test conditions Drain-source breakdown voltage VGS = 0 V, ID = 1 mA Min. Typ. Max. 600 Unit V VGS = 0 V, VDS = 600 V 1 µA VGS = 0 V, VDS = 600 V, TC = 125 °C 100 µA Gate-body leakage current VDS = 0 V, VGS = ±25 V ±10 µA VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA 3 4 V RDS(on) Static drain-source onresistance VGS = 10 V, ID = 10 A 0.150 0.163 Ω Min. Typ. Max. Unit - 1320 - pF - 70 - pF - 1 - pF IDSS Zero gate voltage drain current IGSS 2 Table 6: Dynamic Symbol Parameter Test conditions Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Coss eq.(1) Equivalent output capacitance VDS = 0 to 480 V, VGS = 0 V - 146 - pF RG Intrinsic gate resistance f = 1 MHz, ID = 0 A - 4 - Ω Qg Total gate charge - 33 - nC - 5.2 - nC - 16 - nC VDS= 100 V, f = 1 MHz, VGS = 0 V VDD = 480 V, ID = 20 A, VGS = 10 V (see Figure 15: "Test circuit for gate charge behavior") Qgs Gate-source charge Qgd Gate-drain charge Notes: (1) Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS Table 7: Switching times Symbol td(on) Turn-on delay time tr Rise time td(off) Turn-offdelay time tf 4/13 Parameter Test conditions VDD = 300 V, ID = 10 A, RG = 4.7 Ω, VGS = 10 V (see Figure 14: "Test circuit for resistive load switching times" and Figure 19: "Switching time waveform" ) Fall time DocID028863 Rev 1 Min. Typ. Max. Unit - 13.4 - ns - 8.1 - ns - 55.6 - ns - 6.3 - ns STF27N60M2-EP Electrical characteristics Table 8: Source-drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit Source-drain current - 20 A ISDM(1) Source-drain current (pulsed) - 80 A VSD (2) Forward on voltage - 1.6 V ISD trr Reverse recovery time Qrr Reverse recovery charge IRRM VGS = 0 V, ISD = 20 A - 271 ns - 3.44 µC Reverse recovery current - 25.4 A trr Reverse recovery time - 352 ns Qrr Reverse recovery charge - 4.82 µC IRRM Reverse recovery current - 27.4 A ISD = 20 A, di/dt = 100 A/µs, VDD = 60 V (see Figure 19: "Switching time waveform") ISD = 20 A, di/dt = 100 A/µs, VDD = 60 V, Tj = 150 °C (see Figure 19: "Switching time waveform") Notes: (1) Pulse width is limited by safe operating area (2) Pulsed: pulse duration = 300 µs, duty cycle 1.5% DocID028863 Rev 1 5/13 Electrical characteristics 2.1 STF27N60M2-EP Electrical characteristics (curves) Figure 2: Safe operating area Figure 3: Thermal impedance GIPG140120161308 RV ID (A) Operation in this area is Limited by RDS(on) 10 tp = 10 µs tp = 100 µs 1 tp = 1 ms Single pulse,Tc =25°C Tj≤150°C,VGS=10 V 0.1 0.1 6/13 1 10 tp = 10 ms 100 VDS[V] Figure 4: Output characteristics Figure 5: Transfer characteristics Figure 6: Gate charge vs gate-source voltage Figure 7: Static drain-source on-resistance DocID028863 Rev 1 STF27N60M2-EP Electrical characteristics Figure 8: Capacitance variations Figure 9: Output capacitance stored energy Figure 10: Normalized V(BR)DSS vs temperature Figure 11: Normalized gate threshold voltage vs temperature Figure 12: Normalized on-resistance vs temperature Figure 13: Source-drain diode forward characteristics DocID028863 Rev 1 7/13 Test circuits 3 STF27N60M2-EP Test circuits Figure 14: Test circuit for resistive load switching times Figure 15: Test circuit for gate charge behavior Figure 16: Test circuit for inductive load switching and diode recovery times Figure 17: Unclamped inductive load test circuit Figure 19: Switching time waveform Figure 18: Unclamped inductive waveform 8/13 DocID028863 Rev 1 STF27N60M2-EP 4 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. DocID028863 Rev 1 9/13 Package information 4.1 STF27N60M2-EP TO-220FP package information Figure 20: TO-220FP package outline 10/13 DocID028863 Rev 1 STF27N60M2-EP Package information Table 9: TO-220FP package mechanical data mm Dim. Min. Typ. Max. A 4.4 4.6 B 2.5 2.7 D 2.5 2.75 E 0.45 0.7 F 0.75 1 F1 1.15 1.70 F2 1.15 1.70 G 4.95 5.2 G1 2.4 2.7 H 10 10.4 L2 16 L3 28.6 30.6 L4 9.8 10.6 L5 2.9 3.6 L6 15.9 16.4 L7 9 9.3 Dia 3 3.2 DocID028863 Rev 1 11/13 Revision history 5 STF27N60M2-EP Revision history Table 10: Document revision history 12/13 Date Revision 14-Jan-2016 1 DocID028863 Rev 1 Changes First release. STF27N60M2-EP IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2016 STMicroelectronics – All rights reserved DocID028863 Rev 1 13/13