STF36N60M6
Datasheet
N-channel 600 V, 85 mΩ typ., 30 A MDmesh™ M6
Power MOSFET in a TO-220FP package
Features
1
2
3
TO-220FP
D(2)
Order code
VDS
RDS(on) max.
ID
STF36N60M6
600 V
99 mΩ
30 A
•
•
Reduced switching losses
Lower RDS(on) per area vs previous generation
•
•
•
Low gate input resistance
100% avalanche tested
Zener-protected
Applications
•
•
•
G(1)
Switching applications
LLC converters
Boost PFC converters
Description
S(3)
AM15572v1_no_tab
Product status link
The new MDmesh™ M6 technology incorporates the most recent advancements to
the well-known and consolidated MDmesh family of SJ MOSFETs.
STMicroelectronics builds on the previous generation of MDmesh devices through its
new M6 technology, which combines excellent RDS(on) per area improvement with
one of the most effective switching behaviors available, as well as a user-friendly
experience for maximum end-application efficiency.
STF36N60M6
Device summary
Order code
STF36N60M6
Marking
36N60M6
Package
TO-220FP
Packing
Tube
DS12609 - Rev 1 - July 2018
For further information contact your local STMicroelectronics sales office.
www.st.com
STF36N60M6
Electrical ratings
1
Electrical ratings
Table 1. Absolute maximum ratings
Symbol
Parameter
Value
Unit
VGS
Gate-source voltage
±25
V
ID (1)
Drain current (continuous) at TC = 25 °C
30
A
ID (1)
Drain current (continuous) at TC = 100 °C
19
A
Drain current (pulsed)
102
A
Total dissipation at TC = 25 °C
40
W
Peak diode recovery voltage slope
15
V/ns
MOSFET dv/dt ruggedness
50
V/ns
VISO
Insulation withstand voltage (RMS) from all three leads to external heat
sink (t = 1 s; TC = 25 °C)
2.5
kV
Tstg
Storage temperature range
-55 to 150
°C
Value
Unit
IDM
(2)
PTOT
dv/dt (3)
dv/dt
(4)
Tj
Operating junction temperature range
1. Limited by maximum junction temperature.
2. Pulse width limited by safe operating area.
3. ISD ≤ 30 A, di/dt ≤ 400 A/μs; VDS(peak) < V(BR)DSS, VDD = 400
4. VDS ≤ 480 V
Table 2. Thermal data
Symbol
Parameter
Rthj-case
Thermal resistance junction-case
3.1
°C/W
Rthj-amb
Thermal resistance junction-ambient
62.5
°C/W
Value
Unit
5
A
750
mJ
Table 3. Avalanche characteristics
Symbol
IAR
EAS
DS12609 - Rev 1
Parameter
Avalanche current, repetitive or not repetitive
(pulse width limited by Tjmax)
Single pulse avalanche energy
(starting Tj = 25 °C, ID = IAR, VDD = 50 V)
page 2/13
STF36N60M6
Electrical characteristics
2
Electrical characteristics
TC = 25 °C unless otherwise specified
Table 4. On/off states
Symbol
V(BR)DSS
Parameter
Test conditions
Drain-source breakdown
voltage
Min.
VGS = 0 V, ID = 1 mA
Typ.
600
Zero gate voltage drain current
IGSS
Gate-body leakage current
VDS = 0 V, VGS = ±25 V
VGS(th)
Gate threshold voltage
VDS = VGS, ID = 250 µA
RDS(on)
Static drain-source onresistance
VGS = 10 V, ID = 15 A
VGS = 0 V, VDS = 600 V, TC = 125
Unit
V
VGS = 0 V, VDS = 600 V
IDSS
Max.
1
µA
100
µA
±5
µA
4
4.75
V
85
99
mΩ
Min.
Typ.
Max.
Unit
-
1960
-
pF
-
93
-
pF
-
6
-
pF
°C(1)
3.25
1. Defined by design, not subject to production test.
Table 5. Dynamic
Symbol
Parameter
Ciss
Input capacitance
Coss
Output capacitance
Crss
Test conditions
VDS= 100 V, f = 1 MHz, VGS = 0 V
Reverse transfer capacitance
(1)
Equivalent output capacitance
VDS = 0 to 480 V, VGS = 0 V
-
332
-
pF
RG
Intrinsic gate resistance
f = 1 MHz, ID = 0 A
-
1.6
-
Ω
Qg
Total gate charge
-
44.3
-
nC
Qgs
Gate-source charge
-
10.1
-
nC
Qgd
Gate-drain charge
-
25
-
nC
Coss eq.
VDD = 480 V, ID = 30 A, VGS = 0 to 10 V
(see Figure 14. Test circuit for gate
charge behavior)
1. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0
to 80% VDSS
Table 6. Switching times
Symbol
td(on)
tr
td(off)
tf
Parameter
Test conditions
Turn-on delay time
Rise time
Turn-off delay time
VDD = 300 V, ID = 15 A, RG = 4.7 Ω,
VGS = 10 V (see Figure 13. Test circuit
for resistive load switching times and
Figure 18. Switching time waveform)
Fall time
Min.
Typ.
Max.
Unit
-
15.2
-
ns
-
5.3
-
ns
-
50.2
-
ns
-
7.3
-
ns
Min.
Typ.
Max.
Unit
30
A
Table 7. Source-drain diode
Symbol
ISD
DS12609 - Rev 1
Parameter
Source-drain current
Test conditions
-
page 3/13
STF36N60M6
Electrical characteristics
Symbol
Parameter
ISDM(1)
Source-drain current (pulsed)
VSD (2)
Forward on voltage
trr
Reverse recovery time
Qrr
Reverse recovery charge
IRRM
Reverse recovery current
trr
Reverse recovery time
Qrr
Reverse recovery charge
IRRM
Reverse recovery current
Test conditions
VGS = 0 V, ISD = 30 A
ISD = 30 A, di/dt = 100 A/µs, VDD = 60 V
(see Figure 15. Test circuit for inductive
load switching and diode recovery times)
ISD = 30 A, di/dt = 100 A/µs, VDD = 60 V,
Tj = 150 °C (see Figure 15. Test circuit
for inductive load switching and diode
recovery times)
Min.
Typ.
Max.
Unit
-
102
A
-
1.6
V
-
340
ns
-
5.3
µC
-
31
A
-
430
ns
-
7.7
µC
-
36
A
1. Pulse width is limited by safe operating area.
2. Pulse test: pulse duration = 300 μs, duty cycle 1.5%.
DS12609 - Rev 1
page 4/13
STF36N60M6
Electrical characteristics (curves)
2.1
Electrical characteristics (curves)
Figure 1. Safe operating area
ID
(A)
Figure 2. Thermal impedance
GIPG050620181503SOA
GC20521
K
Operation in this area is
limited by R DS(on)
δ=0.5
0.2
10 2
10-1
0.05
0.02
0.01
tp =10 µs
10 1
10
tp =100 µs
TJ≤150 °C
TC=25 °C
VGS=10 V
single pulse
0
10 -1
10 -1
10 0
10-2
tp =10 ms
10 1
ID
(A)
VDS (V)
10 2
VGS = 9, 10V
4
6
8
GADG220320170910TCH
VDS = 18V
20
VGS = 5V
10 12 14 16 VDS (V)
Figure 5. Gate charge vs gate-source voltage
VGS
(V)
GADG030220171159QVG VDS
(V)
VDD = 480 V
ID = 30 A
12
0
3
500
89
8
400
87
6
300
85
4
200
83
2
100
81
0
Q g (nC)
79
0
20
30
40
50
5
6
7
8
9
VGS (V)
GADG010220171211RID
RDS(on)
mΩ
91
VDS
4
Figure 6. Static drain-source on-resistance
600
10
tp(s)
40
VGS = 6V
2
Ƭ
10-0
60
VGS = 7V
20
10-1
100
VGS = 8V
40
0
0
10-2
80
60
10
10-3
ID
(A)
80
0
0
tp
10-3
10-4
Figure 4. Transfer characteristics
GADG220320170910OCH
100
Zth= K*R thJ-c
δ =t p/Ƭ
Single pulse
tp =1 ms
Figure 3. Output characteristics
DS12609 - Rev 1
0.1
VGS =10 V
5
10
15
20
25
30
ID (A)
page 5/13
STF36N60M6
Electrical characteristics (curves)
Figure 8. Normalized gate threshold voltage vs
temperature
Figure 7. Capacitance variations
C
(pF)
GADG220320170921CVR
VGS(th)
(norm.)
104
GIPG300920151316VTH
ID = 250 µA
1.1
CISS
103
1.0
0.9
102
COSS
f= 1MHz
0.8
101
CRSS
0.7
100
10-1
100
101
VDS (V)
102
Figure 9. Normalized on-resistance vs temperature
RDS(on)
(norm.)
GIPG300920151317RON
VGS = 10 V
0.6
-75
25
75
V(BR)DSS
(norm.)
GIPG300920151318BDV
ID = 1 mA
1.00
1.4
1.0
0.96
0.6
0.92
-25
25
75
125
TJ (°C)
Figure 11. Output capacitance stored energy
EOSS
(µJ)
GADG010220171214EOS
0.88
-75
-25
25
75
125
TJ (°C)
Figure 12. Source-drain diode forward characteristics
VSD
(V)
GADG010220171212SDF
1.1
16
TJ = -50 °C
1.0
12
TJ = 25 °C
0.9
0.8
8
TJ = 150 °C
0.7
4
DS12609 - Rev 1
TJ (°C)
1.04
1.8
0
0
125
Figure 10. Normalized V(BR)DSS vs temperature
1.08
2.2
0.2
-75
-25
0.6
100
200
300
400
500
600
VDS (V)
0.5
0
5
10
15
20
25
30
ISD (A)
page 6/13
STF36N60M6
Test circuits
3
Test circuits
Figure 13. Test circuit for resistive load switching times
Figure 14. Test circuit for gate charge behavior
VDD
12 V
2200
+ μF
3.3
μF
VDD
VD
VGS
1 kΩ
100 nF
RL
IG= CONST
VGS
RG
47 kΩ
+
pulse width
D.U.T.
2.7 kΩ
2200
μF
pulse width
D.U.T.
100 Ω
VG
47 kΩ
1 kΩ
AM01469v1
AM01468v1
Figure 15. Test circuit for inductive load switching and
diode recovery times
D
G
A
D.U.T.
S
25 Ω
A
L
A
B
B
3.3
µF
D
G
+
VD
100 µH
fast
diode
B
Figure 16. Unclamped inductive load test circuit
RG
1000
+ µF
2200
+ µF
VDD
3.3
µF
VDD
ID
D.U.T.
S
D.U.T.
Vi
_
pulse width
AM01471v1
AM01470v1
Figure 18. Switching time waveform
Figure 17. Unclamped inductive waveform
ton
V(BR)DSS
td(on)
VD
toff
td(off)
tr
tf
90%
90%
IDM
VDD
10%
0
ID
VDD
AM01472v1
VGS
0
VDS
10%
90%
10%
AM01473v1
DS12609 - Rev 1
page 7/13
STF36N60M6
Package information
4
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK®
packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions
and product status are available at: www.st.com. ECOPACK® is an ST trademark.
DS12609 - Rev 1
page 8/13
STF36N60M6
TO-220FP package information
4.1
TO-220 type A package information
Figure 19. TO-220FP package outline
7012510_Rev_12_B
DS12609 - Rev 1
page 9/13
STF36N60M6
TO-220FP package information
Table 8. TO-220FP package mechanical data
Dim.
mm
Min.
Max.
A
4.4
4.6
B
2.5
2.7
D
2.5
2.75
E
0.45
0.7
F
0.75
1
F1
1.15
1.70
F2
1.15
1.70
G
4.95
5.2
G1
2.4
2.7
H
10
10.4
L2
DS12609 - Rev 1
Typ.
16
L3
28.6
30.6
L4
9.8
10.6
L5
2.9
3.6
L6
15.9
16.4
L7
9
9.3
Dia
3
3.2
page 10/13
STF36N60M6
Revision history
Table 9. Document revision history
DS12609 - Rev 1
Date
Revision
02-Jul-2018
1
Changes
First release.
page 11/13
STF36N60M6
Contents
Contents
1
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
2
Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.1
Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3
Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
4
Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
4.1
TO-220 type A package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
DS12609 - Rev 1
page 12/13
STF36N60M6
IMPORTANT NOTICE – PLEASE READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST
products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST
products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of
Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2018 STMicroelectronics – All rights reserved
DS12609 - Rev 1
page 13/13
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