STF4N80K5

STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5 N-channel 800 V, 2.1 Ω typ., 3 A MDmesh™ K5 Power MOSFETs in DPAK, TO-220FP, TO-220 and IPAK packages Datasheet - production data Features TAB Order code VDS RDS(on) max. ID PTOT 3 STD4N80K5 1 DPAK 60 W 3 1 STF4N80K5 2 800 V TO-220FP TAB 20 W 2.5 Ω 3A STP4N80K5 60 W STU4N80K5 TAB 1 2 3 3 2 1 IPAK TO-220 • Industry’s lowest RDS(on) x area • Industry’s best figure of merit (FoM) • Ultra low gate charge • 100% avalanche tested Figure 1. Internal schematic diagram • Zener-protected '7$% Applications • Switching applications Description * 6 AM01476v1 These very high voltage N-channel Power MOSFETs are designed using MDmesh™ K5 technology based on an innovative proprietary vertical structure. The result is a dramatic reduction in on-resistance and ultra-low gate charge for applications requiring superior power density and high efficiency. Table 1. Device summary Order code Marking Packages Packaging DPAK Tape and reel STD4N80K5 STF4N80K5 TO-220FP 4N80K5 STP4N80K5 TO-220 STU4N80K5 IPAK February 2015 This is information on a product in full production. DocID025105 Rev 3 Tube 1/23 www.st.com Contents STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5 Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 Test circuits .............................................. 9 4 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4.1 DPAK(TO-252), package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 4.2 TO-220FP, package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4.3 TO-220, package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.4 IPAK(TO-251), package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5 Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 2/23 DocID025105 Rev 3 STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5 1 Electrical ratings Electrical ratings Table 2. Absolute maximum ratings Value Symbol Parameter DPAK, IPAK Unit TO-220FP TO-220 VDS Drain-source voltage 800 V VGS Gate- source voltage ±30 V ID Drain current (continuous) at TC = 25 °C 3 ID Drain current (continuous) at TC = 100 °C 1.7 Drain current (pulsed) 12 Total dissipation at TC = 25 °C 60 IDM (2) PTOT 3 (1) 3 A 1.7 (1) 1.7 A (1) 12 A 60 W 12 20 IAR Avalanche current, repetitive or notrepetitive (pulse width limited by TJ max) 1 A EAS Single pulse avalanche energy (starting TJ = 25 °C, ID = IAR, VDD = 50 V) 74.5 mJ Peak diode recovery voltage slope 4.5 V/ns MOSFET dv/dt ruggedness 50 V/ns dv/dt(3) (4) dv/dt VISO Insulation withstand voltage (RMS) from all three leads to external heat sink (t = 1 s, TC = 25 °C) TJ Operating junction temperature Tstg Storage temperature 2500 V °C -55 to 150 °C 1. Limited by maximum junction temperature 2. Pulse width limited by safe operating area 3. ISD < 3 A, di/dt < 100 A/µs, VDS(peak) ≤ V(BR)DSS 4. VDS ≤ 640 V Table 3. Thermal data Value Symbol Parameter Rthj-case Thermal resistance junction-case max Rthj-amb Thermal resistance junction-ambient max Rthj-pcb(1) Thermal resistance junction-pcb max Unit DPAK, IPAK TO-220FP TO-220 2.08 6.25 2.08 62.5 50 °C/W °C/W °C/W 1. When mounted on 1inch² FR-4 board, 2 oz Cu DocID025105 Rev 3 3/23 23 Electrical characteristics 2 STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5 Electrical characteristics (Tcase =25 °C unless otherwise specified) Table 4. On /off states Symbol V(BR)DSS Parameter Test conditions Drain-source breakdown voltage ID = 1 mA, VGS = 0 IDSS VDS = 800 V Zero gate voltage drain current (VGS = 0) VDS = 800 V, TC=125 °C IGSS Gate-body leakage current (VDS = 0) Min. Typ. Gate threshold voltage VDS = VGS, ID = 100 µA RDS(on) Static drain-source onVGS = 10 V, ID = 1.5 A resistance Unit 800 V 1 µA 50 µA ±10 µA 4 5 V 2.1 2.5 Ω Min. Typ. Max. Unit - 175 - pF - 18 - pF - 0.5 - pF VGS = ± 20 V VGS(th) Max. 3 Table 5. Dynamic Symbol Parameter Test conditions Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Co(tr)(1) Equivalent capacitance time related VDS = 0 to 640 V, VGS = 0 - 26 - pF Co(er)(2) Equivalent capacitance energy related VDS = 0 to 640 V, VGS = 0 - 11 - pF Rg Gate input resistance f=1 MHz, ID = 0 - 15 - Ω Qg Total gate charge - 10.5 - nC Qgs Gate-source charge - 2 - nC Qgd Gate-drain charge VDD = 640 V, ID = 3 A, VGS = 10 V (see Figure 19) - 7.5 - nC VDS = 100 V, f = 1 MHz, VGS = 0 1. Time related is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS 2. Energy related is defined as a constant equivalent capacitance giving the same stored energy as Coss when VDS increases from 0 to 80% VDSS 4/23 DocID025105 Rev 3 STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5 Electrical characteristics Table 6. Switching times Symbol td(on) tr Parameter Test conditions Turn-on delay time VDD = 400 V, ID = 1.5 A, RG = 4.7 Ω, VGS = 10 V (see Figure 18) Rise time td(off) tf Turn-off-delay time Fall time Min. Typ. Max. Unit - 16.5 - ns - 15 - ns - 36 - ns - 21 - ns Table 7. Source drain diode Symbol ISD ISDM (1) VSD (2) Parameter Test conditions Source-drain current Min. Typ. Max. Unit - Source-drain current (pulsed) 3 A 12 A 1.5 V Forward on voltage ISD = 3 A, VGS = 0 - trr Reverse recovery time - 242 ns Qrr Reverse recovery charge - 1.42 µC IRRM Reverse recovery current ISD = 3 A, di/dt = 100 A/µs VDD= 60 V (see Figure 20) - 12 A ISD = 3 A, di/dt = 100 A/µs VDD= 60 V TJ = 150 °C (see Figure 20) - 373 ns - 1.98 µC - 10.5 A trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current 1. Pulse width limited by safe operating area 2. Pulsed: pulse duration = 300 µs, duty cycle 1.5% Table 8. Gate-source Zener diode Symbol V(BR)GSO Parameter Test conditions Gate-source breakdown voltage IGS= ± 1 mA, ID=0 Min. 30 Typ. Max. Unit - V The built-in back-to-back Zener diodes have been specifically designed to enhance the ESD capability of the device. The Zener voltage is appropriate for efficient and cost-effective intervention to protect the device integrity. These integrated Zener diodes thus eliminate the need for external components. DocID025105 Rev 3 5/23 23 Electrical characteristics 2.1 STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5 Electrical characteristics (curves) Figure 2. Safe operating area for DPAK and IPAK Figure 3. Thermal impedance for DPAK and IPAK AM15986v1 ID (A) Tj=150°C Tc=25°C Single pulse 10 Op Lim era ite tion d by in t m his ax ar RD ea S( on is 10µs 100µs ) 1 1ms 10ms 0.1 0.01 0.1 10 1 100 VDS(V) Figure 4. Safe operating area for TO-220FP Figure 5. Thermal impedance for TO-220FP AM15987v1 ID (A) Tj=150°C Tc=25°C Single pulse 10 10µs ) Op Lim era ite tion d by in t m his ax ar RD ea S( on is 1 100µs 1ms 10ms 0.1 0.01 0.1 10 1 100 VDS(V) Figure 6. Safe operating area for TO-220 Figure 7. Thermal impedance for TO-220 AM15988v1 ID (A) Tj=150°C Tc=25°C Single pulse 10 Op Lim era ite tion d by in t m his ax ar RD ea S( on is 10µs ) 100µs 1 1ms 10ms 0.1 0.01 0.1 6/23 1 10 100 VDS(V) DocID025105 Rev 3 STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5 Figure 8. Output characteristics Electrical characteristics Figure 9. Transfer characteristics AM15989v1 ID (A) AM15990v1 ID (A) VGS=10, 11 V 5 VDS=20V 5 9V 4 4 3 3 8V 2 2 7V 1 1 6V 0 4 0 12 8 16 0 VDS(V) Figure 10. Gate charge vs gate-source voltage AM15991v1 VDS (V) VGS (V) VDD=640V ID=3A VDS 12 600 10 500 8 400 6 300 4 200 2 100 7 6 5 8 9 10 VGS(V) Figure 11. Static drain-source on-resistance *,3'59 5'6RQ ȍ 9*6 9     0 0 2 4 6 8 10 0 Qg(nC) Figure 12. Capacitance variations     ,'$   Figure 13. Normalized gate threshold voltage vs temperature *,3'59 & S)  AM15639v1 VGS(th) (norm)  ID=100µA VDS=VGS 1 &LVV  0.8  &RVV &UVV    0.6 I 0+]    9'69 0.4 -50 DocID025105 Rev 3 0 50 100 TJ(°C) 7/23 23 Electrical characteristics STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5 Figure 14. Normalized on-resistance vs temperature AM15640v1 RDS(on) (norm) VGS=10V ID=1.5 A 2.4 Figure 15. Source-drain diode forward characteristics AM15994v1 VSD (V) 1 2 0.9 1.6 0.8 1.2 0.7 0.8 0.6 TJ=-50°C TJ=25°C TJ=150°C 0.4 -50 0.5 0 50 100 0.5 TJ(°C) Figure 16. Normalized VDS vs temperature 1 2 1.5 2.5 Figure 17. Maximum avalanche energy vs. starting TJ AM15642v1 VDS (norm) ISD(A) AM15995v1 EAS (mJ) 1.1 ID = 1mA 60 1.06 1.02 40 0.98 20 0.94 0.9 -50 8/23 0 50 100 TJ(°C) DocID025105 Rev 3 0 0 40 80 120 TJ(°C) STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5 3 Test circuits Test circuits Figure 18. Switching times test circuit for resistive load Figure 19. Gate charge test circuit VDD 12V 47kΩ 1kΩ 100nF 3.3 μF 2200 RL μF IG=CONST VDD VGS 100Ω Vi=20V=VGMAX VD RG 2200 μF D.U.T. D.U.T. VG 2.7kΩ PW 47kΩ 1kΩ PW AM01468v1 Figure 20. Test circuit for inductive load switching and diode recovery times A A AM01469v1 Figure 21. Unclamped inductive load test circuit L A D G D.U.T. FAST DIODE B B VD L=100μH S 3.3 μF B 25 Ω 1000 μF D VDD 2200 μF 3.3 μF VDD ID G RG S Vi D.U.T. Pw AM01470v1 AM01471v1 Figure 22. Unclamped inductive waveform Figure 23. Switching time waveform ton V(BR)DSS tdon VD toff tr tdoff tf 90% 90% IDM 10% ID VDD 10% 0 VDD VDS 90% VGS AM01472v1 0 DocID025105 Rev 3 10% AM01473v1 9/23 23 Package information 4 STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 10/23 DocID025105 Rev 3 STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5 4.1 Package information DPAK(TO-252), package information Figure 24. DPAK (TO-252) type A outline B5 DocID025105 Rev 3 11/23 23 Package information STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5 Figure 25. DPAK (TO-252) mechanical data mm Dim. Min. Typ. A 2.20 2.40 A1 0.90 1.10 A2 0.03 0.23 b 0.64 0.90 b4 5.20 5.40 c 0.45 0.60 c2 0.48 0.60 D 6.00 6.20 D1 E 5.10 6.40 6.60 E1 4.70 e 2.28 e1 4.40 4.60 H 9.35 10.10 L 1.00 1.50 L1 2.80 L2 0.80 L4 0.60 1.00 R V2 12/23 Max. 0.20 0° 8° DocID025105 Rev 3 STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5 Package information Figure 26. DPAK (TO-252) footprint (a) )3B5 a. All dimensions are in millimeters DocID025105 Rev 3 13/23 23 Package information 4.2 STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5 TO-220FP, package information Figure 27. TO-220FP outline 7012510_Rev_K_B 14/23 DocID025105 Rev 3 STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5 Package information Table 9. TO-220FP mechanical data mm Dim. Min. Typ. Max. A 4.4 4.6 B 2.5 2.7 D 2.5 2.75 E 0.45 0.7 F 0.75 1 F1 1.15 1.70 F2 1.15 1.70 G 4.95 5.2 G1 2.4 2.7 H 10 10.4 L2 16 L3 28.6 30.6 L4 9.8 10.6 L5 2.9 3.6 L6 15.9 16.4 L7 9 9.3 Dia 3 3.2 DocID025105 Rev 3 15/23 23 Package information 4.3 STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5 TO-220, package information Figure 28. TO-220 type A outline BW\SH$B5HYB7 16/23 DocID025105 Rev 3 STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5 Package information Table 10. TO-220 type A mechanical data mm Dim. Min. Typ. Max. A 4.40 4.60 b 0.61 0.88 b1 1.14 1.70 c 0.48 0.70 D 15.25 15.75 D1 1.27 E 10 10.40 e 2.40 2.70 e1 4.95 5.15 F 1.23 1.32 H1 6.20 6.60 J1 2.40 2.72 L 13 14 L1 3.50 3.93 L20 16.40 L30 28.90 ∅P 3.75 3.85 Q 2.65 2.95 DocID025105 Rev 3 17/23 23 Package information 4.4 STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5 IPAK(TO-251), package information Figure 29. IPAK (TO-251) type A outline B0 18/23 DocID025105 Rev 3 STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5 Package information Table 11. IPAK (TO-251) type A mechanical data mm. DIM min. typ. max. A 2.20 2.40 A1 0.90 1.10 b 0.64 0.90 b2 b4 0.95 5.20 B5 5.40 0.30 c 0.45 0.60 c2 0.48 0.60 D 6.00 6.20 E 6.40 6.60 e e1 2.28 4.40 H 4.60 16.10 L 9.00 9.40 L1 0.80 1.20 L2 0.80 V1 10° DocID025105 Rev 3 1.00 19/23 23 Packaging mechanical data 5 STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5 Packaging mechanical data Table 12. DPAK (TO-252) tape and reel mechanical data Tape Reel mm mm Dim. Dim. Min. Max. A0 6.8 7 A B0 10.4 10.6 B 1.5 12.1 C 12.8 1.6 D 20.2 G 16.4 50 B1 20/23 Min. Max. 330 13.2 D 1.5 D1 1.5 E 1.65 1.85 N F 7.4 7.6 T K0 2.55 2.75 P0 3.9 4.1 Base qty. 2500 P1 7.9 8.1 Bulk qty. 2500 P2 1.9 2.1 R 40 T 0.25 0.35 W 15.7 16.3 DocID025105 Rev 3 18.4 22.4 STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5 Packaging mechanical data Figure 30. Tape for DPAK (TO-252) 10 pitches cumulative tolerance on tape +/- 0.2 mm T P0 Top cover tape P2 D E F B1 W K0 B0 For machine ref. only including draft and radii concentric around B0 A0 P1 D1 User direction of feed R Bending radius User direction of feed AM08852v1 Figure 31. Reel for DPAK (TO-252) T REEL DIMENSIONS 40mm min. Access hole At sl ot location B D C N A Full radius Tape slot in core for tape start 25 mm min. width G measured at hub AM08851v2 DocID025105 Rev 3 21/23 23 Revision history 6 STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5 Revision history Table 13. Document revision history Date Revision 09-Aug-2013 1 First release 13-Dec-2013 2 – Added: IPAK package – Added: Table 11 and Figure 29 – Minor text changes 3 – Updated title and description in cover page. – Updated Table 2.: Absolute maximum ratings, Table 5.: Dynamic and Table 7.: Source drain diode. – Updated 4: Package information and 5: Packaging mechanical data. – Minor text changes. 04-Feb-2015 22/23 Changes DocID025105 Rev 3 STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2015 STMicroelectronics – All rights reserved DocID025105 Rev 3 23/23 23