STF5N80K5
N-channel 800 V, 1.50 Ω typ., 4 A MDmesh™ K5
Power MOSFET in a TO-220FP package
Datasheet - production data
Features
TO-220FP
Order code
VDS
RDS(on) max.
ID
STF5N80K5
800 V
1.75 Ω
4A
Industry’s lowest RDS(on) x area
Industry’s best FoM (figure of merit)
Ultra-low gate charge
100% avalanche tested
Zener-protected
Applications
Figure 1: Internal schematic diagram
D(2)
Switching applications
Description
This very high voltage N-channel Power
MOSFET is designed using MDmesh™ K5
technology based on an innovative proprietary
vertical structure. The result is a dramatic
reduction in on-resistance and ultra-low gate
charge for applications requiring superior power
density and high efficiency.
G(1)
S(3)
AM15572v1_no_tab
Table 1: Device summary
Order code
Marking
Package
Packing
STF5N80K5
5N80K5
TO-220FP
Tube
May 2016
DocID028509 Rev 3
This is information on a product in full production.
1/13
www.st.com
Contents
STF5N80K5
Contents
1
Electrical ratings ............................................................................. 3
2
Electrical characteristics ................................................................ 4
2.1
Electrical characteristics (curves) ...................................................... 6
3
Test circuits ..................................................................................... 8
4
Package information ....................................................................... 9
4.1
5
2/13
TO-220FP package information ...................................................... 10
Revision history ............................................................................ 12
DocID028509 Rev 3
STF5N80K5
1
Electrical ratings
Electrical ratings
Table 2: Absolute maximum ratings
Symbol
VGS
Parameter
Value
Unit
± 30
V
ID
Gate-source voltage
Drain current (continuous) at TC = 25 °C
4
A
ID
Drain current (continuous) at TC = 100 °C
2.3
A
Drain current (pulsed)
16
A
W
ID(1)
PTOT
Total dissipation at TC = 25 °C
20
dv/dt
(2)
Peak diode recovery voltage slope
4.5
dv/dt
(3)
MOSFET dv/dt ruggedness
50
Insulation withstand voltage (RMS) from all three leads to external heat
sink (t=1 s; TC= 25 °C)
VISO
Tj
Operating junction temperature range
Tstg
Storage temperature range
V/ns
2500
V
- 55 to
150
°C
Notes:
(1)Pulse
(2)I
SD
(3)V
width limited by safe operating area
≤ 4 A, di/dt =100 A/μs; VDS peak < V(BR)DSS, VDD = 640 V
DS
≤ 640 V
Table 3: Thermal data
Symbol
Parameter
Value
Unit
Rthj-case
Thermal resistance junction-case
6.25
°C/W
Rthj-amb
Thermal resistance junction-ambient
62.5
°C/W
Table 4: Avalanche characteristics
Symbol
Parameter
Value
Unit
IAR
Avalanche current, repetitive or not repetitive (pulse width limited by
Tjmax)
1.2
A
EAS
Single pulse avalanche energy (starting Tj = 25 °C, ID = IAR, VDD = 50 V)
165
mJ
DocID028509 Rev 3
3/13
Electrical characteristics
2
STF5N80K5
Electrical characteristics
TC = 25 °C unless otherwise specified
Table 5: On/off-state
Symbol
V(BR)DSS
Parameter
Drain-source breakdown voltage
Test conditions
Min.
VGS = 0 V, ID = 1 mA
800
Typ.
Max.
Unit
V
VGS = 0 V, VDS = 800 V
1
µA
IDSS
Zero gate voltage drain current
VGS = 0 V, VDS = 800 V
TC = 125 °C (1)
50
µA
IGSS
Gate body leakage current
VDS = 0 V, VGS = ±20 V
±10
µA
VGS(th)
Gate threshold voltage
VDD = VGS, ID = 100 µA
4
5
V
RDS(on)
Static drain-source on-resistance
VGS = 10 V, ID = 2 A
1.50
1.75
Ω
Min.
Typ.
Max.
Unit
-
177
-
pF
-
15
-
pF
3
Notes:
(1)Defined
by design, not subject to production test
Table 6: Dynamic
Symbol
Ciss
Parameter
Test conditions
Input capacitance
VDS = 100 V, f = 1 MHz,
VGS = 0 V
Coss
Output capacitance
Crss
Reverse transfer capacitance
Co(tr)(1)
Equivalent capacitance time
related
-
0.3
-
pF
-
33
-
pf
-
12
-
pf
VDS = 0 to 640 V, VGS = 0 V
Co(er)(2)
Equivalent capacitance
energy related
Rg
Intrinsic gate resistance
f = 1 MHz , ID= 0 A
-
16
-
Ω
Qg
Total gate charge
-
5
-
nC
Qgs
Gate-source charge
-
1.7
-
nC
Qgd
Gate-drain charge
VDD = 640 V, ID = 4 A
VGS= 10 V
see Figure 15: "Test circuit
for gate charge behavior"
-
2.9
-
nC
Notes:
(1)C
o(tr)
is a constant capacitance value that gives the same charging time as Coss while VDS is rising from 0 to
80% VDSS.
(2)C
o(er)
is a constant capacitance value that gives the same stored energy as Coss while VDS is rising from 0 to
80% VDSS.
4/13
DocID028509 Rev 3
STF5N80K5
Electrical characteristics
Table 7: Switching times
Symbol
td(on)
Parameter
Turn-on delay time
tr
Rise time
td(off)
Turn-off delay time
tf
Fall time
Test conditions
Min.
Typ.
Max.
Unit
VDD= 400 V, ID = 2 A, RG = 4.7 Ω
VGS = 10 V
see Figure 14: "Test circuit for
resistive load switching times" and
Figure 19: "Switching time
waveform"
-
12.7
-
ns
-
11.7
-
ns
-
23
-
ns
-
14.8
-
ns
Min.
Typ.
Max.
Unit
Table 8: Source-drain diode
Symbol
ISD
Parameter
Test conditions
Source-drain current
-
4
A
ISDM(1)
Source-drain current (pulsed)
-
16
A
VSD(2)
Forward on voltage
ISD = 4 A, VGS = 0 V
-
1.6
V
Reverse recovery time
ISD = 4 A, di/dt = 100 A/µs,
VDD = 60 V
see Figure 16: "Test circuit
for inductive load switching
and diode recovery times"
-
265
ns
-
1.59
µC
-
12
A
ISD = 4 A, di/dt = 100 A/µs,
VDD = 60 V, Tj = 150 °C
see Figure 16: "Test circuit
for inductive load switching
and diode recovery times"
-
386
ns
-
2.18
µC
-
11.3
A
trr
Qrr
Reverrse recovery charge
IRRM
Reverse recovery current
trr
Reverse recovery time
Qrr
Reverse recovery charge
IRRM
Reverse recovery current
Notes:
(1)Pulse
width limited by safe operating area
(2)Pulsed:
pulse duration = 300 µs, duty cycle 1.5%
Table 9: Gate-source Zener diode
Symbol
V(BR)GSO
Parameter
Gate-source breakdown voltage
Test conditions
IGS= ± 1mA, ID= 0 A
Min.
Typ.
Max.
Unit
30
-
-
V
The built-in back-to-back Zener diodes are specifically designed to enhance the ESD
performance of the device. The Zener voltage facilitates efficient and cost-effective device
integrity protection, thus eliminating the need for additional external componentry.
DocID028509 Rev 3
5/13
Electrical characteristics
2.1
6/13
STF5N80K5
Electrical characteristics (curves)
Figure 2: Safe operating area
Figure 3: Thermal impedance
Figure 4: Output characteristics
Figure 5: Transfer characteristics
Figure 6: Gate charge vs gate-source voltage
Figure 7: Static drain-source on-resistance
DocID028509 Rev 3
STF5N80K5
Electrical characteristics
Figure 8: Capacitance variations
Figure 9: Normalized gate threshold voltage
vs temperature
Figure 10: Normalized on-resistance vs
temperature
Figure 11: Normalized V(BR)DSS vs
temperature
Figure 12: Maximum avalanche energy vs
starting TJ
Figure 13: Source-drain diode forward
characteristics
DocID028509 Rev 3
7/13
Test circuits
3
STF5N80K5
Test circuits
Figure 14: Test circuit for resistive load
switching times
Figure 15: Test circuit for gate charge
behavior
VDD
RL
IG= CONST
VGS
+
pulse width
2200
μF
100 Ω
D.U.T.
2.7 kΩ
VG
47 kΩ
1 kΩ
AM01469v10
Figure 16: Test circuit for inductive load
switching and diode recovery times
Figure 17: Unclamped inductive load test
circuit
Figure 18: Unclamped inductive waveform
8/13
DocID028509 Rev 3
Figure 19: Switching time waveform
STF5N80K5
4
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK ®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
DocID028509 Rev 3
9/13
Package information
4.1
STF5N80K5
TO-220FP package information
Figure 20: TO-220FP package outline
10/13
DocID028509 Rev 3
STF5N80K5
Package information
Table 10: TO-220FP package mechanical data
mm
Dim.
Min.
Typ.
Max.
A
4.4
4.6
B
2.5
2.7
D
2.5
2.75
E
0.45
0.7
F
0.75
1
F1
1.15
1.70
F2
1.15
1.70
G
4.95
5.2
G1
2.4
2.7
H
10
10.4
L2
16
L3
28.6
30.6
L4
9.8
10.6
L5
2.9
3.6
L6
15.9
16.4
L7
9
9.3
Dia
3
3.2
DocID028509 Rev 3
11/13
Revision history
5
STF5N80K5
Revision history
Table 11: Document revision history
Date
Revision
16-Oct-2015
1
First release.
06-Nov-2015
2
Updated title in cover page.
3
Modified: title
Table 2: "Absolute maximum ratings", Table 3: "Thermal data",
Table 5: "On/off-state", Table 6: "Dynamic", Table 7: "Switching
times", Table 8: "Source-drain diode"
Added: Section 3.1: "Electrical characteristics (curves)"
Modified: Section 4: "Test circuits"
Minor text changes
09-May-2016
12/13
Changes
DocID028509 Rev 3
STF5N80K5
IMPORTANT NOTICE – PLEASE READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and
improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST
products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order
acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the
design of Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2016 STMicroelectronics – All rights reserved
DocID028509 Rev 3
13/13