STD6N52K3
Datasheet
N-channel 525 V, 1 Ω typ., 6.5 A MDmesh™ K3
Power MOSFET in DPAK package
Features
TAB
2 3
1
•
•
•
•
•
DPAK
D(2, TAB)
Order codes
VDS
RDS(on) max.
ID
PTOT
STD6N52K3
525 V
1.2 Ω
5A
70 W
100% avalanche tested
Extremely high dv/dt capability
Very low intrinsic capacitance
Improved diode reverse recovery characteristics
Zener-protected
Applications
G(1)
•
S(3)
AM01475V1
Switching applications
Description
This MDmesh™ K3 Power MOSFET is the result of improvements applied to
STMicroelectronics’ MDmesh™ technology, combined with a new optimized vertical
structure. This device boasts an extremely low on-resistance, superior dynamic
performance and high avalanche capability, rendering it suitable for the most
demanding applications.
Product status link
STD6N52K3
Product summary
Order code
STD6N52K3
Marking
6N52K3
Package
DPAK
Packing
Tape and reel
DS5919 - Rev 3 - September 2018
For further information contact your local STMicroelectronics sales office.
www.st.com
STD6N52K3
Electrical ratings
1
Electrical ratings
Table 1. Absolute maximum ratings
Symbol
VGS
Parameter
Gate- source voltage
Value
Unit
±30
V
ID
Drain current (continuous) at TC = 25 °C
5
A
ID
Drain current (continuous) at TC = 100 °C
3
A
IDM (1)
Drain current (pulsed)
20
A
PTOT
Total dissipation at TC = 25 °C
70
W
Avalanche current, repetitive or not-repetitive
2.5
A
Single pulse avalanche energy
110
mJ
Peak diode recovery voltage slope
12
V/ns
-55 to 150
°C
Value
Unit
IAR
EAS (2)
dv/dt
(3)
Tstg
Tj
Storage temperature range
Operating junction temperature range
1. Pulse width limited by safe operating area.
2. Starting Tj = 25 °C, ID = IAR, VDD = 50 V.
3. ISD ≤ 5 A, di/dt ≤ 400 A/µs, VDD = 80% V(BR)DSS, VDS peak ≤ V(BR)DSS.
Table 2. Thermal data
Symbol
Parameter
Rthj-case
Thermal resistance junction-case
1.79
°C/W
Rthj-pcb (1)
Thermal resistance junction-pcb
50
°C/W
1. When mounted on 1inch² FR-4 board, 2 oz Cu.
DS5919 - Rev 3
page 2/18
STD6N52K3
Electrical characteristics
2
Electrical characteristics
(TC = 25 °C unless otherwise specified)
Table 3. On /off states
Symbol
V(BR)DSS
Parameter
Drain-source breakdown
voltage
Test conditions
ID = 1 mA, VGS = 0 V
Min.
Typ.
Max.
525
Unit
V
VGS = 0 V, VDS = 525 V
1
µA
VGS = 0 V, VDS = 525 V
TC = 125 °C (1)
50
µA
±10
µA
3.75
4.5
V
1
1.2
Ω
Typ.
Max.
Unit
-
pF
IDSS
Zero gate voltage drain
current
IGSS
Gate body leakage current
VGS = ±20 V, VDS = 0 V
VGS(th)
Gate threshold voltage
VDS = VGS, ID = 50 µA
RDS(on)
Static drain-source on
resistance
VGS = 10 V, ID = 2.5 A
3
1. Defined by design, not subject to production test.
Table 4. Dynamic
Symbol
Ciss
Parameter
Test conditions
Min.
Input capacitance
670
VDS = 50 V, f = 1 MHz,
VGS = 0 V
Coss
Output capacitance
Crss
Reverse transfer capacitance
Coss eq. (1)
Equivalent output capacitance
VGS = 0 V,
VDS = 0 to 420 V
RG
Intrinsic gate resistance
f = 1 MHz open drain
Qg
Total gate charge
VDD = 420 V, ID = 5 A,
Qgs
Gate-source charge
Qgd
Gate-drain charge
VGS = 0 to 10 V
(see Figure 15. Test circuit for
gate charge behavior)
-
54
10
40
-
4
pF
-
Ω
-
nC
26
-
4
15
1. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0
to 80% VDSS.
Table 5. Switching times
Symbol
td(on)
tr
td(off)
tf
DS5919 - Rev 3
Parameter
Test conditions
Turn-on delay time
VDD = 260 V, ID = 2.5 A,
Rise time
RG = 4.7 Ω, VGS = 10 V
Turn-off delay time
(see Figure 14. Test circuit for
resistive load switching times
and Figure 19. Switching time
waveform)
Fall time
Min.
Typ.
Max.
Unit
-
ns
10
11
-
31
18
page 3/18
STD6N52K3
Electrical characteristics
Table 6. Source drain diode
Symbol
ISD
Parameter
Test conditions
Min.
Source-drain current
Typ.
Max.
5
-
ISDM (1)
Source-drain current (pulsed)
VSD (2)
Forward on voltage
ISD = 5 A, VGS = 0 V
trr
Reverse recovery time
ISD = 5 A, di/dt = 100 A/µs
Qrr
Reverse recovery charge
IRRM
Reverse recovery current
VDD = 60 V (see Figure
16. Test circuit for inductive
load switching and diode
recovery times)
trr
Reverse recovery time
ISD = 5 A, di/dt = 100 A/µs
Qrr
Reverse recovery charge
VDD = 60 V, Tj = 150 °C
IRRM
Reverse recovery current
(see Figure 16. Test circuit for
inductive load switching and
diode recovery times)
20
-
-
-
1.5
Unit
A
V
206
ns
1.4
μC
14
A
233
ns
1.7
μC
15
A
1. Pulse width limited by safe operating area.
2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%.
Table 7. Gate-source Zener diode
Symbol
V(BR)GSO
Parameter
Gate-source breakdown
voltage
Test conditions
ID = 0 A, IGS = ±1 mA
Min.
±30
Typ.
Max.
-
Unit
V
The built-in back-to-back Zener diodes are specifically designed to enhance the ESD performance of the device.
The Zener voltage facilitates efficient and cost-effective device integrity protection, thus eliminating the need for
additional external componentry.
DS5919 - Rev 3
page 4/18
STD6N52K3
Electrical characteristics curves
2.1
Electrical characteristics curves
Figure 2. Thermal impedance
Figure 1. Safe operating area
AM08855v1
ID
(A)
GC20460
K
10µs
10
is
in
th
n m
tio by
ra
pe e d
O im it
L
1
ea )
a r S (on
D
R
ax
100µs
is
100
1ms
10ms
10-1
0.1
Tj=150°C
Tc=25°C
S ingle puls e
0.01
0.1
10
1
100
VDS (V)
10-2
10-5
Figure 3. Output characteristics
AM08856v1
ID
(A)
VGS =10V
10-4
10-3
10-2
10-1
tp (s)
Figure 4. Transfer characteristics
AM08857v1
ID
(A)
7
10
VDS =15V
6
7V
8
5
6
4
6V
3
4
2
2
0
1
5V
5
0
10
15
20
25 VDS (V)
Figure 5. Gate charge vs gate-source voltage
VGS
AM08858v1
VDD=420V
ID=5A
12
DS
VD S
350
2
4
8
6
VGS (V)
Figure 6. Static drain-source on resistance
AM08859v1
R DS (on)
(Ω)
1.3
3
8
250
6
1.2
VGS =10V
1.1
150
4
2
DS5919 - Rev 3
0
1.4
10
0
0
50
0
10
30
Qg
1.0
0.9
0.8
0
1
2
3
4
ID(A)
page 5/18
STD6N52K3
Electrical characteristics curves
Figure 7. Capacitance variations
Figure 8. Output capacitance stored energy
AM08860v1
C
(pF)
AM08861v1
E os s
(µJ )
4.0
1000
Cis s
3.5
3.0
2.5
100
2.0
Cos s
10
Crs s
1.5
1.0
0.5
1
0.1
1
100
10
VDS (V)
Figure 9. Normalized gate threshold voltage vs
temperature
AM08862v1
VGS (th)
(norm)
1.10
0
0
100
200 300
400
500
600
VDS (V)
Figure 10. Normalized on resistance vs temperature
AM08863v1
R DS (on)
(norm)
2.5
2.0
1.00
VGS=10V
ID =50µA
1.5
0.90
1.0
0.80
0.5
0.70
-75
25
-25
75
TJ (°C)
125
Figure 11. Source-drain diode forward characteristics
AM08865v1
VS D
(V)
TJ =-50°C
0.9
0
-75
-25
25
75
125
TJ (°C)
Figure 12. Normalized V(BR)DSS vs temperature
AM08864v1
V(BR)DSS
(norm)
1.10
0.8
TJ =25°C
1.05
0.7
0.6
1.00
0.5
0.3
0.95
TJ =150°C
0.4
0
DS5919 - Rev 3
1
2
3
4
5
6
7
8 IS D(A)
0.90
-75
-25
25
75
125
TJ (°C)
page 6/18
STD6N52K3
Electrical characteristics curves
Figure 13. Maximum avalanche energy vs temperature
AM08866v1
E AS
(mJ )
ID=2.5A
VDD=50 V
110
100
90
80
70
60
50
40
30
20
10
0
0
DS5919 - Rev 3
20
40
60
80
100 120 140 TJ (°C)
page 7/18
STD6N52K3
Test circuits
3
Test circuits
Figure 14. Test circuit for resistive load switching times
Figure 15. Test circuit for gate charge behavior
VDD
12 V
2200
+ μF
3.3
μF
VDD
VD
VGS
1 kΩ
100 nF
RL
IG= CONST
VGS
RG
47 kΩ
+
pulse width
D.U.T.
2.7 kΩ
2200
μF
pulse width
D.U.T.
100 Ω
VG
47 kΩ
1 kΩ
AM01469v1
AM01468v1
Figure 16. Test circuit for inductive load switching and
diode recovery times
D
G
A
D.U.T.
S
25 Ω
A
L
A
B
B
3.3
µF
D
G
+
VD
100 µH
fast
diode
B
Figure 17. Unclamped inductive load test circuit
RG
1000
+ µF
2200
+ µF
VDD
3.3
µF
VDD
ID
D.U.T.
S
D.U.T.
Vi
_
pulse width
AM01471v1
AM01470v1
Figure 19. Switching time waveform
Figure 18. Unclamped inductive waveform
ton
V(BR)DSS
td(on)
VD
toff
td(off)
tr
tf
90%
90%
IDM
VDD
10%
0
ID
VDD
AM01472v1
VGS
0
VDS
10%
90%
10%
AM01473v1
DS5919 - Rev 3
page 8/18
STD6N52K3
Package information
4
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK®
packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions
and product status are available at: www.st.com. ECOPACK® is an ST trademark.
DS5919 - Rev 3
page 9/18
STD6N52K3
DPAK (TO-252) type A package information
4.1
DPAK (TO-252) type A package information
Figure 20. DPAK (TO-252) type A package outline
0068772_A_25
DS5919 - Rev 3
page 10/18
STD6N52K3
DPAK (TO-252) type A package information
Table 8. DPAK (TO-252) type A mechanical data
Dim.
mm
Min.
Max.
A
2.20
2.40
A1
0.90
1.10
A2
0.03
0.23
b
0.64
0.90
b4
5.20
5.40
c
0.45
0.60
c2
0.48
0.60
D
6.00
6.20
D1
4.95
E
6.40
E1
4.60
4.70
4.80
e
2.159
2.286
2.413
e1
4.445
4.572
4.699
H
9.35
10.10
L
1.00
1.50
(L1)
2.60
2.80
3.00
L2
0.65
0.80
0.95
L4
0.60
R
V2
DS5919 - Rev 3
Typ.
5.10
5.25
6.60
1.00
0.20
0°
8°
page 11/18
STD6N52K3
DPAK (TO-252) type E package information
4.2
DPAK (TO-252) type E package information
Figure 21. DPAK (TO-252) type E package outline
0068772_type-E_rev.25
DS5919 - Rev 3
page 12/18
STD6N52K3
DPAK (TO-252) type E package information
Table 9. DPAK (TO-252) type E mechanical data
Dim.
A
mm
Min.
Typ.
Max.
2.18
2.39
A2
0.13
b
0.65
0.884
b4
4.95
5.46
c
0.46
0.61
c2
0.46
0.60
D
5.97
6.22
D1
5.21
E
6.35
E1
4.32
6.73
e
2.286
e1
4.572
H
9.94
10.34
L
1.50
1.78
L1
L2
2.74
0.89
L4
1.27
1.02
Figure 22. DPAK (TO-252) recommended footprint (dimensions are in mm)
FP_0068772_25
DS5919 - Rev 3
page 13/18
STD6N52K3
DPAK (TO-252) packing information
4.3
DPAK (TO-252) packing information
Figure 23. DPAK (TO-252) tape outline
10 pitches cumulative
tolerance on tape +/- 0.2 mm
T
P0
Top cover
tape
P2
D
E
F
B1
K0
For machine ref. only
including draft and
radii concentric around B0
W
B0
A0
P1
D1
User direction of feed
R
Bending radius
User direction of feed
AM08852v1
DS5919 - Rev 3
page 14/18
STD6N52K3
DPAK (TO-252) packing information
Figure 24. DPAK (TO-252) reel outline
T
40mm min.
access hole
at slot location
B
D
C
N
A
G measured
at hub
Tape slot
in core for
tape start
2.5mm min.width
Full radius
AM06038v1
Table 10. DPAK (TO-252) tape and reel mechanical data
Tape
Dim.
mm
mm
Dim.
Min.
Max.
A0
6.8
7
A
B0
10.4
10.6
B
1.5
12.1
C
12.8
1.6
D
20.2
G
16.4
50
B1
DS5919 - Rev 3
Reel
Min.
Max.
330
13.2
D
1.5
D1
1.5
E
1.65
1.85
N
F
7.4
7.6
T
K0
2.55
2.75
P0
3.9
4.1
Base qty.
2500
P1
7.9
8.1
Bulk qty.
2500
P2
1.9
2.1
R
40
T
0.25
0.35
W
15.7
16.3
18.4
22.4
page 15/18
STD6N52K3
Revision history
Table 11. Document revision history
Date
Revision
03-Sep-2008
1
Changes
Initial release.
– Added new package, mechanical data: D²PAK;
21-Feb-2011
2
– Added new package, mechanical data: TO-220;
– Document status promoted from preliminary data to datasheet.
The part numbers STB6N52K3, STF6N52K3 and STP6N52K3 have been moved to a
separate datasheet.
Removed maturity status indication from cover page. The document status is production data.
05-Sep-2018
3
Updated title and features in cover page.
Updated Section 1 Electrical ratings, Section 2 Electrical characteristics and Section
4 Package information.
Minor text changes.
DS5919 - Rev 3
page 16/18
STD6N52K3
Contents
Contents
1
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
2
Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.1
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3
Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
4
Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4.1
DPAK (TO-252) type A package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4.2
DPAK (TO-252) type E package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.3
DPAK (TO-252) packing information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
DS5919 - Rev 3
page 17/18
STD6N52K3
IMPORTANT NOTICE – PLEASE READ CAREFULLY
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ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2018 STMicroelectronics – All rights reserved
DS5919 - Rev 3
page 18/18