STF6N80K5

STF6N80K5, STFI6N80K5 N-channel 800 V, 1.3 Ω typ., 4.5 A MDmesh™ K5 Power MOSFETs in TO-220FP and I²PAKFP packages Datasheet - production data Features Order code STF6N80K5 STFI6N80K5 VDS RDS(on)max ID PTOT 800 V 1.6 Ω 4.5 A 25 W 3 1 2 1 TO-220FP 2 • Industry’s lowest RDS(on) 3 • Industry’s best figure of merit (FoM) 2 I PAKFP • Ultra low gate charge • 100% avalanche tested Figure 1. Internal schematic diagram • Zener-protected D(2) Applications • Switching applications Description G(1) S(3) AM01476v1 These very high voltage N-channel Power MOSFETs are designed using MDmesh™ K5 technology based on an innovative proprietary vertical structure. The result is a dramatic reduction in on-resistance and ultra-low gate charge for applications requiring superior power density and high efficiency. Table 1. Device summary Order code Marking STF6N80K5 September 2016 This is information on a product in full production. Packing TO-220FP 6N80K5 STFI6N80K5 Package I2PAKFP DocID024664 Rev 4 Tube 1/15 www.st.com Contents STF6N80K5, STFI6N80K5 Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) ............................ 6 3 Test circuits 4 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 2/15 .............................................. 8 4.1 TO-220FP package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4.2 I2PAKFP (TO-281) package information . . . . . . . . . . . . . . . . . . . . . . . . . 12 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 DocID024664 Rev 4 STF6N80K5, STFI6N80K5 1 Electrical ratings Electrical ratings Table 2. Absolute maximum ratings Symbol VGS Parameter Gate- source voltage Value Unit 30 V (1) ID Drain current (continuous) at TC = 25 °C ID Drain current (continuous) at TC = 100 °C 2.8 A IDM (2) Drain current (pulsed) 18 A PTOT Total dissipation at TC = 25 °C 25 W IAR Max current during repetitive or single pulse avalanche (pulse width limited by Tjmax ) 1.5 A EAS Single pulse avalanche energy (starting TJ = 25 °C, ID = IAS, VDD = 50 V) 85 mJ Peak diode recovery voltage slope 4.5 V/ns MOSFET dv/dt ruggedness 50 V/ns 2500 V -55 to 150 °C Value Unit dv/dt (3) dv/dt (4) VISO Tj Tstg Insulation withstand voltage (RMS) from all three leads to external heat sink (t = 1 s, TC = 25 °C) 4.5 A Operating junction temperature range Storage temperature range 1. Limited by maximum junction temperature 2. Pulse width limited by safe operating area 3. ISD ≤ 4.5 A, di/dt ≤ 100 A/µs, peak VDS ≤ V(BR)DSS 4. VDS ≤ 640 V Table 3. Thermal data Symbol Parameter Rthj-case Thermal resistance junction-case 5 Rthj-amb Thermal resistance junction-amb 62.5 °C/W DocID024664 Rev 4 3/15 15 Electrical characteristics 2 STF6N80K5, STFI6N80K5 Electrical characteristics (TCASE = 25 °C unless otherwise specified). Table 4. On/off states Symbol V(BR)DSS Parameter Test conditions Drain-source breakdown voltage (VGS = 0) ID = 1 mA Min. Typ. Max. Unit 800 V VDS = 800 V 1 µA VDS = 800 V, Tj = 125 °C(1) 50 µA Gate body leakage current (VDS = 0) VGS = ± 20 V ±10 µA VGS(th) Gate threshold voltage VDS = VGS, ID = 100 µA 4 5 V RDS(on) Static drain-source on-resistance VGS = 10 V, ID = 2 A 1.3 1.6 Ω Min. Typ. Max. Unit - 270 - pF - 25 - pF - 0.7 - pF - 38 - pF - 16 - pF IDSS Zero gate voltage drain current (VGS = 0) IGSS 3 1. Defined by design, not subject to production test. Table 5. Dynamic Symbol Parameter Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Co(tr)(1) Test conditions VDS = 100 V, f = 1 MHz, VGS = 0 Equivalent capacitance time related VGS = 0, VDS = from 0 to 640 V Co(er)(2) Equivalent capacitance energy related RG Intrinsic gate resistance f = 1 MHz, ID = 0 - 7.5 - Ω Qg Total gate charge - 13 - nC Qgs Gate-source charge - 2.1 - nC Qgd Gate-drain charge VDD = 640 V, ID = 4.5 A VGS = 10 V (see Figure 15: Gate charge test circuit) - 9.6 - nC 1. Time related is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS 2. Energy related is defined as a constant equivalent capacitance giving the same stored energy as Coss when VDS increases from 0 to 80% VDSS 4/15 DocID024664 Rev 4 STF6N80K5, STFI6N80K5 Electrical characteristics Table 6. Switching times Symbol td(on) Parameter Turn-on delay time Rise time tr td(off) Turn-off delay time Fall time tf Test conditions Min. Typ. Max. Unit VDD = 400 V, ID = 2.25 A, RG = 4.7 Ω, VGS = 10 V (see Figure 14: Switching times test circuit for resistive load and Figure 19: Switching time waveform) - 16 - ns - 7.5 - ns - 28.5 - ns - 16 - ns Typ. Max. Unit Table 7. Source drain diode Symbol ISD ISDM (1) VSD(2) Parameter Test conditions Min. Source-drain current - 4.5 A Source-drain current (pulsed) - 18 A 1.5 V Forward on voltage ISD = 4.5 A, VGS = 0 - trr Reverse recovery time - 280 ns Qrr Reverse recovery charge - 2.2 μC IRRM Reverse recovery current ISD = 4.5 A, VDD = 60 V di/dt = 100 A/µs, (see Figure 16: Test circuit for inductive load switching and diode recovery times) - 15.5 A ISD = 4.5 A,VDD = 60 V di/dt = 100 A/µs, Tj = 150 °C (see Figure 16: Test circuit for inductive load switching and diode recovery times) - 450 ns - 3.15 μC - 14 A Min. Typ. Max. Unit 30 - - V trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current 1. Pulse width limited by safe operating area 2. Pulsed: pulse duration = 300 µs, duty cycle 1.5% Table 8. Gate-source Zener diode Symbol Parameter Test conditions V(BR)GSO Gate-source breakdown voltage IGS = ±1mA, ID = 0 The built-in back-to-back Zener diodes are specifically designed to enhance the ESD performance of the device. The Zener voltage facilitates efficient and cost-effective device integrity protection,thus eliminating the need for additional external componentry. DocID024664 Rev 4 5/15 15 Electrical characteristics 2.1 STF6N80K5, STFI6N80K5 Electrical characteristics (curves) Figure 2. Safe operating area Figure 3. Thermal impedance *,3'59 ,' $ . *& į   į    RSHUDWLQJLQWKLVDUHD LVOLPLWHGE\5'6RQ     6LQJOHSXOVH  WS —V WS PV    WS PV ¡$ 7F ƒ& 7M ƒ& VLQJOHSXOVH      9'69  Figure 4. Output characteristics         WSV Figure 5. Transfer characteristics AM18115v1 ID (A)  VGS=10, 11, 12V AM18116v1 ID (A) VDS=20V 8 8 9V 6 6 8V 4 2 4 2 7V 6V 0 8 4 0 16 12 0 VDS(V) Figure 6. Gate charge vs gate-source voltage AM18117v1 VGS (V) VDS VDD=640V ID=4.5A 12 500 8 400 6 300 4 200 2 100 2 4 6 8 7 8 9 10 11 VGS(V) Figure 7. Static drain-source on-resistance *,3*07 5'6RQ :  9*6 9  10 0 6 600 0 6/15 VDS (V) 5 10 12    0 Qg(nC) DocID024664 Rev 4       ,'$ STF6N80K5, STFI6N80K5 Electrical characteristics Figure 8. Capacitance variations Figure 9. Output capacitance stored energy AM18119v1 C (pF) AM18120v1 Eoss (µJ) 1000 4 Ciss 100 3 10 Coss 2 Crss 1 1 f = 1 MHz 0.1 0.1 1 100 10 Figure 10. Normalized gate threshold voltage vs temperature AM18082v2 VGS(th) (norm) 400 200 VDS(V) AM18081v2 RDS(on) ID=2 A VGS=10 V 2.5 1.1 600 Figure 11. Normalized on-resistance vs temperature (norm) ID=100 µA 1.2 0 0 VDS(V) 1 2 0.9 0.8 1.5 0.7 1 0.6 0.5 0.5 0.4 -100 -50 0 50 100 Figure 12. Normalized V(BR)DSS vs temperature AM18083v1 V(BR)DSS 0 -100 150 TJ(°C) (norm) -50 0 100 150 TJ(°C) Figure 13. Source-drain diode forward characteristics AM18121v1 VSD (V) TJ=-50°C ID=1mA 1.1 50 0.95 1.05 TJ=25°C 0.85 1 0.75 0.95 TJ=150°C 0.65 0.9 0.85 -100 -50 0 50 100 TJ(°C) 0.55 DocID024664 Rev 4 1 2 3 4 ISD(A) 7/15 15 Test circuits 3 STF6N80K5, STFI6N80K5 Test circuits Figure 14. Switching times test circuit for resistive load Figure 15. Gate charge test circuit VDD 12V 47kΩ 1kΩ 100nF 3.3 μF 2200 RL μF IG=CONST VDD VGS RG 100Ω Vi=20V=VGMAX VD 2200 μF D.U.T. D.U.T. VG 2.7kΩ PW 47kΩ 1kΩ PW AM01469v1 AM01468v1 Figure 16. Test circuit for inductive load switching and diode recovery times A A Figure 17. Unclamped inductive load test circuit L A D G FAST DIODE D.U.T. S 3.3 μF B B B VD L=100μH 25 Ω 1000 μF D VDD 2200 μF 3.3 μF VDD ID G RG S Vi D.U.T. Pw AM01471v1 AM01470v1 Figure 18. Unclamped inductive waveform Figure 19. Switching time waveform ton V(BR)DSS tdon VD toff tr tdoff tf 90% 90% IDM 10% ID VDD 10% 0 VDD VDS 90% VGS AM01472v1 8/15 0 DocID024664 Rev 4 10% AM01473v1 STF6N80K5, STFI6N80K5 4 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. DocID024664 Rev 4 9/15 15 Package information 4.1 STF6N80K5, STFI6N80K5 TO-220FP package information Figure 20. TO-220FP package outline 7012510_Rev_K_B 10/15 DocID024664 Rev 4 STF6N80K5, STFI6N80K5 Package information Table 9. TO-220FP mechanical data mm Dim. Min. Typ. Max. A 4.4 4.6 B 2.5 2.7 D 2.5 2.75 E 0.45 0.7 F 0.75 1 F1 1.15 1.70 F2 1.15 1.70 G 4.95 5.2 G1 2.4 2.7 H 10 10.4 L2 16 L3 28.6 30.6 L4 9.8 10.6 L5 2.9 3.6 L6 15.9 16.4 L7 9 9.3 Dia 3 3.2 DocID024664 Rev 4 11/15 15 Package information 4.2 STF6N80K5, STFI6N80K5 I2PAKFP (TO-281) package information Figure 21. I2PAKFP (TO-281) package outline UHY& 12/15 DocID024664 Rev 4 STF6N80K5, STFI6N80K5 Package information Table 10. I2PAKFP (TO-281) mechanical data mm Dim. Min. Typ. Max. A 4.40 - 4.60 B 2.50 2.70 D 2.50 2.75 D1 0.65 0.85 E 0.45 0.70 F 0.75 1.00 F1 1.20 G 4.95 5.20 H 10.00 10.40 L1 21.00 23.00 L2 13.20 14.10 L3 10.55 10.85 L4 2.70 3.20 L5 0.85 1.25 L6 7.50 7.60 DocID024664 Rev 4 7.70 13/15 15 Revision history 5 STF6N80K5, STFI6N80K5 Revision history Table 11. Document revision history Date Revision 28-May-2013 1 First release. 2 – Datasheet status promoted from preliminary data to production data – Added: I2PAKFP package – Modified: EAS value in Table 2 – Added: MOSFET dv/dt ruggedness test condition and note 4 in Table 2 – Modified: RG value in Table 5 – Modified: the entire typical values in Table 5, 6 and 7 – Added: Section 2.1: Electrical characteristics (curves) – Minor text changes 05-Mar-2014 Changes Updated title, features and description in cover page. 05-Dec-2014 3 Updated Section 2.1: Electrical characteristics (curves) and Section 4: Package information. Minor text changes. Updated Table 2: Absolute maximum ratings ,Table 4: On/off states, Table 5: Dynamic, Table 6: Switching times, and Table 7: Source drain diode. 06-Sept-2016 4 Updated Figure 2: Safe operating area and Figure 3: Thermal impedance. Minor text changes. 14/15 DocID024664 Rev 4 STF6N80K5, STFI6N80K5 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2016 STMicroelectronics – All rights reserved DocID024664 Rev 4 15/15 15