STF6N95K5

STF6N95K5 N-channel 950 V, 1 Ω typ., 9 A MDmesh™ K5 Power MOSFET in a TO-220FP package Datasheet - production data Features Order code VDS RDS(on) max. ID PTOT STF6N95K5 950 V 1.25 Ω 9A 25 W • Industry’s lowest RDS(on) * area • Industry’s best figure of merit (FoM) 3 1 • Ultra-low gate charge 2 • 100% avalanche tested TO-220FP • Zener-protected Applications Figure 1. Internal schematic diagram D(2) • Switching applications Description This very high voltage N-channel Power MOSFET is designed using MDmesh™ K5 technology based on an innovative proprietary vertical structure. The result is a dramatic reduction in onresistance and ultra-low gate charge for applications requiring superior power density and high efficiency. G(1) S(3) AM01476v1 Table 1. Device summary Order code Marking Packages Packaging STF6N95K5 6N95K5 TO-220FP Tube September 2015 This is information on a product in full production. DocID026412 Rev 2 1/14 www.st.com Contents STF6N95K5 Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 Test circuits 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 2/14 .............................................. 9 DocID026412 Rev 2 STF6N95K5 1 Electrical ratings Electrical ratings Table 2. Absolute maximum ratings Symbol Value Unit ± 30 V (1) A Drain current (continuous) at TC = 100 °C (1) 6 A IDM(2) Drain current (pulsed) 36 A PTOT Total dissipation at TC = 25 °C 25 W IAR(3) Max current during repetitive or single pulse avalanche 3 A EAS Single pulse avalanche energy (starting TJ = 25 °C, ID=IAS, VDD= 50 V) 90 mJ VISO Insulation withstand voltage (RMS) from all three leads to external heat sink (t=1 s; TC=25 °C) 2500 V VGS ID ID Parameter Gate- source voltage Drain current (continuous) at TC = 25 °C 9 dv/dt (4) Peak diode recovery voltage slope 4.5 V/ns dv/dt (5) MOSFET dv/dt ruggedness 50 V/ns - 55 to 150 °C Value Unit Tj Tstg Operating junction temperature Storage temperature 1. Limited by package. 2. Pulse width limited by safe operating area. 3. Pulse width limited by TJmax. 4. ISD ≤ 9 A, di/dt ≤ 100 A/µs, VDS(peak) ≤ V(BR)DSS 5. VDS ≤ 760 V Table 3. Thermal data Symbol Parameter Rthj-case Thermal resistance junction-case max 5 °C/W Rthj-amb Thermal resistance junction-amb max 62.5 °C/W DocID026412 Rev 2 3/14 14 Electrical characteristics 2 STF6N95K5 Electrical characteristics (TCASE = 25 °C unless otherwise specified) Table 4. On/off states Symbol V(BR)DSS Parameter Test conditions Drain-source breakdown voltage VGS= 0, ID = 1 mA Min. Typ. Max. 950 Unit V VGS = 0, VDS = 950 V 1 µA VGS = 0, VDS = 950 V, Tc=125 °C 50 µA ±10 µA 4 5 V 1 1.25 Ω Min. Typ. Max. Unit - 450 - pF - 30 - pF - 1.6 - pF - 45 - pF - 19 - pF - 7 - Ω - 13 - nC - 3 - nC - 7 - nC IDSS Zero gate voltage drain current IGSS Gate body leakage current VDS = 0, VGS = ± 20 V VGS(th) Gate threshold voltage VDS = VGS, ID = 100 µA RDS(on) Static drain-source on-resistance VGS = 10 V, ID= 3 A 3 Table 5. Dynamic Symbol Parameter Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Co(tr)(1) Test conditions VGS=0, VDS =100 V, f=1 MHz Equivalent capacitance time related Co(er)(2) Equivalent capacitance energy related RG Intrinsic gate resistance Qg Total gate charge Qgs Gate-source charge Qgd Gate-drain charge VGS = 0, VDS = 0 to 760 V f = 1MHz, ID=0 VDD = 760 V, ID = 6 A, VGS =10 V, (see Figure 16) 1. Time related is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS 2. energy related is defined as a constant equivalent capacitance giving the same stored energy as Coss when VDS increases from 0 to 80% VDSS 4/14 DocID026412 Rev 2 STF6N95K5 Electrical characteristics Table 6. Switching times Symbol td(on) tr td(off) tf Parameter Test conditions Turn-on delay time VDD = 475 V, ID = 3 A, RG=4.7 Ω, VGS=10 V (see Figure 18) Rise time Turn-off delay time Fall time Min. Typ. Max. Unit - 12 - ns - 12 - ns - 33 - ns - 21 - ns Min. Typ. Max. Unit Table 7. Source drain diode Symbol ISD ISDM VSD(1) 1. Parameter Test conditions Source-drain current - 9 A Source-drain current (pulsed) - 36 A 1.6 V Forward on voltage ISD= 6 A, VGS=0 - trr Reverse recovery time - 372 ns Qrr Reverse recovery charge - 4 µC IRRM Reverse recovery current ISD= 6 A, VDD= 60 V di/dt = 100 A/µs, (see Figure 17) - 22 A - 522 ns - 5 µC - 20 A Min Typ. Max. Unit 30 - - V trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current ISD= 6 A,VDD= 60 V di/dt=100 A/µs, Tj=150 °C (see Figure 17) Pulsed: pulse duration = 300µs, duty cycle 1.5% Table 8. Gate-source Zener diode Symbol Parameter Test conditions V(BR)GSO Gate-source breakdown voltage IGS = ± 1mA, ID=0 The built-in back-to-back Zener diodes have specifically been designed to enhance the device's ESD capability. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device's integrity. These integrated Zener diodes thus avoid the usage of external components. DocID026412 Rev 2 5/14 14 Electrical characteristics 2.1 STF6N95K5 Electrical characteristics (curves) Figure 2. Safe operating area Figure 3. Thermal impedance AM07106v1 ID (A) Tj=150°C Tc=25°C Single pulse D S( on ) O Li per m at ite io d ni by n m this ax a R rea is 10 1 10µs 100µs 1ms 0.1 10ms 0.01 0.1 10 1 VDS(V) 100 Figure 4. Output characteristics Figure 5. Transfer characteristics AM07108v1 ID (A) VGS=10V AM07109v1 ID (A) VDS=15V 12 8 10 6 8 7V 6 4 4 6V 2 2 5V 0 0 5 10 15 20 Figure 6. Gate charge vs gate-source voltage AM07110v1 VDS VGS (V) 12 VDS (V) 700 VDD=760V ID=6A 600 10 500 8 2 4 8 6 VGS(V) Figure 7. Static drain-source on-resistance AM07111v1 RDS(on) (Ohm) 1.03 VGS=10V 1.01 0.99 0.97 400 6 300 4 2 0 0 6/14 0 0 VDS(V) 25 2 4 6 8 10 12 14 0.95 0.93 200 0.91 100 0.89 0 Qg(nC) 0.87 0.5 DocID026412 Rev 2 1.0 1.5 2.0 2.5 3.0 ID(A) STF6N95K5 Electrical characteristics Figure 8. Capacitance variations Figure 9. Output capacitance stored energy AM07112v1 C (pF) AM07113v1 Eoss (µJ) 22 20 1000 18 1 Ciss 16 14 100 12 10 8 Coss 10 6 4 Crss 2 1 0.1 1 100 10 Figure 10. Normalized gate threshold voltage vs temperature AM07114v1 VGS(th) (norm) ID=100 µA 1.2 0 0 VDS(V) 100 200 300 400 500 600 700 800 900 VDS(V) Figure 11. Normalized on-resistance vs temperature AM07115v1 RDS(on) (norm) VGS=10V 2.5 1.1 2.0 1.0 0.9 1.5 0.8 0.7 1.0 0.6 0.5 0.5 0.4 -75 -25 25 75 125 Figure 12. Source-drain diode forward characteristics AM07118v1 VSD (V) 0.95 0 -75 TJ(°C) -25 25 75 125 TJ(°C) Figure 13. Normalized V(BR)DSS vs temperature AM07116v1 V(BR)DSS (norm) ID=1 mA 1.2 TJ=-50°C 1.1 0.85 TJ=25°C 1.0 0.75 0.9 TJ=150°C 0.65 0.55 2.0 3.0 4.0 5.0 6.0 0.8 ISD(A) 0.7 -75 DocID026412 Rev 2 -25 25 75 125 TJ(°C) 7/14 14 Electrical characteristics STF6N95K5 Figure 14. Maximum avalanche energy vs starting Tj AM07117v1 EAS (mJ) 100 ID=3 A VDD=50 V 90 80 70 60 50 40 30 20 10 0 0 8/14 20 40 60 80 100 120 140 TJ(°C) DocID026412 Rev 2 STF6N95K5 3 Test circuits Test circuits Figure 15. Switching times test circuit for resistive load Figure 16. Gate charge test circuit VDD 12V 47kΩ 1kΩ 100nF 3.3 μF 2200 RL μF IG=CONST VDD VGS 100Ω Vi=20V=VGMAX VD RG 2200 μF D.U.T. D.U.T. VG 2.7kΩ PW 47kΩ 1kΩ PW AM01468v1 Figure 17. Test circuit for inductive load switching and diode recovery times A A AM01469v1 Figure 18. Unclamped inductive load test circuit L A D G D.U.T. FAST DIODE B B VD L=100μH S 3.3 μF B 25 Ω 1000 μF D VDD 2200 μF 3.3 μF VDD ID G RG S Vi D.U.T. Pw AM01470v1 AM01471v1 Figure 19. Unclamped inductive waveform Figure 20. Switching time waveform ton V(BR)DSS tdon VD toff tr tdoff tf 90% 90% IDM 10% ID VDD 10% 0 VDD VDS 90% VGS AM01472v1 0 DocID026412 Rev 2 10% AM01473v1 9/14 14 Package mechanical data 4 STF6N95K5 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 10/14 DocID026412 Rev 2 STF6N95K5 Package mechanical data Figure 21. TO-220FP drawing 7012510_Rev_K_B DocID026412 Rev 2 11/14 14 Package mechanical data STF6N95K5 Table 9. TO-220FP mechanical data mm Dim. Min. Typ. A 4.4 4.6 B 2.5 2.7 D 2.5 2.75 E 0.45 0.7 F 0.75 1 F1 1.15 1.70 F2 1.15 1.70 G 4.95 5.2 G1 2.4 2.7 H 10 10.4 L2 12/14 Max. 16 L3 28.6 30.6 L4 9.8 10.6 L5 2.9 3.6 L6 15.9 16.4 L7 9 9.3 Ø 3 3.2 DocID026412 Rev 2 STF6N95K5 5 Revision history Revision history Table 10. Document revision history Date Revision Changes 27-May-2014 1 First release. Part number previously included in datasheet DocID16958 03-Sep-2015 2 Updated Table 2.: Absolute maximum ratings Minor text changes. DocID026412 Rev 2 13/14 14 STF6N95K5 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2015 STMicroelectronics – All rights reserved 14/14 DocID026412 Rev 2