STF8N60DM2

STF8N60DM2 N-channel 600 V, 550 mΩ typ., 8 A MDmesh™ DM2 Power MOSFET in a TO-220FP package Datasheet - production data Features Order code VDS RDS(on) max. ID PTOT STF8N60DM2 600 V 600 mΩ 8A 25 W       TO-220FP Figure 1: Internal schematic diagram D(2) Fast-recovery body diode Extremely low gate charge and input capacitance Low on-resistance 100% avalanche tested Extremely high dv/dt ruggedness Zener-protected Applications  Switching applications Description This high voltage N-channel Power MOSFET is part of the MDmesh™ DM2 fast recovery diode series. It offers very low recovery charge (Qrr) and time (trr) combined with low RDS(on), rendering it suitable for the most demanding high efficiency converters and ideal for bridge topologies and ZVS phase-shift converters. G(1) S(3) AM15572v1_no_tab Table 1: Device summary Order code Marking Package Packing STF8N60DM2 8N60DM2 TO-220FP Tube November 2016 DocID027864 Rev 2 This is information on a product in full production. 1/13 www.st.com Contents STF8N60DM2 Contents 1 Electrical ratings ............................................................................. 3 2 Electrical characteristics ................................................................ 4 2.1 Electrical characteristics (curves) ...................................................... 6 3 Test circuits ..................................................................................... 8 4 Package information ....................................................................... 9 4.1 5 2/13 TO-220FP package information ...................................................... 10 Revision history ............................................................................ 12 DocID027864 Rev 2 STF8N60DM2 1 Electrical ratings Electrical ratings Table 2: Absolute maximum ratings Symbol VGS Parameter Value Unit ±25 V Gate-source voltage Drain current (continuous) at Tcase = 25 °C 8 Drain current (continuous) at Tcase = 100 °C 5 IDM(2) Drain current (pulsed) 32 A PTOT W ID(1) A Total dissipation at Tcase = 25 °C 25 dv/dt(3) Peak diode recovery voltage slope 50 dv/dt(4) MOSFET dv/dt ruggedness 50 VISO Insulation withstand voltage (RMS) from all three leads to external heat sink (t = 1 s; TC = 25 °C) 2.5 kV Tstg Storage temperature range –55 to 150 °C Tj Operating junction temperature range V/ns Notes: (1) Current is limited by package. (2) Pulse width is limited by safe operating area. (3) ISD ≤ 8 A, di/dt=900 A/μs; VDS peak < V(BR)DSS, VDD = 400 V. (4) VDS ≤ 480 V. Table 3: Thermal data Symbol Parameter Rthj-case Thermal resistance junction-case Rthj-amb Thermal resistance junction-ambient Value 5 62.5 Unit °C/W Table 4: Avalanche characteristics Symbol Parameter Value Unit IAR(1) Avalanche current, repetitive or not repetitive 2.5 A EAS(2) Single pulse avalanche energy 430 mJ Notes: (1) Pulse width limited by Tjmax. (2) starting Tj = 25 °C, ID = IAR, VDD = 50 V. DocID027864 Rev 2 3/13 Electrical characteristics 2 STF8N60DM2 Electrical characteristics (Tcase = 25 °C unless otherwise specified) Table 5: Static Symbol V(BR)DSS Parameter Test conditions Drain-source breakdown voltage VGS = 0 V, ID = 1 mA Min. Typ. Max. 600 Unit V VGS = 0 V, VDS = 600 V 1 VGS = 0 V, VDS = 600 V, Tcase = 125 °C(1) 100 Gate-body leakage current VDS = 0 V, VGS = ±25 V ±5 µA VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA 4 5 V RDS(on) Static drain-source onresistance VGS = 10 V, ID = 4 A 550 600 mΩ Min. Typ. Max. Unit - 449 - - 24 - - 0.89 - IDSS Zero gate voltage drain current IGSS 3 µA Notes: (1)Defined by design, not subject to production test. Table 6: Dynamic Symbol Parameter Test conditions Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Coss eq.(1) Equivalent output capacitance VDS = 0 to 480 V, VGS = 0 V - 42 - pF RG Intrinsic gate resistance f = 1 MHz, ID = 0 A - 6.5 - Ω Qg Total gate charge - 13.5 - Qgs Gate-source charge - 3 - Qgd Gate-drain charge VDD = 480 V, ID = 8 A, VGS = 10 V (see Figure 15: "Test circuit for gate charge behavior") - 7.7 - VDS = 100 V, f = 1 MHz, VGS = 0 V pF nC Notes: (1) Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS. Table 7: Switching times Symbol td(on) tr td(off) tf 4/13 Parameter Turn-on delay time Rise time Turn-off delay time Fall time Test conditions Min. Typ. Max. VDD = 300 V, ID = 4 A RG = 4.7 Ω, VGS = 10 V (see Figure 14: "Test circuit for resistive load switching times" and Figure 19: "Switching time waveform") - 10 - - 6 - - 25.4 - - 9.5 - DocID027864 Rev 2 Unit ns STF8N60DM2 Electrical characteristics Table 8: Source-drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit ISD Source-drain current - 8 A ISDM(1) Source-drain current (pulsed) - 32 A VSD(2) Forward on voltage VGS = 0 V, ISD = 8 A - 1.6 V trr Reverse recovery time - 80 ns Qrr Reverse recovery charge - 188 nC IRRM Reverse recovery current ISD = 8 A, di/dt = 100 A/µs, VDD = 60 V (see Figure 16: "Test circuit for inductive load switching and diode recovery times") - 4.7 A ISD = 8 A, di/dt = 100 A/µs, VDD = 60 V, Tj = 150 °C (see Figure 16: "Test circuit for inductive load switching and diode recovery times") - 160 ns - 640 nC - 8 A trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current Notes: (1) Pulse width is limited by safe operating area. (2) Pulse test: pulse duration = 300 µs, duty cycle 1.5%. DocID027864 Rev 2 5/13 Electrical characteristics 2.1 STF8N60DM2 Electrical characteristics (curves) Figure 2: Safe operating area Figure 3: Thermal impedance Figure 4: Output characteristics Figure 5: Transfer characteristics Figure 6: Gate charge vs gate-source voltage Figure 7: Static drain-source on resistance 6/13 DocID027864 Rev 2 STF8N60DM2 Electrical characteristics Figure 8: Capacitance variations Figure 9: Normalized gate threshold voltage vs temperature Figure 10: Normalized on-resistance vs temperature Figure 11: Normalized V(BR)DSS vs temperature Figure 12: Source-drain diode forward characteristics Figure 13: Output capacitance stored energy DocID027864 Rev 2 7/13 Test circuits 3 STF8N60DM2 Test circuits Figure 15: Test circuit for gate charge behavior Figure 14: Test circuit for resistive load switching times Figure 16: Test circuit for inductive load switching and diode recovery times Figure 17: Unclamped inductive load test circuit Figure 18: Unclamped inductive waveform 8/13 DocID027864 Rev 2 Figure 19: Switching time waveform STF8N60DM2 4 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. DocID027864 Rev 2 9/13 Package information 4.1 STF8N60DM2 TO-220FP package information Figure 20: TO-220FP package outline 10/13 DocID027864 Rev 2 STF8N60DM2 Package information Table 9: TO-220FP package mechanical data mm Dim. Min. Typ. Max. A 4.4 4.6 B 2.5 2.7 D 2.5 2.75 E 0.45 0.7 F 0.75 1 F1 1.15 1.70 F2 1.15 1.70 G 4.95 5.2 G1 2.4 2.7 H 10 10.4 L2 16 L3 28.6 30.6 L4 9.8 10.6 L5 2.9 3.6 L6 15.9 16.4 L7 9 9.3 Dia 3 3.2 DocID027864 Rev 2 11/13 Revision history 5 STF8N60DM2 Revision history Table 10: Document revision history Date Revision 12-May-2015 1 First release. 2 Document status promoted from preliminary to production data. Updated title in cover page, Section 1: "Electrical ratings", Section 2: "Electrical characteristics". Added Section 2.1: "Electrical characteristics (curves)". 24-Nov-2016 12/13 Changes DocID027864 Rev 2 STF8N60DM2 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2016 STMicroelectronics – All rights reserved DocID027864 Rev 2 13/13