STFH40N60M2
N-channel 600 V, 0.078 Ω typ., 34 A MDmesh™ M2
Power MOSFET in a TO-220FP wide creepage package
Datasheet - preliminary data
Features
Order codes
VDS @ TJmax
RDS(on) max
ID
STFH40N60M2
650 V
0.088 Ω
34 A
Extremely low gate charge
Excellent output capacitance (COSS) profile
100% avalanche tested
Zener-protected
Wide creepage distance of 4.25 mm
between the pins
Applications
Figure 1: Internal schematic diagram
D(2)
G(1)
Switching applications
LLC converters, resonant converters
Description
This device is an N-channel Power MOSFET
developed using MDmesh™ M2 technology.
Thanks to its strip layout and an improved vertical
structure, the device exhibits low on-resistance
and optimized switching characteristics,
rendering it suitable for the most demanding high
efficiency converters.
The TO-220FP wide creepage package provides
increased surface insulation for Power MOSFETs
to prevent failure due to arcing, which can occur
in polluted environments.
S(3)
AM15572v1_no_tab
Table 1: Device summary
Order codes
Marking
Package
Packaging
STFH40N60M2
40N60M2
TO-220FP wide creepage
Tube
June 2016
DocID029433 Rev 1
This is preliminary information on a new product now in development
or undergoing evaluation. Details are subject to change without notice.
1/12
www.st.com
Contents
STFH40N60M2
Contents
1
Electrical ratings ............................................................................. 3
2
Electrical characteristics ................................................................ 4
2.1
Electrical characteristics (curves) ...................................................... 6
3
Test circuits ..................................................................................... 8
4
Package information ....................................................................... 9
4.1
5
2/12
TO-220FP wide creepage package information ................................ 9
Revision history ............................................................................ 11
DocID029433 Rev 1
STFH40N60M2
1
Electrical ratings
Electrical ratings
Table 2: Absolute maximum ratings
Symbol
Parameter
VGS
ID
ID
IDM
(2)
PTOT
Value
Unit
Gate-source voltage
± 25
V
Drain current (continuous) at TC = 25 °C
34(1)
A
Drain current (continuous) at TC = 100 °C
22(1)
A
Drain current (pulsed)
136(1)
A
Total dissipation at TC = 25 °C
40
W
dv/dt
(3)
Peak diode recovery voltage slope
15
V/ns
dv/dt
(4)
MOSFET dv/dt ruggedness
50
V/ns
2500
V
- 55 to 150
°C
VISO
Insulation withstand voltage (RMS) from all three leads to
external heat sink (t = 1 s; TC = 25 °C)
Tstg
Storage temperature range
Tj
Operating junction temperature range
Notes:
(1)Limited
(2)Pulse
(3)I
SD
(4)V
by maximum junction temperature.
width limited by safe operating area.
≤ 13 A, di/dt ≤ 400 A/µs; VDSpeak < V(BR)DSS, VDD = 400 V
DS
≤ 480 V
Table 3: Thermal data
Symbol
Parameter
Value
Unit
Rthj-case
Thermal resistance junction-case max
3.13
°C/W
Rthj-amb
Thermal resistance junction-ambient max
62.5
°C/W
Table 4: Avalanche characteristics
Symbol
Parameter
Value
Unit
IAR
Avalanche current, repetitive or not repetitive (pulse width limited by T jmax)
6
A
EAS
Single pulse avalanche energy (starting Tj=25 °C, ID= IAR; VDD=50 V)
500
mJ
DocID029433 Rev 1
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Electrical characteristics
2
STFH40N60M2
Electrical characteristics
(TC = 25 °C unless otherwise specified)
Table 5: On /off states
Symbol
Parameter
V(BR)DSS
Drain-source breakdown voltage
Test conditions
Min.
VGS = 0 V, ID = 1 mA
600
Typ.
Max.
Unit
V
VGS = 0 V, VDS = 600 V
1
µA
VGS = 0 V,
VDS = 600 V,
TC=125 °C(1)
100
µA
±10
µA
3
4
V
0.078
0.088
Ω
Min.
Typ.
Max.
Unit
-
2500
-
pF
-
117
-
pF
-
2.4
-
pF
IDSS
Zero gate voltage
drain current
IGSS
Gate-body leakage
current
VDS = 0 V, VGS = ±25 V
VGS(th)
Gate threshold voltage
VDS = VGS, ID = 250 µA
RDS(on)
Static drain-source on- resistance
VGS = 10 V, ID = 17 A
2
Notes:
(1)Defined
by design, not subject to production test.
Table 6: Dynamic
Symbol
Parameter
Test conditions
Ciss
Input capacitance
Coss
Output capacitance
Crss
Reverse transfer
capacitance
Coss eq.(1)
Equivalent output
capacitance
VDS= 0 to 480 V, VGS= 0 V
-
342
-
pF
RG
Intrinsic gate resistance
f = 1 MHz, ID=0 A
-
4.4
-
Ω
Qg
Total gate charge
-
57
-
nC
Qgs
Gate-source charge
-
10
-
nC
Qgd
Gate-drain charge
VDD = 480 V, ID = 34 A,
VGS = 10 V
(see Figure 15: "Test circuit
for gate charge behavior")
-
25.5
-
nC
VDS = 100 V, f = 1 MHz,
VGS = 0 V
Notes:
(1)
Coss eq. is defined as a constant equivalent capacitance giving the same charging time as C oss when VDS
increases from 0 to 80% VDSS
Table 7: Switching times
Symbol
td(on)
tr
td(off)
tf
4/12
Parameter
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Test conditions
VDD = 300 V, ID = 34 A,
RG = 4.7 Ω, VGS = 10 V
(see Figure 14: "Test circuit for
resistive load switching times"
and Figure 19: "Switching time
waveform")
DocID029433 Rev 1
Min.
Typ.
Max.
Unit
-
20.5
-
ns
-
13.5
-
ns
-
96.5
-
ns
-
11
-
ns
STFH40N60M2
Electrical characteristics
Table 8: Source drain diode
Symbol
Parameter
Test conditions
ISD(1)
Source-drain current
ISDM(2)
Source-drain current
(pulsed)
VSD(3)
Forward on voltage
trr
Reverse recovery time
Qrr
Reverse recovery charge
IRRM
Reverse recovery current
trr
Reverse recovery time
Qrr
Reverse recovery charge
IRRM
Reverse recovery current
Min.
Typ.
Max.
Unit
-
34
A
-
136
A
ISD = 34 A, VGS = 0 V
-
1.6
V
ISD = 34 A, di/dt = 100 A/µs
VDD = 60 V
(see Figure 16: "Test circuit for
inductive load switching and
diode recovery times")
-
440
ns
-
8.2
µC
-
37
A
ISD = 34 A, di/dt = 100 A/µs
VDD = 60 V, Tj = 150 °C
(see Figure 16: "Test circuit for
inductive load switching and
diode recovery times")
-
568
ns
-
11.5
µC
-
40.5
A
Notes:
(1)The
value is rated according to Rthj-case and limited by package.
(2)Pulse
width limited by safe operating area.
(3)Pulsed:
pulse duration = 300 µs, duty cycle 1.5%
DocID029433 Rev 1
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Electrical characteristics
2.1
STFH40N60M2
Electrical characteristics (curves)
Figure 2: Safe operating area
Figure 3: Thermal impedance
Figure 4: Output characteristics
Figure 5: Transfer characteristics
Figure 6: Gate charge vs gate-source voltage
Figure 7: Static drain-source on-resistance
W
6/12
DocID029433 Rev 1
STFH40N60M2
Electrical characteristics
Figure 8: Capacitance variations
Figure 9: Normalized gate threshold voltage vs.
temperature
Figure 10: Normalized on-resistance vs temperature
Figure 11: Source-drain diode forward
characteristics
GIPD240920132025FSR
ID=17 A
Figure 12: Normalized V(BR)DSS vs temperature
Figure 13: Output capacitance stored energy
DocID029433 Rev 1
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Test circuits
3
STFH40N60M2
Test circuits
Figure 15: Test circuit for gate charge
behavior
Figure 14: Test circuit for resistive load
switching times
Figure 16: Test circuit for inductive load
switching and diode recovery times
Figure 17: Unclamped inductive load test
circuit
Figure 18: Unclamped inductive waveform
8/12
DocID029433 Rev 1
Figure 19: Switching time waveform
STFH40N60M2
4
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK ®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
4.1
TO-220FP wide creepage package information
Figure 20: TO-220FP wide creepage package outline
DM00260252_1
DocID029433 Rev 1
9/12
Package information
STFH40N60M2
Table 9: TO-220FP wide creepage package mechanical data
mm
Dim.
10/12
Min.
Typ.
Max.
A
4.60
4.70
4.80
B
2.50
2.60
2.70
D
2.49
2.59
2.69
E
0.46
0.59
F
0.76
0.89
F1
0.96
1.25
F2
1.11
1.40
G
8.40
8.50
8.60
G1
4.15
4.25
4.35
H
10.90
11.00
11.10
L2
15.25
15.40
15.55
L3
28.70
29.00
29.30
L4
10.00
10.20
10.40
L5
2.55
2.70
2.85
L6
16.00
16.10
16.20
L7
9.05
9.15
9.25
Dia
3.00
3.10
3.20
DocID029433 Rev 1
STFH40N60M2
5
Revision history
Revision history
Table 10: Document revision history
Date
Revision
08-Jun-2016
1
DocID029433 Rev 1
Changes
First release.
11/12
STFH40N60M2
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