STFI10NK60Z

STFI10NK60Z N-channel 600 V, 0.65 Ω, 10 A, Zener-protected SuperMESH™ Power MOSFET in I²PAKFP package Datasheet — production data Features Type VDSS RDS(on) max STFI10NK60Z 600 V < 0.75 Ω 10 A PTOT ID 35 W ■ Fully insulated and low profile package with increased creepage path from pin to heatsink plate ■ Extremely high dv/dt capability 1 ■ 100% avalanche tested ■ Gate charge minimized I²PAKFP (TO-281) 2 3 Applications ■ Switching applications Figure 1. Internal schematic diagram D(2) Description This device is an N-channel Zener-protected Power MOSFET developed using STMicroelectronics' SuperMESH™ technology, achieved through optimization of ST's wellestablished strip-based PowerMESH™ layout. In addition to a significant reduction in onresistance, this device is designed to ensure a high level of dv/dt capability for the most demanding applications. G(1) S(3) AM01476v1 Table 1. Device summary Order code Marking Package Packaging STFI10NK60Z 10NK60Z I2PAKFP (TO-281) Tube March 2012 This is information on a product in full production. Doc ID 018968 Rev 3 1/13 www.st.com 13 Contents STFI10NK60Z Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) ........................... 6 3 Test circuits 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2/13 .............................................. 9 Doc ID 018968 Rev 3 STFI10NK60Z 1 Electrical ratings Electrical ratings Table 2. Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage 600 V VGS Gate-source voltage ± 30 V (1) A ID Drain current (continuous) at TC = 25 °C 10 ID Drain current (continuous) at TC = 100 °C 5.7 (1) A (1) A IDM (2) Drain current (pulsed) 36 PTOT Total dissipation at TC = 25 °C 35 W ESD Gate-source human body model (R=1,5 kΩ, C=100 pF) 4 kV 4.5 V/ns 2500 V -55 to 150 °C dv/dt (3) Peak diode recovery voltage slope VISO Insulation withstand voltage (RMS) from all three leads to external heat sink (t=1 s;TC=25 °C) Tj Tstg Operating junction temperature Storage temperature 1. Limited by maximum junction temperature 2. Pulse width limited by safe operating area 3. ISD < 10A, di/dt < 200A/µs, VDD =80% V(BR)DSS Table 3. Symbol Parameter Value Unit Rthj-case Thermal resistance junction-case Max 3.6 °C/W Rthj-amb Thermal resistance junction-amb Max 62.5 °C/W Value Unit Table 4. Symbol 1. Thermal data Avalanche characteristics Parameter IAR Repetitive or non repetitive avalanche current 9(1) A EAS Single pulse avalanche energy (starting Tj=25 °C, ID=IAR, VDD= 50 V) 300 mJ Limited by maximum junction temperature Doc ID 018968 Rev 3 3/13 Electrical characteristics 2 STFI10NK60Z Electrical characteristics (Tcase = 25 °C unless otherwise specified). Table 5. Symbol V(BR)DSS On /off states Parameter Test conditions Drain-source breakdown ID = 250 µA voltage, (VGS= 0) Min. Typ. Max. Unit 600 V IDSS Zero gate voltage drain current (VGS = 0) VDS = 600 V VDS = 600 V, TC= 125 °C 1 50 µA µA IGSS Gate body leakage current (VDS = 0) VGS = ±20 V ±10 µA VGS(th) Gate threshold voltage VDS= VGS, ID = 250 µA 3.75 4.5 V RDS(on) Static drain-source on resistance VGS= 10 V, ID= 4.5 A 0.65 0.75 Ω Min. Typ. Max. Unit Table 6. Symbol 3 Dynamic Parameter Test conditions gfs (1) Forward transconductance VDS =15 V, ID = 4.5 A - 7.8 S Ciss Coss Crss Input capacitance Output capacitance Reverse transfer capacitance VDS =25 V, f=1 MHz, VGS=0 - 1370 156 37 pF pF pF Equivalent output capacitance VGS=0, VDS =0 to 480 V - 90 pF Total gate charge Gate-source charge Gate-drain charge VDD=480 V, ID = 8 A VGS =10 V (see Figure 16) - 50 10 25 Coss eq(2) Qg Qgs Qgd 70 nC nC nC 1. Pulsed: pulse duration = 300µs, duty cycle 1.5% 2. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% 4/13 Table 7. Switching times Symbol Parameter Test conditions Min. Typ. Max Unit td(on) tr Turn-on delay time Rise time VDD=300 V, ID=4 A, RG=4.7 Ω, VGS=10 V (see Figure 15) - 20 20 - ns ns td(off) tf Turn-off delay time Fall time VDD=300 V, ID=4 A, RG=4.7 Ω, VGS=10 V (see Figure 15) - 55 30 - ns ns Doc ID 018968 Rev 3 STFI10NK60Z Electrical characteristics Table 8. Source drain diode Symbol Parameter ISD ISDM(1) Source-drain current Source-drain current (pulsed) VSD(2) Forward on voltage Reverse recovery time Reverse recovery charge Reverse recovery current trr Qrr IRRM Test conditions Min. Typ. Max. Unit - 10 36 A A ISD=10 A, VGS=0 - 1.6 V ISD=8 A, di/dt = 100 A/µs, VDD=40 V, Tj=150 °C - 570 4.3 15 Min. Typ. ns µC A 1. Pulse width limited by safe operating area 2. Pulsed: pulse duration = 300µs, duty cycle 1.5% Table 9. Symbol V(BR)GSO Gate-source Zener diode Parameter Test conditions Gate-source breakdown voltage (ID=0) IGS= ± 1 mA 30 Max. Unit - V The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the usage of external components. Doc ID 018968 Rev 3 5/13 Electrical characteristics STFI10NK60Z 2.1 Electrical characteristics (curves) Figure 2. Safe operating area Figure 3. Thermal impedance Figure 4. Output characteristics Figure 5. Transfer characteristics Figure 6. Transconductance Figure 7. Static drain-source on resistance -; 7)8TS 4MR ;,8";       6/13 Doc ID 018968 Rev 3     . ) & STFI10NK60Z Figure 8. Electrical characteristics Gate charge vs gate-source voltage Figure 9. Figure 10. Normalized gate threshold voltage vs temperature -; H9EfZ H6E/H9E ;6 /$'"g3 `ad_ Capacitance variations Figure 11. Normalized on resistance vs temperature D6Ea` `ad_            ª ª        F